---
_id: '54246'
author:
- first_name: Robin
full_name: Hamm, Robin
last_name: Hamm
citation:
ama: Hamm R. Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen.
Paderborn University; 2023.
apa: Hamm, R. (2023). Verarbeitung von Sensordaten auf eingebetteten heterogenen
FPGA-Systemen. Paderborn University.
bibtex: '@book{Hamm_2023, title={Verarbeitung von Sensordaten auf eingebetteten
heterogenen FPGA-Systemen}, publisher={Paderborn University}, author={Hamm, Robin},
year={2023} }'
chicago: Hamm, Robin. Verarbeitung von Sensordaten auf eingebetteten heterogenen
FPGA-Systemen. Paderborn University, 2023.
ieee: R. Hamm, Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen.
Paderborn University, 2023.
mla: Hamm, Robin. Verarbeitung von Sensordaten auf eingebetteten heterogenen
FPGA-Systemen. Paderborn University, 2023.
short: R. Hamm, Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen,
Paderborn University, 2023.
date_created: 2024-05-13T14:01:01Z
date_updated: 2024-05-15T13:29:49Z
department:
- _id: '78'
language:
- iso: ger
publisher: Paderborn University
status: public
supervisor:
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen
type: bachelorsthesis
user_id: '398'
year: '2023'
...
---
_id: '52480'
author:
- first_name: Alexander
full_name: Klassen, Alexander
last_name: Klassen
citation:
ama: Klassen A. Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices.
Paderborn University; 2023.
apa: Klassen, A. (2023). Fast Partial Reconfiguration for ReconOS64 on Xilinx
MPSoC Devices. Paderborn University.
bibtex: '@book{Klassen_2023, title={Fast Partial Reconfiguration for ReconOS64 on
Xilinx MPSoC Devices}, publisher={Paderborn University}, author={Klassen, Alexander},
year={2023} }'
chicago: Klassen, Alexander. Fast Partial Reconfiguration for ReconOS64 on Xilinx
MPSoC Devices. Paderborn University, 2023.
ieee: A. Klassen, Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC
Devices. Paderborn University, 2023.
mla: Klassen, Alexander. Fast Partial Reconfiguration for ReconOS64 on Xilinx
MPSoC Devices. Paderborn University, 2023.
short: A. Klassen, Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices,
Paderborn University, 2023.
date_created: 2024-03-11T16:06:00Z
date_updated: 2024-05-15T13:28:54Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
title: Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices
type: bachelorsthesis
user_id: '398'
year: '2023'
...
---
_id: '54298'
author:
- first_name: Jorian
full_name: Tsague Dingo, Jorian
last_name: Tsague Dingo
citation:
ama: Tsague Dingo J. Ein Simulator Für Schedulability-Experimente Mit Periodischen
Tasks Auf FPGAs. Paderborn University; 2023.
apa: Tsague Dingo, J. (2023). Ein Simulator für Schedulability-Experimente mit
periodischen Tasks auf FPGAs. Paderborn University.
bibtex: '@book{Tsague Dingo_2023, title={Ein Simulator für Schedulability-Experimente
mit periodischen Tasks auf FPGAs}, publisher={Paderborn University}, author={Tsague
Dingo, Jorian}, year={2023} }'
chicago: Tsague Dingo, Jorian. Ein Simulator Für Schedulability-Experimente Mit
Periodischen Tasks Auf FPGAs. Paderborn University, 2023.
ieee: J. Tsague Dingo, Ein Simulator für Schedulability-Experimente mit periodischen
Tasks auf FPGAs. Paderborn University, 2023.
mla: Tsague Dingo, Jorian. Ein Simulator Für Schedulability-Experimente Mit Periodischen
Tasks Auf FPGAs. Paderborn University, 2023.
short: J. Tsague Dingo, Ein Simulator Für Schedulability-Experimente Mit Periodischen
Tasks Auf FPGAs, Paderborn University, 2023.
date_created: 2024-05-15T13:24:34Z
date_updated: 2024-05-15T13:24:38Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
title: Ein Simulator für Schedulability-Experimente mit periodischen Tasks auf FPGAs
type: bachelorsthesis
user_id: '398'
year: '2023'
...
---
_id: '54299'
author:
- first_name: Mathis
full_name: Brede, Mathis
last_name: Brede
citation:
ama: Brede M. Evaluation of Classifier Migration Between Multiple XCS Populations.
Paderborn University; 2023.
apa: Brede, M. (2023). Evaluation of Classifier Migration Between Multiple XCS
Populations. Paderborn University.
bibtex: '@book{Brede_2023, title={Evaluation of Classifier Migration Between Multiple
XCS Populations}, publisher={Paderborn University}, author={Brede, Mathis}, year={2023}
}'
chicago: Brede, Mathis. Evaluation of Classifier Migration Between Multiple XCS
Populations. Paderborn University, 2023.
ieee: M. Brede, Evaluation of Classifier Migration Between Multiple XCS Populations.
Paderborn University, 2023.
mla: Brede, Mathis. Evaluation of Classifier Migration Between Multiple XCS Populations.
Paderborn University, 2023.
short: M. Brede, Evaluation of Classifier Migration Between Multiple XCS Populations,
Paderborn University, 2023.
date_created: 2024-05-15T13:26:17Z
date_updated: 2024-05-15T13:26:23Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: 'Tim '
full_name: 'Hansmeier, Tim '
last_name: Hansmeier
title: Evaluation of Classifier Migration Between Multiple XCS Populations
type: mastersthesis
user_id: '398'
year: '2023'
...
---
_id: '54300'
author:
- first_name: Alexander
full_name: Nowosad, Alexander
last_name: Nowosad
citation:
ama: Nowosad A. Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure
for the ReconROS Executor. Paderborn University; 2023.
apa: Nowosad, A. (2023). Design and Realization of an Intra-FPGA ROS 2 Communication
Infrastructure for the ReconROS Executor. Paderborn University.
bibtex: '@book{Nowosad_2023, title={Design and Realization of an Intra-FPGA ROS
2 Communication Infrastructure for the ReconROS Executor}, publisher={Paderborn
University}, author={Nowosad, Alexander}, year={2023} }'
chicago: Nowosad, Alexander. Design and Realization of an Intra-FPGA ROS 2 Communication
Infrastructure for the ReconROS Executor. Paderborn University, 2023.
ieee: A. Nowosad, Design and Realization of an Intra-FPGA ROS 2 Communication
Infrastructure for the ReconROS Executor. Paderborn University, 2023.
mla: Nowosad, Alexander. Design and Realization of an Intra-FPGA ROS 2 Communication
Infrastructure for the ReconROS Executor. Paderborn University, 2023.
short: A. Nowosad, Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure
for the ReconROS Executor, Paderborn University, 2023.
date_created: 2024-05-15T13:27:19Z
date_updated: 2024-05-15T13:27:26Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
title: Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure
for the ReconROS Executor
type: mastersthesis
user_id: '398'
year: '2023'
...
---
_id: '54242'
author:
- first_name: Gerrit
full_name: Evers, Gerrit
last_name: Evers
citation:
ama: Evers G. Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation.
Paderborn University; 2023.
apa: Evers, G. (2023). Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation.
Paderborn University.
bibtex: '@book{Evers_2023, title={Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation},
publisher={Paderborn University}, author={Evers, Gerrit}, year={2023} }'
chicago: Evers, Gerrit. Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation.
Paderborn University, 2023.
ieee: G. Evers, Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation.
Paderborn University, 2023.
mla: Evers, Gerrit. Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation.
Paderborn University, 2023.
short: G. Evers, Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation,
Paderborn University, 2023.
date_created: 2024-05-13T13:59:09Z
date_updated: 2024-05-15T13:31:08Z
department:
- _id: '78'
language:
- iso: ger
publisher: Paderborn University
status: public
supervisor:
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation
type: bachelorsthesis
user_id: '398'
year: '2023'
...
---
_id: '46075'
author:
- first_name: Masood
full_name: Raeisi Nafchi, Masood
last_name: Raeisi Nafchi
citation:
ama: Raeisi Nafchi M. Reconfigurable Random Forest Implementation on FPGA.
Paderborn University; 2023.
apa: Raeisi Nafchi, M. (2023). Reconfigurable Random Forest Implementation on
FPGA. Paderborn University.
bibtex: '@book{Raeisi Nafchi_2023, title={Reconfigurable Random Forest Implementation
on FPGA}, publisher={Paderborn University}, author={Raeisi Nafchi, Masood}, year={2023}
}'
chicago: Raeisi Nafchi, Masood. Reconfigurable Random Forest Implementation on
FPGA. Paderborn University, 2023.
ieee: M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA.
Paderborn University, 2023.
mla: Raeisi Nafchi, Masood. Reconfigurable Random Forest Implementation on FPGA.
Paderborn University, 2023.
short: M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA, Paderborn
University, 2023.
date_created: 2023-07-18T08:55:14Z
date_updated: 2024-05-15T13:32:14Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
title: Reconfigurable Random Forest Implementation on FPGA
type: mastersthesis
user_id: '398'
year: '2023'
...
---
_id: '45863'
abstract:
- lang: eng
text: "In the proposal for our CRC in 2011, we formulated a vision of markets for\r\nIT
services that describes an approach to the provision of such services\r\nthat
was novel at that time and, to a large extent, remains so today:\r\n„Our vision
of on-the-fly computing is that of IT services individually and\r\nautomatically
configured and brought to execution from flexibly combinable\r\nservices traded
on markets. At the same time, we aim at organizing\r\nmarkets whose participants
maintain a lively market of services through\r\nappropriate entrepreneurial actions.“\r\nOver
the last 12 years, we have developed methods and techniques to\r\naddress problems
critical to the convenient, efficient, and secure use of\r\non-the-fly computing.
Among other things, we have made the description\r\nof services more convenient
by allowing natural language input,\r\nincreased the quality of configured services
through (natural language)\r\ninteraction and more efficient configuration processes
and analysis\r\nprocedures, made the quality of (the products of) providers in
the\r\nmarketplace transparent through reputation systems, and increased the\r\nresource
efficiency of execution through reconfigurable heterogeneous\r\ncomputing nodes
and an integrated treatment of service description and\r\nconfiguration. We have
also developed network infrastructures that have\r\na high degree of adaptivity,
scalability, efficiency, and reliability, and\r\nprovide cryptographic guarantees
of anonymity and security for market\r\nparticipants and their products and services.\r\nTo
demonstrate the pervasiveness of the OTF computing approach, we\r\nhave implemented
a proof-of-concept for OTF computing that can run\r\ntypical scenarios of an OTF
market. We illustrated the approach using\r\na cutting-edge application scenario
– automated machine learning (AutoML).\r\nFinally, we have been pushing our work
for the perpetuation of\r\nOn-The-Fly Computing beyond the SFB and sharing the
expertise gained\r\nin the SFB in events with industry partners as well as transfer
projects.\r\nThis work required a broad spectrum of expertise. Computer scientists\r\nand
economists with research interests such as computer networks and\r\ndistributed
algorithms, security and cryptography, software engineering\r\nand verification,
configuration and machine learning, computer engineering\r\nand HPC, microeconomics
and game theory, business informatics\r\nand management have successfully collaborated
here."
alternative_title:
- Collaborative Research Centre 901 (2011 – 2023)
author:
- first_name: Claus-Jochen
full_name: Haake, Claus-Jochen
id: '20801'
last_name: Haake
- first_name: Friedhelm
full_name: Meyer auf der Heide, Friedhelm
id: '15523'
last_name: Meyer auf der Heide
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
- first_name: Henning
full_name: Wachsmuth, Henning
id: '3900'
last_name: Wachsmuth
- first_name: Heike
full_name: Wehrheim, Heike
id: '573'
last_name: Wehrheim
citation:
ama: Haake C-J, Meyer auf der Heide F, Platzner M, Wachsmuth H, Wehrheim H. On-The-Fly
Computing -- Individualized IT-Services in Dynamic Markets. Vol 412. Heinz
Nixdorf Institut, Universität Paderborn; 2023. doi:10.17619/UNIPB/1-1797
apa: Haake, C.-J., Meyer auf der Heide, F., Platzner, M., Wachsmuth, H., & Wehrheim,
H. (2023). On-The-Fly Computing -- Individualized IT-services in dynamic markets
(Vol. 412). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.17619/UNIPB/1-1797
bibtex: '@book{Haake_Meyer auf der Heide_Platzner_Wachsmuth_Wehrheim_2023, place={Paderborn},
series={Verlagsschriftenreihe des Heinz Nixdorf Instituts}, title={On-The-Fly
Computing -- Individualized IT-services in dynamic markets}, volume={412}, DOI={10.17619/UNIPB/1-1797}, publisher={Heinz
Nixdorf Institut, Universität Paderborn}, author={Haake, Claus-Jochen and Meyer
auf der Heide, Friedhelm and Platzner, Marco and Wachsmuth, Henning and Wehrheim,
Heike}, year={2023}, collection={Verlagsschriftenreihe des Heinz Nixdorf Instituts}
}'
chicago: 'Haake, Claus-Jochen, Friedhelm Meyer auf der Heide, Marco Platzner, Henning
Wachsmuth, and Heike Wehrheim. On-The-Fly Computing -- Individualized IT-Services
in Dynamic Markets. Vol. 412. Verlagsschriftenreihe Des Heinz Nixdorf Instituts.
Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023. https://doi.org/10.17619/UNIPB/1-1797.'
ieee: 'C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim,
On-The-Fly Computing -- Individualized IT-services in dynamic markets,
vol. 412. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023.'
mla: Haake, Claus-Jochen, et al. On-The-Fly Computing -- Individualized IT-Services
in Dynamic Markets. Heinz Nixdorf Institut, Universität Paderborn, 2023, doi:10.17619/UNIPB/1-1797.
short: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim,
On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf
Institut, Universität Paderborn, Paderborn, 2023.
date_created: 2023-07-05T07:16:51Z
date_updated: 2024-07-12T12:07:59Z
ddc:
- '000'
department:
- _id: '7'
- _id: '78'
- _id: '26'
doi: 10.17619/UNIPB/1-1797
file:
- access_level: open_access
content_type: application/pdf
creator: ups
date_created: 2023-07-05T07:15:55Z
date_updated: 2023-07-05T07:19:14Z
file_id: '45864'
file_name: SFB-Buch-Final.pdf
file_size: 15480050
relation: main_file
file_date_updated: 2023-07-05T07:19:14Z
has_accepted_license: '1'
intvolume: ' 412'
language:
- iso: eng
oa: '1'
page: '247'
place: Paderborn
project:
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
- _id: '2'
name: 'SFB 901 - A: SFB 901 - Project Area A'
- _id: '3'
name: 'SFB 901 - B: SFB 901 - Project Area B'
- _id: '4'
name: 'SFB 901 - C: SFB 901 - Project Area C'
- _id: '82'
name: 'SFB 901 - T: SFB 901 - Project Area T'
- _id: '5'
grant_number: '160364472'
name: 'SFB 901 - A1: SFB 901 - Möglichkeiten und Grenzen lokaler Strategien in dynamischen
Netzen (Subproject A1)'
- _id: '7'
grant_number: '160364472'
name: 'SFB 901 - A3: SFB 901 - Der Markt für Services: Anreize, Algorithmen, Implementation
(Subproject A3)'
- _id: '8'
grant_number: '160364472'
name: 'SFB 901 - A4: SFB 901 - Empirische Analysen in Märkten für OTF Dienstleistungen
(Subproject A4)'
- _id: '9'
grant_number: '160364472'
name: 'SFB 901 - B1: SFB 901 - Parametrisierte Servicespezifikation (Subproject
B1)'
- _id: '10'
grant_number: '160364472'
name: 'SFB 901 - B2: Konfiguration und Bewertung (B02)'
- _id: '11'
name: 'SFB 901 - B3: SFB 901 - Subproject B3'
- _id: '12'
name: 'SFB 901 - B4: SFB 901 - Subproject B4'
- _id: '13'
grant_number: '160364472'
name: 'SFB 901 - C1: SFB 901 - Subproject C1'
- _id: '14'
grant_number: '160364472'
name: 'SFB 901 - C2: SFB 901 - On-The-Fly Compute Centers I: Heterogene Ausführungsumgebungen
(Subproject C2)'
- _id: '16'
grant_number: '160364472'
name: 'SFB 901 - C4: SFB 901 - On-The-Fly Compute Centers II: Ausführung komponierter
Dienste in konfigurierbaren Rechenzentren (Subproject C4)'
- _id: '17'
name: 'SFB 901 - C5: SFB 901 - Subproject C5'
- _id: '83'
name: 'SFB 901 - T1: SFB 901 -Subproject T1'
- _id: '84'
grant_number: '160364472'
name: 'SFB 901 - T2: SFB 901 -Subproject T2'
publication_identifier:
unknown:
- 978-3-947647-31-6
publisher: Heinz Nixdorf Institut, Universität Paderborn
series_title: Verlagsschriftenreihe des Heinz Nixdorf Instituts
status: public
title: On-The-Fly Computing -- Individualized IT-services in dynamic markets
type: book
user_id: '1112'
volume: 412
year: '2023'
...
---
_id: '44194'
author:
- first_name: Qazi Arbab
full_name: Ahmed, Qazi Arbab
id: '72764'
last_name: Ahmed
orcid: 0000-0002-1837-2254
- first_name: Muhammad
full_name: Awais, Muhammad
last_name: Awais
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Ahmed QA, Awais M, Platzner M. MAAS: Hiding Trojans in Approximate Circuits.
In: The 24th International Symposium on Quality Electronic Design (ISQED’23),
San Francisco, Califorina USA. ; 2023.'
apa: 'Ahmed, Q. A., Awais, M., & Platzner, M. (2023). MAAS: Hiding Trojans in
Approximate Circuits. The 24th International Symposium on Quality Electronic
Design (ISQED’23), San Francisco, Califorina USA. The 24th International Symposium
on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA.'
bibtex: '@inproceedings{Ahmed_Awais_Platzner_2023, title={MAAS: Hiding Trojans in
Approximate Circuits}, booktitle={The 24th International Symposium on Quality
Electronic Design (ISQED’23), San Francisco, Califorina USA}, author={Ahmed, Qazi
Arbab and Awais, Muhammad and Platzner, Marco}, year={2023} }'
chicago: 'Ahmed, Qazi Arbab, Muhammad Awais, and Marco Platzner. “MAAS: Hiding Trojans
in Approximate Circuits.” In The 24th International Symposium on Quality Electronic
Design (ISQED’23), San Francisco, Califorina USA, 2023.'
ieee: 'Q. A. Ahmed, M. Awais, and M. Platzner, “MAAS: Hiding Trojans in Approximate
Circuits,” presented at the The 24th International Symposium on Quality Electronic
Design (ISQED’23), San Fransico CA 94023-0607, USA, 2023.'
mla: 'Ahmed, Qazi Arbab, et al. “MAAS: Hiding Trojans in Approximate Circuits.”
The 24th International Symposium on Quality Electronic Design (ISQED’23), San
Francisco, Califorina USA, 2023.'
short: 'Q.A. Ahmed, M. Awais, M. Platzner, in: The 24th International Symposium
on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA, 2023.'
conference:
end_date: 2023-04-07
location: San Fransico CA 94023-0607, USA
name: The 24th International Symposium on Quality Electronic Design (ISQED'23)
start_date: 2023-04-05
date_created: 2023-04-26T13:04:56Z
date_updated: 2023-05-10T13:52:14Z
ddc:
- '620'
department:
- _id: '78'
file:
- access_level: open_access
content_type: application/pdf
creator: qazi
date_created: 2023-04-26T13:03:54Z
date_updated: 2023-05-10T13:52:14Z
file_id: '44196'
file_name: s4Bp4-041.pdf
file_size: 614626
relation: main_file
file_date_updated: 2023-05-10T13:52:14Z
has_accepted_license: '1'
language:
- iso: eng
oa: '1'
project:
- _id: '3'
name: 'SFB 901 - B: SFB 901 - Project Area B'
- _id: '12'
name: 'SFB 901 - B4: SFB 901 - Subproject B4'
- _id: '1'
name: 'SFB 901: SFB 901'
publication: The 24th International Symposium on Quality Electronic Design (ISQED'23),
San Francisco, Califorina USA
status: public
title: 'MAAS: Hiding Trojans in Approximate Circuits'
type: conference
user_id: '72764'
year: '2023'
...
---
_id: '45917'
author:
- first_name: Masood
full_name: Raeisi Nafchi, Masood
last_name: Raeisi Nafchi
citation:
ama: Raeisi Nafchi M. Reconfigurable Random Forest Implementation on FPGA.
Paderborn University; 2023.
apa: Raeisi Nafchi, M. (2023). Reconfigurable Random Forest Implementation on
FPGA. Paderborn University.
bibtex: '@book{Raeisi Nafchi_2023, title={Reconfigurable Random Forest Implementation
on FPGA}, publisher={Paderborn University}, author={Raeisi Nafchi, Masood}, year={2023}
}'
chicago: Raeisi Nafchi, Masood. Reconfigurable Random Forest Implementation on
FPGA. Paderborn University, 2023.
ieee: M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA.
Paderborn University, 2023.
mla: Raeisi Nafchi, Masood. Reconfigurable Random Forest Implementation on FPGA.
Paderborn University, 2023.
short: M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA, Paderborn
University, 2023.
date_created: 2023-07-09T13:01:10Z
date_updated: 2023-07-09T13:07:25Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '83'
name: 'SFB 901 - T1: SFB 901 -Subproject T1'
- _id: '82'
name: 'SFB 901 - T: SFB 901 - Project Area T'
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
publisher: Paderborn University
status: public
supervisor:
- first_name: 'Marco '
full_name: 'Platzner, Marco '
last_name: Platzner
title: Reconfigurable Random Forest Implementation on FPGA
type: mastersthesis
user_id: '398'
year: '2023'
...
---
_id: '45916'
author:
- first_name: Nihal
full_name: Yadalam Murali Kumar, Nihal
last_name: Yadalam Murali Kumar
citation:
ama: Yadalam Murali Kumar N. Data Analytics for Predictive Maintenance of Time
Series Data. Paderborn University; 2023.
apa: Yadalam Murali Kumar, N. (2023). Data Analytics for Predictive Maintenance
of Time Series Data. Paderborn University.
bibtex: '@book{Yadalam Murali Kumar_2023, title={Data Analytics for Predictive Maintenance
of Time Series Data}, publisher={Paderborn University}, author={Yadalam Murali
Kumar, Nihal}, year={2023} }'
chicago: Yadalam Murali Kumar, Nihal. Data Analytics for Predictive Maintenance
of Time Series Data. Paderborn University, 2023.
ieee: N. Yadalam Murali Kumar, Data Analytics for Predictive Maintenance of Time
Series Data. Paderborn University, 2023.
mla: Yadalam Murali Kumar, Nihal. Data Analytics for Predictive Maintenance of
Time Series Data. Paderborn University, 2023.
short: N. Yadalam Murali Kumar, Data Analytics for Predictive Maintenance of Time
Series Data, Paderborn University, 2023.
date_created: 2023-07-09T12:59:28Z
date_updated: 2023-07-09T13:06:37Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '83'
name: 'SFB 901 - T1: SFB 901 -Subproject T1'
- _id: '82'
name: 'SFB 901 - T: SFB 901 - Project Area T'
- _id: '1'
grant_number: '160364472'
name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
in dynamischen Märkten '
publisher: Paderborn University
status: public
title: Data Analytics for Predictive Maintenance of Time Series Data
type: mastersthesis
user_id: '398'
year: '2023'
...
---
_id: '64114'
author:
- first_name: Qazi Arbab
full_name: Ahmed, Qazi Arbab
last_name: Ahmed
- first_name: Muhammad
full_name: Awais, Muhammad
last_name: Awais
- first_name: Marco
full_name: Platzner, Marco
last_name: Platzner
citation:
ama: 'Ahmed QA, Awais M, Platzner M. MAAS: Hiding Trojans in Approximate Circuits.
In: 2023 24th International Symposium on Quality Electronic Design (ISQED).
IEEE; 2023. doi:10.1109/isqed57927.2023.10129286'
apa: 'Ahmed, Q. A., Awais, M., & Platzner, M. (2023). MAAS: Hiding Trojans in
Approximate Circuits. 2023 24th International Symposium on Quality Electronic
Design (ISQED). https://doi.org/10.1109/isqed57927.2023.10129286'
bibtex: '@inproceedings{Ahmed_Awais_Platzner_2023, title={MAAS: Hiding Trojans in
Approximate Circuits}, DOI={10.1109/isqed57927.2023.10129286},
booktitle={2023 24th International Symposium on Quality Electronic Design (ISQED)},
publisher={IEEE}, author={Ahmed, Qazi Arbab and Awais, Muhammad and Platzner,
Marco}, year={2023} }'
chicago: 'Ahmed, Qazi Arbab, Muhammad Awais, and Marco Platzner. “MAAS: Hiding Trojans
in Approximate Circuits.” In 2023 24th International Symposium on Quality Electronic
Design (ISQED). IEEE, 2023. https://doi.org/10.1109/isqed57927.2023.10129286.'
ieee: 'Q. A. Ahmed, M. Awais, and M. Platzner, “MAAS: Hiding Trojans in Approximate
Circuits,” 2023, doi: 10.1109/isqed57927.2023.10129286.'
mla: 'Ahmed, Qazi Arbab, et al. “MAAS: Hiding Trojans in Approximate Circuits.”
2023 24th International Symposium on Quality Electronic Design (ISQED),
IEEE, 2023, doi:10.1109/isqed57927.2023.10129286.'
short: 'Q.A. Ahmed, M. Awais, M. Platzner, in: 2023 24th International Symposium
on Quality Electronic Design (ISQED), IEEE, 2023.'
date_created: 2026-02-11T10:19:40Z
date_updated: 2026-02-11T10:20:32Z
department:
- _id: '78'
doi: 10.1109/isqed57927.2023.10129286
publication: 2023 24th International Symposium on Quality Electronic Design (ISQED)
publication_status: published
publisher: IEEE
status: public
title: 'MAAS: Hiding Trojans in Approximate Circuits'
type: conference
user_id: '64665'
year: '2023'
...
---
_id: '54244'
author:
- first_name: Salem
full_name: AlAidroos, Salem
last_name: AlAidroos
citation:
ama: AlAidroos S. Design and Implementation of a RadioML Demonstrator Based on
an RFSoC Platform. Paderborn University; 2023.
apa: AlAidroos, S. (2023). Design and Implementation of a RadioML Demonstrator
based on an RFSoC Platform. Paderborn University.
bibtex: '@book{AlAidroos_2023, title={Design and Implementation of a RadioML Demonstrator
based on an RFSoC Platform}, publisher={Paderborn University}, author={AlAidroos,
Salem}, year={2023} }'
chicago: AlAidroos, Salem. Design and Implementation of a RadioML Demonstrator
Based on an RFSoC Platform. Paderborn University, 2023.
ieee: S. AlAidroos, Design and Implementation of a RadioML Demonstrator based
on an RFSoC Platform. Paderborn University, 2023.
mla: AlAidroos, Salem. Design and Implementation of a RadioML Demonstrator Based
on an RFSoC Platform. Paderborn University, 2023.
short: S. AlAidroos, Design and Implementation of a RadioML Demonstrator Based on
an RFSoC Platform, Paderborn University, 2023.
date_created: 2024-05-13T13:59:16Z
date_updated: 2026-04-27T14:20:33Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '52'
name: Computing Resources Provided by the Paderborn Center for Parallel Computing
publisher: Paderborn University
status: public
supervisor:
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform
type: mastersthesis
user_id: '55631'
year: '2023'
...
---
_id: '54243'
author:
- first_name: Marvin Osaretin
full_name: Oviasogie, Marvin Osaretin
last_name: Oviasogie
citation:
ama: Oviasogie MO. Demonstrator for Dataflow-Based DNN Acceleration for Vision
Applications on Platform FPGAs. Paderborn University; 2023.
apa: Oviasogie, M. O. (2023). Demonstrator for Dataflow-based DNN Acceleration
for Vision Applications on Platform FPGAs. Paderborn University.
bibtex: '@book{Oviasogie_2023, title={Demonstrator for Dataflow-based DNN Acceleration
for Vision Applications on Platform FPGAs}, publisher={Paderborn University},
author={Oviasogie, Marvin Osaretin}, year={2023} }'
chicago: Oviasogie, Marvin Osaretin. Demonstrator for Dataflow-Based DNN Acceleration
for Vision Applications on Platform FPGAs. Paderborn University, 2023.
ieee: M. O. Oviasogie, Demonstrator for Dataflow-based DNN Acceleration for Vision
Applications on Platform FPGAs. Paderborn University, 2023.
mla: Oviasogie, Marvin Osaretin. Demonstrator for Dataflow-Based DNN Acceleration
for Vision Applications on Platform FPGAs. Paderborn University, 2023.
short: M.O. Oviasogie, Demonstrator for Dataflow-Based DNN Acceleration for Vision
Applications on Platform FPGAs, Paderborn University, 2023.
date_created: 2024-05-13T13:58:31Z
date_updated: 2026-04-27T14:20:58Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '52'
name: Computing Resources Provided by the Paderborn Center for Parallel Computing
publisher: Paderborn University
status: public
supervisor:
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on
Platform FPGAs
type: bachelorsthesis
user_id: '55631'
year: '2023'
...
---
_id: '54241'
author:
- first_name: Lucas David
full_name: Reuter, Lucas David
last_name: Reuter
citation:
ama: Reuter LD. Development of a Power Analysis Framework for Embedded FPGA Accelerators.
Paderborn University; 2023.
apa: Reuter, L. D. (2023). Development of a Power Analysis Framework for Embedded
FPGA Accelerators. Paderborn University.
bibtex: '@book{Reuter_2023, title={Development of a Power Analysis Framework for
Embedded FPGA Accelerators}, publisher={Paderborn University}, author={Reuter,
Lucas David}, year={2023} }'
chicago: Reuter, Lucas David. Development of a Power Analysis Framework for Embedded
FPGA Accelerators. Paderborn University, 2023.
ieee: L. D. Reuter, Development of a Power Analysis Framework for Embedded FPGA
Accelerators. Paderborn University, 2023.
mla: Reuter, Lucas David. Development of a Power Analysis Framework for Embedded
FPGA Accelerators. Paderborn University, 2023.
short: L.D. Reuter, Development of a Power Analysis Framework for Embedded FPGA
Accelerators, Paderborn University, 2023.
date_created: 2024-05-13T13:56:45Z
date_updated: 2026-04-27T14:21:10Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '52'
name: Computing Resources Provided by the Paderborn Center for Parallel Computing
publisher: Paderborn University
status: public
supervisor:
- first_name: Felix
full_name: Jentzsch, Felix
id: '55631'
last_name: Jentzsch
orcid: 0000-0003-4987-5708
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Development of a Power Analysis Framework for Embedded FPGA Accelerators
type: bachelorsthesis
user_id: '55631'
year: '2023'
...
---
_id: '29945'
author:
- first_name: Linus Matthias
full_name: Witschen, Linus Matthias
id: '49051'
last_name: Witschen
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Lucas David
full_name: Reuter, Lucas David
last_name: Reuter
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Witschen LM, Wiersema T, Reuter LD, Platzner M. Search Space Characterization
for Approximate Logic Synthesis . In: 2022 59th ACM/IEEE Design Automation
Conference (DAC).'
apa: Witschen, L. M., Wiersema, T., Reuter, L. D., & Platzner, M. (n.d.). Search
Space Characterization for Approximate Logic Synthesis . 2022 59th ACM/IEEE
Design Automation Conference (DAC). 2022 59th ACM/IEEE Design Automation Conference
(DAC), San Francisco, USA.
bibtex: '@inproceedings{Witschen_Wiersema_Reuter_Platzner, title={Search Space Characterization
for Approximate Logic Synthesis }, booktitle={2022 59th ACM/IEEE Design Automation
Conference (DAC)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Reuter,
Lucas David and Platzner, Marco} }'
chicago: Witschen, Linus Matthias, Tobias Wiersema, Lucas David Reuter, and Marco
Platzner. “Search Space Characterization for Approximate Logic Synthesis .” In
2022 59th ACM/IEEE Design Automation Conference (DAC), n.d.
ieee: L. M. Witschen, T. Wiersema, L. D. Reuter, and M. Platzner, “Search Space
Characterization for Approximate Logic Synthesis ,” presented at the 2022 59th
ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.
mla: Witschen, Linus Matthias, et al. “Search Space Characterization for Approximate
Logic Synthesis .” 2022 59th ACM/IEEE Design Automation Conference (DAC).
short: 'L.M. Witschen, T. Wiersema, L.D. Reuter, M. Platzner, in: 2022 59th ACM/IEEE
Design Automation Conference (DAC), n.d.'
conference:
end_date: 2022-07-14
location: San Francisco, USA
name: 2022 59th ACM/IEEE Design Automation Conference (DAC)
start_date: 2022-07-10
date_created: 2022-02-22T07:51:38Z
date_updated: 2022-02-22T07:51:42Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '1'
name: 'SFB 901: SFB 901'
- _id: '3'
name: 'SFB 901 - B: SFB 901 - Project Area B'
- _id: '12'
name: 'SFB 901 - B4: SFB 901 - Subproject B4'
publication: 2022 59th ACM/IEEE Design Automation Conference (DAC)
publication_status: accepted
status: public
title: 'Search Space Characterization for Approximate Logic Synthesis '
type: conference
user_id: '49051'
year: '2022'
...
---
_id: '29865'
author:
- first_name: Linus Matthias
full_name: Witschen, Linus Matthias
id: '49051'
last_name: Witschen
- first_name: Tobias
full_name: Wiersema, Tobias
id: '3118'
last_name: Wiersema
- first_name: Matthias
full_name: Artmann, Matthias
last_name: Artmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Witschen LM, Wiersema T, Artmann M, Platzner M. MUSCAT: MUS-based Circuit
Approximation Technique. In: Design, Automation and Test in Europe (DATE).'
apa: 'Witschen, L. M., Wiersema, T., Artmann, M., & Platzner, M. (n.d.). MUSCAT:
MUS-based Circuit Approximation Technique. Design, Automation and Test in Europe
(DATE). Design, Automation and Test in Europe (DATE), Online.'
bibtex: '@inproceedings{Witschen_Wiersema_Artmann_Platzner, title={MUSCAT: MUS-based
Circuit Approximation Technique}, booktitle={Design, Automation and Test in Europe
(DATE)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Artmann, Matthias
and Platzner, Marco} }'
chicago: 'Witschen, Linus Matthias, Tobias Wiersema, Matthias Artmann, and Marco
Platzner. “MUSCAT: MUS-Based Circuit Approximation Technique.” In Design, Automation
and Test in Europe (DATE), n.d.'
ieee: 'L. M. Witschen, T. Wiersema, M. Artmann, and M. Platzner, “MUSCAT: MUS-based
Circuit Approximation Technique,” presented at the Design, Automation and Test
in Europe (DATE), Online.'
mla: 'Witschen, Linus Matthias, et al. “MUSCAT: MUS-Based Circuit Approximation
Technique.” Design, Automation and Test in Europe (DATE).'
short: 'L.M. Witschen, T. Wiersema, M. Artmann, M. Platzner, in: Design, Automation
and Test in Europe (DATE), n.d.'
conference:
location: Online
name: Design, Automation and Test in Europe (DATE)
date_created: 2022-02-16T16:22:23Z
date_updated: 2022-02-22T07:52:01Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '1'
name: 'SFB 901: SFB 901'
- _id: '3'
name: 'SFB 901 - B: SFB 901 - Project Area B'
- _id: '12'
name: 'SFB 901 - B4: SFB 901 - Subproject B4'
- _id: '52'
name: 'PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing'
publication: Design, Automation and Test in Europe (DATE)
publication_status: accepted
status: public
title: 'MUSCAT: MUS-based Circuit Approximation Technique'
type: conference
user_id: '49051'
year: '2022'
...
---
_id: '30971'
author:
- first_name: Tim
full_name: Hansmeier, Tim
id: '49992'
last_name: Hansmeier
orcid: 0000-0003-1377-3339
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Hansmeier T, Platzner M. Integrating Safety Guarantees into the Learning Classifier
System XCS. In: Applications of Evolutionary Computation, EvoApplications 2022,
Proceedings. Vol 13224. Lecture Notes in Computer Science. Springer International
Publishing; 2022:386-401. doi:10.1007/978-3-031-02462-7_25'
apa: Hansmeier, T., & Platzner, M. (2022). Integrating Safety Guarantees into
the Learning Classifier System XCS. Applications of Evolutionary Computation,
EvoApplications 2022, Proceedings, 13224, 386–401. https://doi.org/10.1007/978-3-031-02462-7_25
bibtex: '@inproceedings{Hansmeier_Platzner_2022, series={Lecture Notes in Computer
Science}, title={Integrating Safety Guarantees into the Learning Classifier System
XCS}, volume={13224}, DOI={10.1007/978-3-031-02462-7_25},
booktitle={Applications of Evolutionary Computation, EvoApplications 2022, Proceedings},
publisher={Springer International Publishing}, author={Hansmeier, Tim and Platzner,
Marco}, year={2022}, pages={386–401}, collection={Lecture Notes in Computer Science}
}'
chicago: Hansmeier, Tim, and Marco Platzner. “Integrating Safety Guarantees into
the Learning Classifier System XCS.” In Applications of Evolutionary Computation,
EvoApplications 2022, Proceedings, 13224:386–401. Lecture Notes in Computer
Science. Springer International Publishing, 2022. https://doi.org/10.1007/978-3-031-02462-7_25.
ieee: 'T. Hansmeier and M. Platzner, “Integrating Safety Guarantees into the Learning
Classifier System XCS,” in Applications of Evolutionary Computation, EvoApplications
2022, Proceedings, Madrid, 2022, vol. 13224, pp. 386–401, doi: 10.1007/978-3-031-02462-7_25.'
mla: Hansmeier, Tim, and Marco Platzner. “Integrating Safety Guarantees into the
Learning Classifier System XCS.” Applications of Evolutionary Computation,
EvoApplications 2022, Proceedings, vol. 13224, Springer International Publishing,
2022, pp. 386–401, doi:10.1007/978-3-031-02462-7_25.
short: 'T. Hansmeier, M. Platzner, in: Applications of Evolutionary Computation,
EvoApplications 2022, Proceedings, Springer International Publishing, 2022, pp.
386–401.'
conference:
end_date: 2022-04-22
location: Madrid
name: 25th International Conference on Applications of Evolutionary Computation,
EvoApplications 2022
start_date: 2022-04-20
date_created: 2022-04-28T09:42:33Z
date_updated: 2022-04-28T10:24:18Z
department:
- _id: '78'
doi: 10.1007/978-3-031-02462-7_25
intvolume: ' 13224'
language:
- iso: eng
page: 386-401
project:
- _id: '4'
name: 'SFB 901 - C: SFB 901 - Project Area C'
- _id: '14'
name: 'SFB 901 - C2: SFB 901 - Subproject C2'
- _id: '1'
name: 'SFB 901: SFB 901'
publication: Applications of Evolutionary Computation, EvoApplications 2022, Proceedings
publication_identifier:
isbn:
- '9783031024610'
- '9783031024627'
issn:
- 0302-9743
- 1611-3349
publication_status: published
publisher: Springer International Publishing
series_title: Lecture Notes in Computer Science
status: public
title: Integrating Safety Guarantees into the Learning Classifier System XCS
type: conference
user_id: '49992'
volume: 13224
year: '2022'
...
---
_id: '32855'
author:
- first_name: Lennart
full_name: Clausing, Lennart
id: '74287'
last_name: Clausing
orcid: 0000-0003-3789-6034
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Clausing L, Platzner M. ReconOS64: A Hardware Operating System for Modern
Platform FPGAs with 64-Bit Support. In: 2022 IEEE International Parallel and
Distributed Processing Symposium Workshops (IPDPSW). IEEE; 2022:120-127. doi:10.1109/ipdpsw55747.2022.00029'
apa: 'Clausing, L., & Platzner, M. (2022). ReconOS64: A Hardware Operating System
for Modern Platform FPGAs with 64-Bit Support. 2022 IEEE International Parallel
and Distributed Processing Symposium Workshops (IPDPSW), 120–127. https://doi.org/10.1109/ipdpsw55747.2022.00029'
bibtex: '@inproceedings{Clausing_Platzner_2022, title={ReconOS64: A Hardware Operating
System for Modern Platform FPGAs with 64-Bit Support}, DOI={10.1109/ipdpsw55747.2022.00029},
booktitle={2022 IEEE International Parallel and Distributed Processing Symposium
Workshops (IPDPSW)}, publisher={IEEE}, author={Clausing, Lennart and Platzner,
Marco}, year={2022}, pages={120–127} }'
chicago: 'Clausing, Lennart, and Marco Platzner. “ReconOS64: A Hardware Operating
System for Modern Platform FPGAs with 64-Bit Support.” In 2022 IEEE International
Parallel and Distributed Processing Symposium Workshops (IPDPSW), 120–27.
IEEE, 2022. https://doi.org/10.1109/ipdpsw55747.2022.00029.'
ieee: 'L. Clausing and M. Platzner, “ReconOS64: A Hardware Operating System for
Modern Platform FPGAs with 64-Bit Support,” in 2022 IEEE International Parallel
and Distributed Processing Symposium Workshops (IPDPSW), Lyon, France, 2022,
pp. 120–127, doi: 10.1109/ipdpsw55747.2022.00029.'
mla: 'Clausing, Lennart, and Marco Platzner. “ReconOS64: A Hardware Operating System
for Modern Platform FPGAs with 64-Bit Support.” 2022 IEEE International Parallel
and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–27,
doi:10.1109/ipdpsw55747.2022.00029.'
short: 'L. Clausing, M. Platzner, in: 2022 IEEE International Parallel and Distributed
Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–127.'
conference:
end_date: 2022-06-03
location: ' Lyon, France'
name: 2022 IEEE International Parallel and Distributed Processing Symposium Workshops
(IPDPSW)
start_date: 2022-05-30
date_created: 2022-08-16T09:58:34Z
date_updated: 2022-11-18T09:36:00Z
department:
- _id: '78'
doi: 10.1109/ipdpsw55747.2022.00029
language:
- iso: eng
page: 120-127
project:
- _id: '83'
name: 'SFB 901 - T1: SFB 901 -Subproject T1'
- _id: '1'
name: 'SFB 901: SFB 901'
- _id: '82'
name: 'SFB 901 - T: SFB 901 - Project Area T'
publication: 2022 IEEE International Parallel and Distributed Processing Symposium
Workshops (IPDPSW)
publication_identifier:
eisbn:
- 978-1-6654-9747-3
publication_status: published
publisher: IEEE
status: public
title: 'ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit
Support'
type: conference
user_id: '477'
year: '2022'
...
---
_id: '33253'
author:
- first_name: Tim
full_name: Hansmeier, Tim
id: '49992'
last_name: Hansmeier
orcid: 0000-0003-1377-3339
- first_name: Mathis
full_name: Brede, Mathis
last_name: Brede
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Hansmeier T, Brede M, Platzner M. XCS on Embedded Systems: An Analysis of
Execution Profiles and Accelerated Classifier Deletion. In: GECCO ’22: Proceedings
of the Genetic and Evolutionary Computation Conference Companion. Association
for Computing Machinery (ACM); 2022:2071-2079. doi:10.1145/3520304.3533977'
apa: 'Hansmeier, T., Brede, M., & Platzner, M. (2022). XCS on Embedded Systems:
An Analysis of Execution Profiles and Accelerated Classifier Deletion. GECCO
’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion,
2071–2079. https://doi.org/10.1145/3520304.3533977'
bibtex: '@inproceedings{Hansmeier_Brede_Platzner_2022, place={New York, NY, United
States}, title={XCS on Embedded Systems: An Analysis of Execution Profiles and
Accelerated Classifier Deletion}, DOI={10.1145/3520304.3533977},
booktitle={GECCO ’22: Proceedings of the Genetic and Evolutionary Computation
Conference Companion}, publisher={Association for Computing Machinery (ACM)},
author={Hansmeier, Tim and Brede, Mathis and Platzner, Marco}, year={2022}, pages={2071–2079}
}'
chicago: 'Hansmeier, Tim, Mathis Brede, and Marco Platzner. “XCS on Embedded Systems:
An Analysis of Execution Profiles and Accelerated Classifier Deletion.” In GECCO
’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion,
2071–79. New York, NY, United States: Association for Computing Machinery (ACM),
2022. https://doi.org/10.1145/3520304.3533977.'
ieee: 'T. Hansmeier, M. Brede, and M. Platzner, “XCS on Embedded Systems: An Analysis
of Execution Profiles and Accelerated Classifier Deletion,” in GECCO ’22: Proceedings
of the Genetic and Evolutionary Computation Conference Companion, Boston,
MA, USA, 2022, pp. 2071–2079, doi: 10.1145/3520304.3533977.'
mla: 'Hansmeier, Tim, et al. “XCS on Embedded Systems: An Analysis of Execution
Profiles and Accelerated Classifier Deletion.” GECCO ’22: Proceedings of the
Genetic and Evolutionary Computation Conference Companion, Association for
Computing Machinery (ACM), 2022, pp. 2071–79, doi:10.1145/3520304.3533977.'
short: 'T. Hansmeier, M. Brede, M. Platzner, in: GECCO ’22: Proceedings of the Genetic
and Evolutionary Computation Conference Companion, Association for Computing Machinery
(ACM), New York, NY, United States, 2022, pp. 2071–2079.'
conference:
end_date: 2022-07-13
location: Boston, MA, USA
name: International Workshop on Learning Classifier Systems (IWLCS 2022)
start_date: 2022-07-09
date_created: 2022-09-02T11:47:17Z
date_updated: 2022-11-18T10:13:22Z
department:
- _id: '78'
doi: 10.1145/3520304.3533977
language:
- iso: eng
page: 2071-2079
place: New York, NY, United States
project:
- _id: '1'
name: 'SFB 901: SFB 901'
- _id: '14'
name: 'SFB 901 - C2: SFB 901 - Subproject C2'
- _id: '4'
name: 'SFB 901 - C: SFB 901 - Project Area C'
publication: 'GECCO ''22: Proceedings of the Genetic and Evolutionary Computation
Conference Companion'
publication_status: published
publisher: Association for Computing Machinery (ACM)
status: public
title: 'XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated
Classifier Deletion'
type: conference
user_id: '477'
year: '2022'
...