@inproceedings{13927,
  author       = {{Lange, C. and Schubert, O. and Hohenleutner, M. and Langer, F. and Baierl, S. and Maag, T. and Urbanek, B. and Edwards, E. R. J. and Woltersdorf, G. and Bougeard, D. and Huttner, U. and Golde, D. and Meier, Torsten and Kira, M. and Koch, S. W. and Huber, R.}},
  booktitle    = {{Nonlinear Frequency Generation and Conversion: Materials, Devices, and Applications XIV}},
  editor       = {{Vodopyanov, Konstantin L.}},
  publisher    = {{SPIE}},
  title        = {{{Sub-cycle control of multi-THz high-harmonic generation and all-coherent charge transport in bulk semiconductors}}},
  doi          = {{10.1117/12.2085101}},
  volume       = {{9347}},
  year         = {{2015}},
}

@inproceedings{13933,
  author       = {{Lange, C. and Schubert, O. and Hohenleutner, M. and Langer, F. and Baierl, S. and Maag, T. and Urbanek, B. and Edwards, E. R. J. and Woltersdorf, G. and Bougeard, D. and Huttner, U. and Golde, D. and Meier, Torsten and Kira, M. and Koch, S. W. and Huber, R.}},
  booktitle    = {{Nonlinear Frequency Generation and Conversion: Materials, Devices, and Applications XIV}},
  editor       = {{Vodopyanov, Konstantin L.}},
  publisher    = {{SPIE}},
  title        = {{{Sub-cycle control of multi-THz high-harmonic generation and all-coherent charge transport in bulk semiconductors}}},
  doi          = {{10.1117/12.2085101}},
  volume       = {{9347}},
  year         = {{2015}},
}

@inproceedings{22949,
  author       = {{Lange, C. and Schubert, O. and Hohenleutner, M. and Langer, F. and Baierl, S. and Maag, T. and Urbanek, B. and Edwards, E. R. J. and Woltersdorf, G. and Bougeard, D. and Huttner, U. and Golde, D. and Meier, Torsten and Kira, M. and Koch, S. W. and Huber, R.}},
  booktitle    = {{Nonlinear Frequency Generation and Conversion: Materials, Devices, and Applications XIV}},
  editor       = {{Vodopyanov, Konstantin L.}},
  publisher    = {{SPIE}},
  title        = {{{Sub-cycle control of multi-THz high-harmonic generation and all-coherent charge transport in bulk semiconductors}}},
  doi          = {{10.1117/12.2085101}},
  volume       = {{9347}},
  year         = {{2015}},
}

@inproceedings{22950,
  author       = {{Podzimski, Reinold and Duc, Huynh T. and Meier, Torsten}},
  booktitle    = {{SPIE Proceedings Vol. 9361: Ultrafast Phenomena and Nanophotonics XIX}},
  editor       = {{Betz, Markus and Elezzabi, Abdulhakem Y. and Tsen, Kong-Thon}},
  publisher    = {{SPIE}},
  title        = {{{Time-domain calculations of shift currents in bulk GaAs}}},
  doi          = {{10.1117/12.2078123}},
  volume       = {{9361}},
  year         = {{2015}},
}

@inproceedings{13934,
  author       = {{Podzimski, Reinold and Duc, Huynh T. and Meier, Torsten}},
  booktitle    = {{Ultrafast Phenomena and Nanophotonics XIX}},
  editor       = {{Betz, Markus and Elezzabi, Abdulhakem Y. and Tsen, Kong-Thon}},
  publisher    = {{SPIE}},
  title        = {{{Time-domain calculations of shift currents in bulk GaAs}}},
  doi          = {{10.1117/12.2078123}},
  volume       = {{9361}},
  year         = {{2015}},
}

@inproceedings{13928,
  author       = {{Podzimski, Reinold and Duc, Huynh T. and Meier, Torsten}},
  booktitle    = {{Ultrafast Phenomena and Nanophotonics XIX}},
  editor       = {{Betz, Markus and Elezzabi, Abdulhakem Y. and Tsen, Kong-Thon}},
  publisher    = {{SPIE}},
  title        = {{{Time-domain calculations of shift currents in bulk GaAs}}},
  doi          = {{10.1117/12.2078123}},
  volume       = {{9361}},
  year         = {{2015}},
}

@inproceedings{22945,
  author       = {{Podzimski, Reinold and Duc, Huynh T. and Meier, Torsten}},
  booktitle    = {{Ultrafast Phenomena and Nanophotonics XIX}},
  editor       = {{Betz, Markus and Elezzabi, Abdulhakem Y. and Tsen, Kong-Thon}},
  publisher    = {{SPIE}},
  title        = {{{Time-domain calculations of shift currents in bulk GaAs}}},
  doi          = {{10.1117/12.2078123}},
  volume       = {{9361}},
  year         = {{2015}},
}

@article{26333,
  author       = {{Sperling, Jan and Bohmann, M. and Vogel, W. and Harder, G. and Brecht, Benjamin and Ansari, V. and Silberhorn, Christine}},
  issn         = {{0031-9007}},
  journal      = {{Physical Review Letters}},
  title        = {{{Uncovering Quantum Correlations with Time-Multiplexed Click Detection}}},
  doi          = {{10.1103/physrevlett.115.023601}},
  year         = {{2015}},
}

@article{21516,
  abstract     = {{This study presents the results of an experimental investigation of the influence of latent
thermal heat storage elements on the power consumption as well as the temperature distribution
of commercial household refrigerators.Two evaporator types and a standard wireand-
tube condenser are equipped with copolymer-bound phase change materials (PCM) and
the performance is determined under standard conditions. The results show that refrigerating
appliances equipped with PCM can be optimized through modifications of the control
strategy to achieve different targets: (a) Power consumption can be significantly reduced
by increasing the evaporator and decreasing the condenser temperature. (b) Temperature
fluctuations in the refrigerator’s fresh-food compartment during the cooling cycle can be
reduced from 4 °C to 0.5 °C. (c) The cooling cycle duration can be tripled without compromising
the fresh-food compartment conditions. The latter may help to meet the growing
demand for balancing power consumption to stabilize the power grid, e.g. if the share of
highly fluctuating, sustainable energy supply is large.}},
  author       = {{Sonnenrein, Gerrit and Baumhögger, Elmar and Elsner, Andreas and Fieback, K. and Morbach, A. and Paul, Andreas and Vrabec, J.}},
  issn         = {{0140-7007}},
  journal      = {{International Journal of Refrigeration}},
  pages        = {{166--173}},
  title        = {{{Copolymer-bound phase change materials for household refrigerating appliances: experimental investigation of power consumption, temperature distribution and demand side management potential}}},
  doi          = {{10.1016/j.ijrefrig.2015.06.030}},
  volume       = {{60}},
  year         = {{2015}},
}

@inproceedings{16133,
  author       = {{Lauter, C. and Wang, Z. and Koke, Isabel and Tröster, Thomas}},
  location     = {{Copenhagen, Denmark}},
  title        = {{{Influences of process parameters on the mechanical properties of hybrid sheet metal-FRP-composites manufactured by prepreg press technology}}},
  year         = {{2015}},
}

@inproceedings{16262,
  author       = {{Bobbert, Mathias and Dammann, C. and Wang, Z. and Zinn, C. and Mahnken, Rolf and Meschut, Gerson and Schaper, Mirko and Tröster, Thomas}},
  location     = {{Stuttgart}},
  title        = {{{Intrinsische Herstellung hybrider Strukturkomponenten in einem modifizierten RTM-Prozess}}},
  year         = {{2015}},
}

@inproceedings{23061,
  author       = {{Lauter, Christian and Wang, Zheng and Koke, Isabel and Tröster, Thomas}},
  booktitle    = {{20th International Conference on Composite Materials, Copenhagen}},
  title        = {{{Influences of process parameters on the mechanical properties of hybrid sheet metal-FRP-composites manufactured by prepreg press technology}}},
  year         = {{2015}},
}

@article{23906,
  abstract     = {{<jats:title>Abstract</jats:title>
               <jats:p>A device and the basic technology has been developed for tensile testing pipe sections samples (tensile testing PSS) for quantitative estimating ultimate tensile and yield stresses in ring samples (PSS samples) cut from pipes. This tensile testing device provides the opportunity for compensating frictional forces during the tensile test, and using exchangeable bearings, the device can be adapted to a wide assortment of pipes. Research has been carried out regarding the shape and size of a stress concentrator introduced into the sample. Relationships have been derived between the shape of the tensile loading curves and the characteristic forces for different types of stress concentrators. It is proposed to use PSS with stress concentrators to prevent plastic deformation in one of the supporting sections (this also allows to correlate the applied forces to one section). The concentrator should be introduced into the tube wall of the sample as a drilled hole. This method is comparatively simple with respect to established testing methods.</jats:p>}},
  author       = {{Andreiev, Anatolii and Golovko, Oleksandr and Frolov, Iaroslav and Nürnberger, Florian and Wolf, Lars Oliver and Schaper, Mirko and Grydin, Olexandr}},
  issn         = {{2195-8572}},
  journal      = {{Materials Testing}},
  pages        = {{643--648}},
  title        = {{{Testing of pipe sections}}},
  doi          = {{10.3139/120.110759}},
  year         = {{2015}},
}

@article{296,
  abstract     = {{FPGAs are known to permit huge gains in performance and efficiency for suitable applications but still require reduced design efforts and shorter development cycles for wider adoption. In this work, we compare the resulting performance of two design concepts that in different ways promise such increased productivity. As common starting point, we employ a kernel-centric design approach, where computational hotspots in an application are identified and individually accelerated on FPGA. By means of a complex stereo matching application, we evaluate two fundamentally different design philosophies and approaches for implementing the required kernels on FPGAs. In the first implementation approach, we designed individually specialized data flow kernels in a spatial programming language for a Maxeler FPGA platform; in the alternative design approach, we target a vector coprocessor with large vector lengths, which is implemented as a form of programmable overlay on the application FPGAs of a Convey HC-1. We assess both approaches in terms of overall system performance, raw kernel performance, and performance relative to invested resources. After compensating for the effects of the underlying hardware platforms, the specialized dataflow kernels on the Maxeler platform are around 3x faster than kernels executing on the Convey vector coprocessor. In our concrete scenario, due to trade-offs between reconfiguration overheads and exposed parallelism, the advantage of specialized dataflow kernels is reduced to around 2.5x.}},
  author       = {{Kenter, Tobias and Schmitz, Henning and Plessl, Christian}},
  journal      = {{International Journal of Reconfigurable Computing (IJRC)}},
  publisher    = {{Hindawi}},
  title        = {{{Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study}}},
  doi          = {{10.1155/2015/859425}},
  volume       = {{2015}},
  year         = {{2015}},
}

@inproceedings{303,
  abstract     = {{This paper introduces Binary Acceleration At Runtime(BAAR), an easy-to-use on-the-fly binary acceleration mechanismwhich aims to tackle the problem of enabling existentsoftware to automatically utilize accelerators at runtime. BAARis based on the LLVM Compiler Infrastructure and has aclient-server architecture. The client runs the program to beaccelerated in an environment which allows program analysisand profiling. Program parts which are identified as suitable forthe available accelerator are exported and sent to the server.The server optimizes these program parts for the acceleratorand provides RPC execution for the client. The client transformsits program to utilize accelerated execution on the server foroffloaded program parts. We evaluate our work with a proofof-concept implementation of BAAR that uses an Intel XeonPhi 5110P as the acceleration target and performs automaticoffloading, parallelization and vectorization of suitable programparts. The practicality of BAAR for real-world examples is shownbased on a study of stencil codes. Our results show a speedup ofup to 4 without any developer-provided hints and 5.77 withhints over the same code compiled with the Intel Compiler atoptimization level O2 and running on an Intel Xeon E5-2670machine. Based on our insights gained during implementationand evaluation we outline future directions of research, e.g.,offloading more fine-granular program parts than functions, amore sophisticated communication mechanism or introducing onstack-replacement.}},
  author       = {{Damschen, Marvin and Plessl, Christian}},
  booktitle    = {{Proceedings of the 5th International Workshop on Adaptive Self-tuning Computing Systems (ADAPT)}},
  title        = {{{Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores}}},
  year         = {{2015}},
}

@inproceedings{1773,
  author       = {{Schumacher, Jörn and T. Anderson, J. and Borga, A. and Boterenbrood, H. and Chen, H. and Chen, K. and Drake, G. and Francis, D. and Gorini, B. and Lanni, F. and Lehmann-Miotto, Giovanna and Levinson, L. and Narevicius, J. and Plessl, Christian and Roich, A. and Ryu, S. and P. Schreuder, F. and Vandelli, Wainer and Vermeulen, J. and Zhang, J.}},
  booktitle    = {{Proc. Int. Conf. on Distributed Event-Based Systems (DEBS)}},
  publisher    = {{ACM}},
  title        = {{{Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm}}},
  doi          = {{10.1145/2675743.2771824}},
  year         = {{2015}},
}

@article{1768,
  author       = {{Plessl, Christian and Platzner, Marco and Schreier, Peter J.}},
  journal      = {{Informatik Spektrum}},
  keywords     = {{approximate computing, survey}},
  number       = {{5}},
  pages        = {{396--399}},
  publisher    = {{Springer}},
  title        = {{{Aktuelles Schlagwort: Approximate Computing}}},
  doi          = {{10.1007/s00287-015-0911-z}},
  year         = {{2015}},
}

@inproceedings{238,
  abstract     = {{In this paper, we study how binary applications can be transparently accelerated with novel heterogeneous computing resources without requiring any manual porting or developer-provided hints. Our work is based on Binary Acceleration At Runtime (BAAR), our previously introduced binary acceleration mechanism that uses the LLVM Compiler Infrastructure. BAAR is designed as a client-server architecture. The client runs the program to be accelerated in an environment, which allows program analysis and profiling and identifies and extracts suitable program parts to be offloaded. The server compiles and optimizes these offloaded program parts for the accelerator and offers access to these functions to the client with a remote procedure call (RPC) interface. Our previous work proved the feasibility of our approach, but also showed that communication time and overheads limit the granularity of functions that can be meaningfully offloaded. In this work, we motivate the importance of a lightweight, high-performance communication between server and client and present a communication mechanism based on the Message Passing Interface (MPI). We evaluate our approach by using an Intel Xeon Phi 5110P as the acceleration target and show that the communication overhead can be reduced from 40% to 10%, thus enabling even small hotspots to benefit from offloading to an accelerator.}},
  author       = {{Damschen, Marvin and Riebler, Heinrich and Vaz, Gavin Francis and Plessl, Christian}},
  booktitle    = {{Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE)}},
  pages        = {{1078--1083}},
  publisher    = {{EDA Consortium / IEEE}},
  title        = {{{Transparent offloading of computational hotspots from binary code to Xeon Phi}}},
  doi          = {{10.7873/DATE.2015.1124}},
  year         = {{2015}},
}

@article{1775,
  abstract     = {{The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will replace existing links used for readout, detector control and distribution of timing and trigger information. A new class of devices will be needed to interface many GBT links to the rest of the trigger, data-acquisition and detector control systems. In this paper FELIX (Front End LInk eXchange) is presented, a PC-based device to route data from and to multiple GBT links via a high-performance general purpose network capable of a total throughput up to O(20 Tbps). FELIX implies architectural changes to the ATLAS data acquisition system, such as the use of industry standard COTS components early in the DAQ chain. Additionally the design and implementation of a FELIX demonstration platform is presented and hardware and software aspects will be discussed.}},
  author       = {{Anderson, J and Borga, A and Boterenbrood, H and Chen, H and Chen, K and Drake, G and Francis, D and Gorini, B and Lanni, F and Lehmann Miotto, G and Levinson, L and Narevicius, J and Plessl, Christian and Roich, A and Ryu, S and Schreuder, F and Schumacher, Jörn and Vandelli, Wainer and Vermeulen, J and Zhang, J}},
  journal      = {{Journal of Physics: Conference Series}},
  publisher    = {{IOP Publishing}},
  title        = {{{FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades}}},
  doi          = {{10.1088/1742-6596/664/8/082050}},
  volume       = {{664}},
  year         = {{2015}},
}

@article{63735,
  author       = {{Kaczmarek, Krzysztof T. and Saunders, Dylan J. and Sprague, Michael R. and Kolthammer, W. Steven and Feizpour, Amir and Ledingham, Patrick M. and Brecht, Benjamin and Poem, Eilon and Walmsley, Ian A. and Nunn, Joshua}},
  issn         = {{0146-9592}},
  journal      = {{Optics Letters}},
  number       = {{23}},
  publisher    = {{Optica Publishing Group}},
  title        = {{{Ultrahigh and persistent optical depths of cesium in Kagomé-type hollow-core photonic crystal fibers}}},
  doi          = {{10.1364/ol.40.005582}},
  volume       = {{40}},
  year         = {{2015}},
}

