---
_id: '1787'
author:
- first_name: Tim
  full_name: Suess, Tim
  last_name: Suess
- first_name: Andrew
  full_name: Schoenrock, Andrew
  last_name: Schoenrock
- first_name: Sebastian
  full_name: Meisner, Sebastian
  last_name: Meisner
- first_name: Christian
  full_name: Plessl, Christian
  id: '16153'
  last_name: Plessl
  orcid: 0000-0001-5728-9982
citation:
  ama: 'Suess T, Schoenrock A, Meisner S, Plessl C. Parallel Macro Pipelining on the
    Intel SCC Many-Core Computer. In: <i>Proc. Int. Symp. on Parallel and Distributed
    Processing Workshops (IPDPSW)</i>. IEEE Computer Society; 2013:64-73. doi:<a href="https://doi.org/10.1109/IPDPSW.2013.136">10.1109/IPDPSW.2013.136</a>'
  apa: Suess, T., Schoenrock, A., Meisner, S., &#38; Plessl, C. (2013). Parallel Macro
    Pipelining on the Intel SCC Many-Core Computer. <i>Proc. Int. Symp. on Parallel
    and Distributed Processing Workshops (IPDPSW)</i>, 64–73. <a href="https://doi.org/10.1109/IPDPSW.2013.136">https://doi.org/10.1109/IPDPSW.2013.136</a>
  bibtex: '@inproceedings{Suess_Schoenrock_Meisner_Plessl_2013, place={Washington,
    DC, USA}, title={Parallel Macro Pipelining on the Intel SCC Many-Core Computer},
    DOI={<a href="https://doi.org/10.1109/IPDPSW.2013.136">10.1109/IPDPSW.2013.136</a>},
    booktitle={Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)},
    publisher={IEEE Computer Society}, author={Suess, Tim and Schoenrock, Andrew and
    Meisner, Sebastian and Plessl, Christian}, year={2013}, pages={64–73} }'
  chicago: 'Suess, Tim, Andrew Schoenrock, Sebastian Meisner, and Christian Plessl.
    “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” In <i>Proc. Int.
    Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>, 64–73. Washington,
    DC, USA: IEEE Computer Society, 2013. <a href="https://doi.org/10.1109/IPDPSW.2013.136">https://doi.org/10.1109/IPDPSW.2013.136</a>.'
  ieee: 'T. Suess, A. Schoenrock, S. Meisner, and C. Plessl, “Parallel Macro Pipelining
    on the Intel SCC Many-Core Computer,” in <i>Proc. Int. Symp. on Parallel and Distributed
    Processing Workshops (IPDPSW)</i>, 2013, pp. 64–73, doi: <a href="https://doi.org/10.1109/IPDPSW.2013.136">10.1109/IPDPSW.2013.136</a>.'
  mla: Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.”
    <i>Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)</i>,
    IEEE Computer Society, 2013, pp. 64–73, doi:<a href="https://doi.org/10.1109/IPDPSW.2013.136">10.1109/IPDPSW.2013.136</a>.
  short: 'T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on
    Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society,
    Washington, DC, USA, 2013, pp. 64–73.'
date_created: 2018-03-26T14:51:05Z
date_updated: 2023-09-26T13:38:05Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
- _id: '63'
doi: 10.1109/IPDPSW.2013.136
language:
- iso: eng
page: 64-73
place: Washington, DC, USA
project:
- _id: '30'
  grant_number: 01|H11004A
  name: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling
    Models
publication: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW)
publication_identifier:
  isbn:
  - 978-0-7695-4979-8
publisher: IEEE Computer Society
quality_controlled: '1'
status: public
title: Parallel Macro Pipelining on the Intel SCC Many-Core Computer
type: conference
user_id: '15278'
year: '2013'
...