---
_id: '2200'
author:
- first_name: Tobias
  full_name: Kenter, Tobias
  id: '3145'
  last_name: Kenter
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
- first_name: Christian
  full_name: Plessl, Christian
  id: '16153'
  last_name: Plessl
  orcid: 0000-0001-5728-9982
- first_name: Michael
  full_name: Kauschke, Michael
  last_name: Kauschke
citation:
  ama: 'Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework
    for Automated Exploration of CPU-Accelerator Architectures. In: <i>Proc. Int.
    Symp. on Field-Programmable Gate Arrays (FPGA)</i>. ACM; 2011:177-180. doi:<a
    href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>'
  apa: Kenter, T., Platzner, M., Plessl, C., &#38; Kauschke, M. (2011). Performance
    Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.
    <i>Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)</i>, 177–180. <a
    href="https://doi.org/10.1145/1950413.1950448">https://doi.org/10.1145/1950413.1950448</a>
  bibtex: '@inproceedings{Kenter_Platzner_Plessl_Kauschke_2011, place={New York, NY,
    USA}, title={Performance Estimation Framework for Automated Exploration of CPU-Accelerator
    Architectures}, DOI={<a href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>},
    booktitle={Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)}, publisher={ACM},
    author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke,
    Michael}, year={2011}, pages={177–180} }'
  chicago: 'Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke.
    “Performance Estimation Framework for Automated Exploration of CPU-Accelerator
    Architectures.” In <i>Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)</i>,
    177–80. New York, NY, USA: ACM, 2011. <a href="https://doi.org/10.1145/1950413.1950448">https://doi.org/10.1145/1950413.1950448</a>.'
  ieee: 'T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation
    Framework for Automated Exploration of CPU-Accelerator Architectures,” in <i>Proc.
    Int. Symp. on Field-Programmable Gate Arrays (FPGA)</i>, 2011, pp. 177–180, doi:
    <a href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>.'
  mla: Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration
    of CPU-Accelerator Architectures.” <i>Proc. Int. Symp. on Field-Programmable Gate
    Arrays (FPGA)</i>, ACM, 2011, pp. 177–80, doi:<a href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>.
  short: 'T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on
    Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.'
date_created: 2018-04-03T15:08:13Z
date_updated: 2023-09-26T13:45:04Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1145/1950413.1950448
keyword:
- design space exploration
- LLVM
- partitioning
- performance
- estimation
- funding-intel
language:
- iso: eng
page: 177-180
place: New York, NY, USA
publication: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)
publication_identifier:
  isbn:
  - 978-1-4503-0554-9
publisher: ACM
quality_controlled: '1'
status: public
title: Performance Estimation Framework for Automated Exploration of CPU-Accelerator
  Architectures
type: conference
user_id: '15278'
year: '2011'
...