[{"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"user_id":"15278","_id":"2108","language":[{"iso":"eng"}],"keyword":["funding-altera"],"publication":"Microprocessors and Microsystems","type":"journal_article","status":"public","volume":36,"date_created":"2018-03-29T15:12:38Z","author":[{"last_name":"Schumacher","full_name":"Schumacher, Tobias","first_name":"Tobias"},{"orcid":"0000-0001-5728-9982","last_name":"Plessl","id":"16153","full_name":"Plessl, Christian","first_name":"Christian"},{"first_name":"Marco","last_name":"Platzner","id":"398","full_name":"Platzner, Marco"}],"date_updated":"2023-09-26T13:39:30Z","doi":"10.1016/j.micpro.2011.04.002","title":"IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators","issue":"2","publication_identifier":{"issn":["0141-9331"]},"quality_controlled":"1","intvolume":"        36","page":"110-126","citation":{"mla":"Schumacher, Tobias, et al. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.” <i>Microprocessors and Microsystems</i>, vol. 36, no. 2, 2012, pp. 110–26, doi:<a href=\"https://doi.org/10.1016/j.micpro.2011.04.002\">10.1016/j.micpro.2011.04.002</a>.","bibtex":"@article{Schumacher_Plessl_Platzner_2012, title={IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators}, volume={36}, DOI={<a href=\"https://doi.org/10.1016/j.micpro.2011.04.002\">10.1016/j.micpro.2011.04.002</a>}, number={2}, journal={Microprocessors and Microsystems}, author={Schumacher, Tobias and Plessl, Christian and Platzner, Marco}, year={2012}, pages={110–126} }","short":"T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.","apa":"Schumacher, T., Plessl, C., &#38; Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. <i>Microprocessors and Microsystems</i>, <i>36</i>(2), 110–126. <a href=\"https://doi.org/10.1016/j.micpro.2011.04.002\">https://doi.org/10.1016/j.micpro.2011.04.002</a>","ama":"Schumacher T, Plessl C, Platzner M. IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. <i>Microprocessors and Microsystems</i>. 2012;36(2):110-126. doi:<a href=\"https://doi.org/10.1016/j.micpro.2011.04.002\">10.1016/j.micpro.2011.04.002</a>","chicago":"Schumacher, Tobias, Christian Plessl, and Marco Platzner. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.” <i>Microprocessors and Microsystems</i> 36, no. 2 (2012): 110–26. <a href=\"https://doi.org/10.1016/j.micpro.2011.04.002\">https://doi.org/10.1016/j.micpro.2011.04.002</a>.","ieee":"T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” <i>Microprocessors and Microsystems</i>, vol. 36, no. 2, pp. 110–126, 2012, doi: <a href=\"https://doi.org/10.1016/j.micpro.2011.04.002\">10.1016/j.micpro.2011.04.002</a>."},"year":"2012"}]