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Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>. 2022;42(8):2527-2539. doi:<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>","bibtex":"@article{Hölscher_Hakert_Nassar_Chen_Bauer_Chen_Henkel_2022, title={Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory}, volume={42}, DOI={<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>}, number={8}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Hölscher, Nils and Hakert, Christian and Nassar, Hassan and Chen, Kuan-Hsun and Bauer, Lars and Chen, Jian-Jia and Henkel, Jörg}, year={2022}, pages={2527–2539} }","mla":"Hölscher, Nils, et al. “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 42, no. 8, Institute of Electrical and Electronics Engineers (IEEE), 2022, pp. 2527–39, doi:<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>.","chicago":"Hölscher, Nils, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel. “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i> 42, no. 8 (2022): 2527–39. <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">https://doi.org/10.1109/tcad.2022.3228897</a>.","short":"N. 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(2022). Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, <i>41</i>(11), 4157–4168. <a href=\"https://doi.org/10.1109/tcad.2022.3197501\">https://doi.org/10.1109/tcad.2022.3197501</a>","ieee":"J. Shi, C.-C. von Egidy, K.-H. Chen, and J.-J. Chen, “Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS,” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 41, no. 11, pp. 4157–4168, 2022, doi: <a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>.","short":"J. Shi, C.-C. von Egidy, K.-H. Chen, J.-J. Chen, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 (2022) 4157–4168.","chicago":"Shi, Junjie, Christoph-Cordt von Egidy, Kuan-Hsun Chen, and Jian-Jia Chen. “Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i> 41, no. 11 (2022): 4157–68. <a href=\"https://doi.org/10.1109/tcad.2022.3197501\">https://doi.org/10.1109/tcad.2022.3197501</a>.","mla":"Shi, Junjie, et al. “Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 41, no. 11, Institute of Electrical and Electronics Engineers (IEEE), 2022, pp. 4157–68, doi:<a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>.","ama":"Shi J, von Egidy C-C, Chen K-H, Chen J-J. Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>. 2022;41(11):4157-4168. doi:<a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>","bibtex":"@article{Shi_von Egidy_Chen_Chen_2022, title={Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS}, volume={41}, DOI={<a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>}, number={11}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Shi, Junjie and von Egidy, Christoph-Cordt and Chen, Kuan-Hsun and Chen, Jian-Jia}, year={2022}, pages={4157–4168} }"},"page":"4157-4168","_id":"66201","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","doi":"10.1109/tcad.2022.3197501","user_id":"128464","volume":41,"title":"Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS","year":"2022","status":"public","author":[{"last_name":"Shi","first_name":"Junjie","full_name":"Shi, Junjie"},{"full_name":"von Egidy, Christoph-Cordt","first_name":"Christoph-Cordt","last_name":"von Egidy"},{"first_name":"Kuan-Hsun","last_name":"Chen","full_name":"Chen, Kuan-Hsun"},{"last_name":"Chen","first_name":"Jian-Jia","full_name":"Chen, Jian-Jia"}],"publication_identifier":{"issn":["0278-0070","1937-4151"]},"date_updated":"2026-07-05T14:45:33Z","publication_status":"published","intvolume":"        41"}]