---
_id: '66181'
author:
- first_name: Nils
  full_name: Hölscher, Nils
  last_name: Hölscher
- first_name: Christian
  full_name: Hakert, Christian
  last_name: Hakert
- first_name: Hassan
  full_name: Nassar, Hassan
  last_name: Nassar
- first_name: Kuan-Hsun
  full_name: Chen, Kuan-Hsun
  last_name: Chen
- first_name: Lars
  full_name: Bauer, Lars
  last_name: Bauer
- first_name: Jian-Jia
  full_name: Chen, Jian-Jia
  last_name: Chen
- first_name: Jörg
  full_name: Henkel, Jörg
  last_name: Henkel
citation:
  ama: 'Hölscher N, Hakert C, Nassar H, et al. Memory Carousel: LLVM-Based Bitwise
    Wear Leveling for Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided
    Design of Integrated Circuits and Systems</i>. 2022;42(8):2527-2539. doi:<a href="https://doi.org/10.1109/tcad.2022.3228897">10.1109/tcad.2022.3228897</a>'
  apa: 'Hölscher, N., Hakert, C., Nassar, H., Chen, K.-H., Bauer, L., Chen, J.-J.,
    &#38; Henkel, J. (2022). Memory Carousel: LLVM-Based Bitwise Wear Leveling for
    Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided Design of Integrated
    Circuits and Systems</i>, <i>42</i>(8), 2527–2539. <a href="https://doi.org/10.1109/tcad.2022.3228897">https://doi.org/10.1109/tcad.2022.3228897</a>'
  bibtex: '@article{Hölscher_Hakert_Nassar_Chen_Bauer_Chen_Henkel_2022, title={Memory
    Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory}, volume={42},
    DOI={<a href="https://doi.org/10.1109/tcad.2022.3228897">10.1109/tcad.2022.3228897</a>},
    number={8}, journal={IEEE Transactions on Computer-Aided Design of Integrated
    Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers
    (IEEE)}, author={Hölscher, Nils and Hakert, Christian and Nassar, Hassan and Chen,
    Kuan-Hsun and Bauer, Lars and Chen, Jian-Jia and Henkel, Jörg}, year={2022}, pages={2527–2539}
    }'
  chicago: 'Hölscher, Nils, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars
    Bauer, Jian-Jia Chen, and Jörg Henkel. “Memory Carousel: LLVM-Based Bitwise Wear
    Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided
    Design of Integrated Circuits and Systems</i> 42, no. 8 (2022): 2527–39. <a href="https://doi.org/10.1109/tcad.2022.3228897">https://doi.org/10.1109/tcad.2022.3228897</a>.'
  ieee: 'N. Hölscher <i>et al.</i>, “Memory Carousel: LLVM-Based Bitwise Wear Leveling
    for Nonvolatile Main Memory,” <i>IEEE Transactions on Computer-Aided Design of
    Integrated Circuits and Systems</i>, vol. 42, no. 8, pp. 2527–2539, 2022, doi:
    <a href="https://doi.org/10.1109/tcad.2022.3228897">10.1109/tcad.2022.3228897</a>.'
  mla: 'Hölscher, Nils, et al. “Memory Carousel: LLVM-Based Bitwise Wear Leveling
    for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of
    Integrated Circuits and Systems</i>, vol. 42, no. 8, Institute of Electrical and
    Electronics Engineers (IEEE), 2022, pp. 2527–39, doi:<a href="https://doi.org/10.1109/tcad.2022.3228897">10.1109/tcad.2022.3228897</a>.'
  short: N. Hölscher, C. Hakert, H. Nassar, K.-H. Chen, L. Bauer, J.-J. Chen, J. Henkel,
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    42 (2022) 2527–2539.
date_created: 2026-07-03T21:13:49Z
date_updated: 2026-07-05T14:46:44Z
doi: 10.1109/tcad.2022.3228897
intvolume: '        42'
issue: '8'
page: 2527-2539
publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and
  Systems
publication_identifier:
  issn:
  - 0278-0070
  - 1937-4151
publication_status: published
publisher: Institute of Electrical and Electronics Engineers (IEEE)
status: public
title: 'Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory'
type: journal_article
user_id: '128464'
volume: 42
year: '2022'
...
---
_id: '66201'
author:
- first_name: Junjie
  full_name: Shi, Junjie
  last_name: Shi
- first_name: Christoph-Cordt
  full_name: von Egidy, Christoph-Cordt
  last_name: von Egidy
- first_name: Kuan-Hsun
  full_name: Chen, Kuan-Hsun
  last_name: Chen
- first_name: Jian-Jia
  full_name: Chen, Jian-Jia
  last_name: Chen
citation:
  ama: 'Shi J, von Egidy C-C, Chen K-H, Chen J-J. Formal Verification of Resource
    Synchronization Protocol Implementations: A Case Study in RTEMS. <i>IEEE Transactions
    on Computer-Aided Design of Integrated Circuits and Systems</i>. 2022;41(11):4157-4168.
    doi:<a href="https://doi.org/10.1109/tcad.2022.3197501">10.1109/tcad.2022.3197501</a>'
  apa: 'Shi, J., von Egidy, C.-C., Chen, K.-H., &#38; Chen, J.-J. (2022). Formal Verification
    of Resource Synchronization Protocol Implementations: A Case Study in RTEMS. <i>IEEE
    Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>,
    <i>41</i>(11), 4157–4168. <a href="https://doi.org/10.1109/tcad.2022.3197501">https://doi.org/10.1109/tcad.2022.3197501</a>'
  bibtex: '@article{Shi_von Egidy_Chen_Chen_2022, title={Formal Verification of Resource
    Synchronization Protocol Implementations: A Case Study in RTEMS}, volume={41},
    DOI={<a href="https://doi.org/10.1109/tcad.2022.3197501">10.1109/tcad.2022.3197501</a>},
    number={11}, journal={IEEE Transactions on Computer-Aided Design of Integrated
    Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers
    (IEEE)}, author={Shi, Junjie and von Egidy, Christoph-Cordt and Chen, Kuan-Hsun
    and Chen, Jian-Jia}, year={2022}, pages={4157–4168} }'
  chicago: 'Shi, Junjie, Christoph-Cordt von Egidy, Kuan-Hsun Chen, and Jian-Jia Chen.
    “Formal Verification of Resource Synchronization Protocol Implementations: A Case
    Study in RTEMS.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits
    and Systems</i> 41, no. 11 (2022): 4157–68. <a href="https://doi.org/10.1109/tcad.2022.3197501">https://doi.org/10.1109/tcad.2022.3197501</a>.'
  ieee: 'J. Shi, C.-C. von Egidy, K.-H. Chen, and J.-J. Chen, “Formal Verification
    of Resource Synchronization Protocol Implementations: A Case Study in RTEMS,”
    <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>,
    vol. 41, no. 11, pp. 4157–4168, 2022, doi: <a href="https://doi.org/10.1109/tcad.2022.3197501">10.1109/tcad.2022.3197501</a>.'
  mla: 'Shi, Junjie, et al. “Formal Verification of Resource Synchronization Protocol
    Implementations: A Case Study in RTEMS.” <i>IEEE Transactions on Computer-Aided
    Design of Integrated Circuits and Systems</i>, vol. 41, no. 11, Institute of Electrical
    and Electronics Engineers (IEEE), 2022, pp. 4157–68, doi:<a href="https://doi.org/10.1109/tcad.2022.3197501">10.1109/tcad.2022.3197501</a>.'
  short: J. Shi, C.-C. von Egidy, K.-H. Chen, J.-J. Chen, IEEE Transactions on Computer-Aided
    Design of Integrated Circuits and Systems 41 (2022) 4157–4168.
date_created: 2026-07-03T21:17:18Z
date_updated: 2026-07-05T14:45:33Z
doi: 10.1109/tcad.2022.3197501
intvolume: '        41'
issue: '11'
page: 4157-4168
publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and
  Systems
publication_identifier:
  issn:
  - 0278-0070
  - 1937-4151
publication_status: published
publisher: Institute of Electrical and Electronics Engineers (IEEE)
status: public
title: 'Formal Verification of Resource Synchronization Protocol Implementations:
  A Case Study in RTEMS'
type: journal_article
user_id: '128464'
volume: 41
year: '2022'
...