---
_id: '30907'
author:
- first_name: Alfonso
  full_name: Rodriguez, Alfonso
  last_name: Rodriguez
- first_name: Andres
  full_name: Otero, Andres
  last_name: Otero
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
- first_name: Eduardo
  full_name: De la Torre, Eduardo
  last_name: De la Torre
citation:
  ama: Rodriguez A, Otero A, Platzner M, De la Torre E. Exploiting Hardware-Based
    Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable
    FPGAs. <i>IEEE Transactions on Computers</i>. Published online 2021:1-1. doi:<a
    href="https://doi.org/10.1109/tc.2021.3107196">10.1109/tc.2021.3107196</a>
  apa: Rodriguez, A., Otero, A., Platzner, M., &#38; De la Torre, E. (2021). Exploiting
    Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing
    in Reconfigurable FPGAs. <i>IEEE Transactions on Computers</i>, 1–1. <a href="https://doi.org/10.1109/tc.2021.3107196">https://doi.org/10.1109/tc.2021.3107196</a>
  bibtex: '@article{Rodriguez_Otero_Platzner_De la Torre_2021, title={Exploiting Hardware-Based
    Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable
    FPGAs}, DOI={<a href="https://doi.org/10.1109/tc.2021.3107196">10.1109/tc.2021.3107196</a>},
    journal={IEEE Transactions on Computers}, publisher={Institute of Electrical and
    Electronics Engineers (IEEE)}, author={Rodriguez, Alfonso and Otero, Andres and
    Platzner, Marco and De la Torre, Eduardo}, year={2021}, pages={1–1} }'
  chicago: Rodriguez, Alfonso, Andres Otero, Marco Platzner, and Eduardo De la Torre.
    “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge
    Computing in Reconfigurable FPGAs.” <i>IEEE Transactions on Computers</i>, 2021,
    1–1. <a href="https://doi.org/10.1109/tc.2021.3107196">https://doi.org/10.1109/tc.2021.3107196</a>.
  ieee: 'A. Rodriguez, A. Otero, M. Platzner, and E. De la Torre, “Exploiting Hardware-Based
    Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable
    FPGAs,” <i>IEEE Transactions on Computers</i>, pp. 1–1, 2021, doi: <a href="https://doi.org/10.1109/tc.2021.3107196">10.1109/tc.2021.3107196</a>.'
  mla: Rodriguez, Alfonso, et al. “Exploiting Hardware-Based Data-Parallel and Multithreading
    Models for Smart Edge Computing in Reconfigurable FPGAs.” <i>IEEE Transactions
    on Computers</i>, Institute of Electrical and Electronics Engineers (IEEE), 2021,
    pp. 1–1, doi:<a href="https://doi.org/10.1109/tc.2021.3107196">10.1109/tc.2021.3107196</a>.
  short: A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on
    Computers (2021) 1–1.
date_created: 2022-04-18T10:03:16Z
date_updated: 2022-04-18T10:04:21Z
department:
- _id: '78'
doi: 10.1109/tc.2021.3107196
keyword:
- Computational Theory and Mathematics
- Hardware and Architecture
- Theoretical Computer Science
- Software
language:
- iso: eng
page: 1-1
publication: IEEE Transactions on Computers
publication_identifier:
  issn:
  - 0018-9340
  - 1557-9956
  - 2326-3814
publication_status: published
publisher: Institute of Electrical and Electronics Engineers (IEEE)
status: public
title: Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart
  Edge Computing in Reconfigurable FPGAs
type: journal_article
user_id: '398'
year: '2021'
...