[{"language":[{"iso":"eng"}],"doi":"10.1142/s0218126619400012","date_updated":"2022-01-06T07:03:58Z","publication_identifier":{"issn":["0218-1266","1793-6454"]},"publication_status":"published","project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"department":[{"_id":"48"}],"title":"Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test","page":"1-23","type":"journal_article","citation":{"ieee":"A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, vol. 28, no. 1, pp. 1–23, 2019.","short":"A. Sprenger, S. Hellebrand, Journal of Circuits, Systems and Computers 28 (2019) 1–23.","mla":"Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, vol. 28, no. 1, World Scientific Publishing Company, 2019, pp. 1–23, doi:10.1142/s0218126619400012.","bibtex":"@article{Sprenger_Hellebrand_2019, title={Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test}, volume={28}, DOI={10.1142/s0218126619400012}, number={1}, journal={Journal of Circuits, Systems and Computers}, publisher={World Scientific Publishing Company}, author={Sprenger, Alexander and Hellebrand, Sybille}, year={2019}, pages={1–23} }","chicago":"Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers 28, no. 1 (2019): 1–23. https://doi.org/10.1142/s0218126619400012.","apa":"Sprenger, A., & Hellebrand, S. (2019). Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers, 28(1), 1–23. https://doi.org/10.1142/s0218126619400012","ama":"Sprenger A, Hellebrand S. Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test. Journal of Circuits, Systems and Computers. 2019;28(1):1-23. doi:10.1142/s0218126619400012"},"year":"2019","issue":"1","_id":"8667","intvolume":" 28","volume":28,"date_created":"2019-03-27T08:57:42Z","status":"public","publication":"Journal of Circuits, Systems and Computers","author":[{"last_name":"Sprenger","id":"22707","first_name":"Alexander","full_name":"Sprenger, Alexander"},{"full_name":"Hellebrand, Sybille","orcid":"0000-0002-3717-3939","first_name":"Sybille","id":"209","last_name":"Hellebrand"}],"publisher":"World Scientific Publishing Company","user_id":"59789"}]