[{"intvolume":"        42","publication_status":"published","date_updated":"2026-07-05T14:46:44Z","publication_identifier":{"issn":["0278-0070","1937-4151"]},"author":[{"first_name":"Nils","last_name":"Hölscher","full_name":"Hölscher, Nils"},{"first_name":"Christian","last_name":"Hakert","full_name":"Hakert, Christian"},{"full_name":"Nassar, Hassan","first_name":"Hassan","last_name":"Nassar"},{"first_name":"Kuan-Hsun","last_name":"Chen","full_name":"Chen, Kuan-Hsun"},{"last_name":"Bauer","first_name":"Lars","full_name":"Bauer, Lars"},{"last_name":"Chen","first_name":"Jian-Jia","full_name":"Chen, Jian-Jia"},{"last_name":"Henkel","first_name":"Jörg","full_name":"Henkel, Jörg"}],"year":"2022","status":"public","title":"Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory","volume":42,"user_id":"128464","doi":"10.1109/tcad.2022.3228897","_id":"66181","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","page":"2527-2539","citation":{"apa":"Hölscher, N., Hakert, C., Nassar, H., Chen, K.-H., Bauer, L., Chen, J.-J., &#38; Henkel, J. (2022). Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, <i>42</i>(8), 2527–2539. <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">https://doi.org/10.1109/tcad.2022.3228897</a>","ieee":"N. Hölscher <i>et al.</i>, “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory,” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 42, no. 8, pp. 2527–2539, 2022, doi: <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>.","chicago":"Hölscher, Nils, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel. “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i> 42, no. 8 (2022): 2527–39. <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">https://doi.org/10.1109/tcad.2022.3228897</a>.","short":"N. Hölscher, C. Hakert, H. Nassar, K.-H. Chen, L. Bauer, J.-J. Chen, J. Henkel, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 42 (2022) 2527–2539.","mla":"Hölscher, Nils, et al. “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 42, no. 8, Institute of Electrical and Electronics Engineers (IEEE), 2022, pp. 2527–39, doi:<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>.","ama":"Hölscher N, Hakert C, Nassar H, et al. Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>. 2022;42(8):2527-2539. doi:<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>","bibtex":"@article{Hölscher_Hakert_Nassar_Chen_Bauer_Chen_Henkel_2022, title={Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory}, volume={42}, DOI={<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>}, number={8}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Hölscher, Nils and Hakert, Christian and Nassar, Hassan and Chen, Kuan-Hsun and Bauer, Lars and Chen, Jian-Jia and Henkel, Jörg}, year={2022}, pages={2527–2539} }"},"issue":"8","publication":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","type":"journal_article","date_created":"2026-07-03T21:13:49Z"},{"author":[{"first_name":"Junjie","last_name":"Shi","full_name":"Shi, Junjie"},{"full_name":"von Egidy, Christoph-Cordt","last_name":"von Egidy","first_name":"Christoph-Cordt"},{"full_name":"Chen, Kuan-Hsun","last_name":"Chen","first_name":"Kuan-Hsun"},{"full_name":"Chen, Jian-Jia","first_name":"Jian-Jia","last_name":"Chen"}],"publication_identifier":{"issn":["0278-0070","1937-4151"]},"year":"2022","status":"public","title":"Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS","intvolume":"        41","publication_status":"published","date_updated":"2026-07-05T14:45:33Z","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","_id":"66201","page":"4157-4168","volume":41,"user_id":"128464","doi":"10.1109/tcad.2022.3197501","citation":{"ieee":"J. Shi, C.-C. von Egidy, K.-H. Chen, and J.-J. Chen, “Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS,” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 41, no. 11, pp. 4157–4168, 2022, doi: <a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>.","apa":"Shi, J., von Egidy, C.-C., Chen, K.-H., &#38; Chen, J.-J. (2022). Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, <i>41</i>(11), 4157–4168. <a href=\"https://doi.org/10.1109/tcad.2022.3197501\">https://doi.org/10.1109/tcad.2022.3197501</a>","chicago":"Shi, Junjie, Christoph-Cordt von Egidy, Kuan-Hsun Chen, and Jian-Jia Chen. “Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i> 41, no. 11 (2022): 4157–68. <a href=\"https://doi.org/10.1109/tcad.2022.3197501\">https://doi.org/10.1109/tcad.2022.3197501</a>.","short":"J. Shi, C.-C. von Egidy, K.-H. Chen, J.-J. Chen, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 (2022) 4157–4168.","mla":"Shi, Junjie, et al. “Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 41, no. 11, Institute of Electrical and Electronics Engineers (IEEE), 2022, pp. 4157–68, doi:<a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>.","bibtex":"@article{Shi_von Egidy_Chen_Chen_2022, title={Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS}, volume={41}, DOI={<a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>}, number={11}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Shi, Junjie and von Egidy, Christoph-Cordt and Chen, Kuan-Hsun and Chen, Jian-Jia}, year={2022}, pages={4157–4168} }","ama":"Shi J, von Egidy C-C, Chen K-H, Chen J-J. Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>. 2022;41(11):4157-4168. doi:<a href=\"https://doi.org/10.1109/tcad.2022.3197501\">10.1109/tcad.2022.3197501</a>"},"issue":"11","publication":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","date_created":"2026-07-03T21:17:18Z","type":"journal_article"}]