@article{16422,
  abstract     = {{<jats:p>Intel recently introduced the Heterogeneous Architecture Research Platform, HARP. In this platform, the Central Processing Unit and a Field-Programmable Gate Array are connected through a high-bandwidth, low-latency interconnect and both share DRAM memory. For this platform, Open Computing Language (OpenCL), a High-Level Synthesis (HLS) language, is made available. By making use of HLS, a faster design cycle can be achieved compared to programming in a traditional hardware description language. This, however, comes at the cost of having less control over the hardware implementation. We will investigate how OpenCL can be applied to implement a real-time guided image filter on the HARP platform. In the first phase, the performance-critical parameters of the OpenCL programming model are defined using several specialized benchmarks. In a second phase, the guided image filter algorithm is implemented using the insights gained in the first phase. Both a floating-point and a fixed-point implementation were developed for this algorithm, based on a sliding window implementation. This resulted in a maximum floating-point performance of 135 GFLOPS, a maximum fixed-point performance of 430 GOPS and a throughput of HD color images at 74 frames per second.</jats:p>}},
  author       = {{Faict, Thomas and D’Hollander, Erik H. and Goossens, Bart}},
  issn         = {{1999-4893}},
  journal      = {{Algorithms}},
  keywords     = {{pc2-harp-ressources}},
  title        = {{{Mapping a Guided Image Filter on the HARP Reconfigurable Architecture Using OpenCL}}},
  doi          = {{10.3390/a12080149}},
  year         = {{2019}},
}