@article{62184,
  abstract     = {{<jats:p>While reservoir computing (RC) networks offer advantages over traditional recurrent neural net- works in terms of training time and operational cost for time-series applications, deploying them on edge devices still presents significant challenges due to re- source constraints. Network compression, i.e., pruning and quantization, are thus of utmost importance. We propose a Compressed Reservoir Computing (CRC) framework that integrates advanced pruning and quantization techniques to optimize throughput, latency, energy efficiency, and resource utilization for FPGA- based RC accelerators.We describe the framework with a focus on HSIC LASSO as a novel pruning method that can capture non-linear dependencies between neurons. We validate our framework with time series classification and regression tasks, for which we generate FPGA accelerators. The accelerators achieve a very high throughput of up to 188 Megasamples/s with a latency of 5.32 ns, while reducing resource utilization by 12× and lowering the energy by 10× compared to a baseline hardware implementation, without compromising accuracy.</jats:p>}},
  author       = {{Jafari, Atousa and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}},
  issn         = {{2980-7298}},
  journal      = {{WiPiEC Journal - Works in Progress in Embedded Computing Journal}},
  number       = {{1}},
  publisher    = {{MECOnet}},
  title        = {{{CRC: Compressed Reservoir Computing on FPGA via Joint HSIC LASSO-based Pruning and Quantization}}},
  doi          = {{10.64552/wipiec.v11i1.99}},
  volume       = {{11}},
  year         = {{2025}},
}