@inproceedings{63890,
  abstract     = {{The computation of highly contracted electron repulsion integrals (ERIs) is essential to achieve quantum accuracy in atomistic simulations based on quantum mechanics. Its growing computational demands make energy efficiency a critical concern. Recent studies demonstrate FPGAs’ superior performance and energy efficiency for computing primitive ERIs, but the computation of highly contracted ERIs introduces significant algorithmic complexity and new design challenges for FPGA acceleration.In this work, we present SORCERI, the first streaming overlay acceleration for highly contracted ERI computations on FPGAs. SORCERI introduces a novel streaming Rys computing unit to calculate roots and weights of Rys polynomials on-chip, and a streaming contraction unit for the contraction of primitive ERIs. This shifts the design bottleneck from limited CPU-FPGA communication bandwidth to available FPGA computation resources. To address practical deployment challenges for a large number of quartet classes, we design three streaming overlays, together with an efficient memory transpose optimization, to cover the 21 most commonly used quartet classes in realistic atomistic simulations. To address the new computation constraints, we use flexible calculation stages with a free-running streaming architecture to achieve high DSP utilization and good timing closure.Experiments demonstrate that SORCERI achieves an average 5.96x, 1.99x, and 1.16x better performance per watt than libint on a 64-core AMD EPYC 7713 CPU, libintx on an Nvidia A40 GPU, and SERI, the prior best-performing FPGA design for primitive ERIs. Furthermore, SORCERI reaches a peak throughput of 44.11 GERIS (109 ERIs per second) that is 1.52x, 1.13x, and 1.93x greater than libint, libintx and SERI, respectively. SORCERI will be released soon at https://github.com/SFU-HiAccel/SORCERI.}},
  author       = {{Stachura, Philip and Wu, Xin and Plessl, Christian and Fang, Zhenman}},
  booktitle    = {{Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA '26)}},
  isbn         = {{9798400720796}},
  keywords     = {{electron repulsion integrals, quantum chemistry, atomistic simulation, overlay architecture, fpga acceleration}},
  pages        = {{224--234}},
  publisher    = {{Association for Computing Machinery}},
  title        = {{{SORCERI: Streaming Overlay Acceleration for Highly Contracted Electron Repulsion Integral Computations in Quantum Chemistry}}},
  doi          = {{10.1145/3748173.3779198}},
  year         = {{2026}},
}

@inproceedings{64820,
  abstract     = {{Political goals, emerging EU sustainability regulations, and industrial digitalization are driving the introduction of Digital Product Passports (DPPs) to enhance transparency, traceability, and compliance across product life cycles. However, the appropriate granularity of DPP integration across product architectures remains ambiguous. This paper introduces a structured, decision-oriented framework that links product structure, regulatory relevance, and information depth to define consistent DPP levels, supporting both industry implementation and future standardization.}},
  author       = {{Rohde, Katharina and Budde, Finn Lukas and Patrício, Bárbara and Ferreira, Tânia and Gonçalves, Ana and Ott, Manuel and Mozgova, Iryna}},
  booktitle    = {{Proceedings of the Design Society}},
  keywords     = {{digital product passport, product architecture, circular economy, information granularity, decision-making framework}},
  location     = {{Cavtat, Dubrovnik, Croatia}},
  title        = {{{Digital product passports and the challenge of product structure granularity: A decision-making framework for the level of DPP integration}}},
  volume       = {{6}},
  year         = {{2026}},
}

@article{53213,
  author       = {{Amiri, Arman and Tavana, Madjid and Arman, Hosein}},
  issn         = {{2542-6605}},
  journal      = {{Internet of Things}},
  keywords     = {{Management of Technology and Innovation, Artificial Intelligence, Computer Science Applications, Hardware and Architecture, Engineering (miscellaneous), Information Systems, Computer Science (miscellaneous), Software}},
  publisher    = {{Elsevier BV}},
  title        = {{{An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction}}},
  doi          = {{10.1016/j.iot.2023.101027}},
  volume       = {{25}},
  year         = {{2024}},
}

@article{53212,
  author       = {{Mahmoodi, Ehsan and Fathi, Masood and Tavana, Madjid and Ghobakhloo, Morteza and Ng, Amos H.C.}},
  issn         = {{0278-6125}},
  journal      = {{Journal of Manufacturing Systems}},
  keywords     = {{Industrial and Manufacturing Engineering, Hardware and Architecture, Software, Control and Systems Engineering}},
  pages        = {{287--307}},
  publisher    = {{Elsevier BV}},
  title        = {{{Data-driven simulation-based decision support system for resource allocation in industry 4.0 and smart manufacturing}}},
  doi          = {{10.1016/j.jmsy.2023.11.019}},
  volume       = {{72}},
  year         = {{2024}},
}

@inproceedings{58224,
  author       = {{Kenneweg, Philip and Kenneweg, Tristan and Fumagalli, Fabian and Hammer, Barbara}},
  booktitle    = {{2024 International Joint Conference on Neural Networks (IJCNN)}},
  keywords     = {{Training, Schedules, Codes, Search methods, Source coding, Computer architecture, Transformers}},
  pages        = {{1--8}},
  title        = {{{No learning rates needed: Introducing SALSA - Stable Armijo Line Search Adaptation}}},
  doi          = {{10.1109/IJCNN60899.2024.10650124}},
  year         = {{2024}},
}

@article{46264,
  abstract     = {{System-level interconnects provide the
backbone for increasingly complex systems on a chip. Their
vulnerability to electromigration and crosstalk can lead to
serious reliability and safety issues during the system lifetime.
This article presents an approach for periodic in-system testing
which maintains a reliability profile to detect potential
problems before they actually cause a failure. Relying on a
common infrastructure for EM-aware system workload
management and test, it minimizes the stress induced by the
test itself and contributes to the self-healing of system-induced
electromigration degradations. }},
  author       = {{Sadeghi-Kohan, Somayeh and Hellebrand, Sybille and Wunderlich, Hans-Joachim}},
  issn         = {{2168-2356}},
  journal      = {{IEEE Design &Test}},
  keywords     = {{Electrical and Electronic Engineering, Hardware and Architecture, Software}},
  pages        = {{1--1}},
  publisher    = {{Institute of Electrical and Electronics Engineers (IEEE)}},
  title        = {{{Workload-Aware Periodic Interconnect BIST}}},
  doi          = {{10.1109/mdat.2023.3298849}},
  year         = {{2023}},
}

@article{53220,
  author       = {{Tavana, Madjid and Khalili Nasr, Arash and Ahmadabadi, Alireza Barati and Amiri, Alireza Shamekhi and Mina, Hassan}},
  issn         = {{2542-6605}},
  journal      = {{Internet of Things}},
  keywords     = {{Management of Technology and Innovation, Artificial Intelligence, Computer Science Applications, Hardware and Architecture, Engineering (miscellaneous), Information Systems, Computer Science (miscellaneous), Software}},
  publisher    = {{Elsevier BV}},
  title        = {{{An interval multi-criteria decision-making model for evaluating blockchain-IoT technology in supply chain networks}}},
  doi          = {{10.1016/j.iot.2023.100786}},
  volume       = {{22}},
  year         = {{2023}},
}

@article{45361,
  abstract     = {{<jats:p> The non-orthogonal local submatrix method applied to electronic structure–based molecular dynamics simulations is shown to exceed 1.1 EFLOP/s in FP16/FP32-mixed floating-point arithmetic when using 4400 NVIDIA A100 GPUs of the Perlmutter system. This is enabled by a modification of the original method that pushes the sustained fraction of the peak performance to about 80%. Example calculations are performed for SARS-CoV-2 spike proteins with up to 83 million atoms. </jats:p>}},
  author       = {{Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Kühne, Thomas and Plessl, Christian}},
  issn         = {{1094-3420}},
  journal      = {{The International Journal of High Performance Computing Applications}},
  keywords     = {{Hardware and Architecture, Theoretical Computer Science, Software}},
  publisher    = {{SAGE Publications}},
  title        = {{{Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics}}},
  doi          = {{10.1177/10943420231177631}},
  year         = {{2023}},
}

@inproceedings{61402,
  author       = {{Lohmer, Vivien and Terfloth, Lutz and Kern, Friederike}},
  booktitle    = {{First International Multimodal Communication Symposium - Book of Abstract}},
  keywords     = {{gesture, dual nature, explanations, architecture, relevance}},
  location     = {{Universität Pompeu Fabra, Barcelona}},
  title        = {{{Explaining the Technical Artifact Quarto!: How Gestures are used in Everyday Explanations}}},
  year         = {{2023}},
}

@article{45847,
  abstract     = {{<jats:title>Abstract</jats:title>
               <jats:p>In this paper, we investigate the parameterized complexity of model checking for Dependence and Independence logic, which are well studied logics in the area of Team Semantics. We start with a list of nine immediate parameterizations for this problem, namely the number of disjunctions (i.e. splits)/(free) variables/universal quantifiers, formula-size, the tree-width of the Gaifman graph of the input structure, the size of the universe/team and the arity of dependence atoms. We present a comprehensive picture of the parameterized complexity of model checking and obtain a division of the problem into tractable and various intractable degrees. Furthermore, we also consider the complexity of the most important variants (data and expression complexity) of the model checking problem by fixing parts of the input.</jats:p>}},
  author       = {{Kontinen, Juha and Meier, Arne and Mahmood, Yasir}},
  issn         = {{0955-792X}},
  journal      = {{Journal of Logic and Computation}},
  keywords     = {{Logic, Hardware and Architecture, Arts and Humanities (miscellaneous), Software, Theoretical Computer Science}},
  number       = {{8}},
  pages        = {{1624--1644}},
  publisher    = {{Oxford University Press (OUP)}},
  title        = {{{A parameterized view on the complexity of dependence and independence logic}}},
  doi          = {{10.1093/logcom/exac070}},
  volume       = {{32}},
  year         = {{2022}},
}

@article{33684,
  author       = {{Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Schütt, Ole and Lazzaro, Alfio and Pabst, Hans and Mohr, Stephan and Hutter, Jürg and Kühne, Thomas and Plessl, Christian}},
  issn         = {{0167-8191}},
  journal      = {{Parallel Computing}},
  keywords     = {{Artificial Intelligence, Computer Graphics and Computer-Aided Design, Computer Networks and Communications, Hardware and Architecture, Theoretical Computer Science, Software}},
  publisher    = {{Elsevier BV}},
  title        = {{{Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms}}},
  doi          = {{10.1016/j.parco.2022.102920}},
  volume       = {{111}},
  year         = {{2022}},
}

@article{30907,
  author       = {{Rodriguez, Alfonso and Otero, Andres and Platzner, Marco and De la Torre, Eduardo}},
  issn         = {{0018-9340}},
  journal      = {{IEEE Transactions on Computers}},
  keywords     = {{Computational Theory and Mathematics, Hardware and Architecture, Theoretical Computer Science, Software}},
  pages        = {{1--1}},
  publisher    = {{Institute of Electrical and Electronics Engineers (IEEE)}},
  title        = {{{Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs}}},
  doi          = {{10.1109/tc.2021.3107196}},
  year         = {{2021}},
}

@phdthesis{28683,
  abstract     = {{In den letzten Jahren haben sich Software-Ökosysteme als neue, erfolgreiche Geschäftsform etabliert. Unternehmen agieren hierbei als Anbieter von Software-Plattformen, auf denen Drittanbieter Softwarelösungen für den Markt anbieten können.  Etablierte Beispiele sind hierbei sogenannte App-Stores, die z.B. von Google oder Apple angeboten werden.

Beim Aufbau von Software-Ökosystemen müssen vom Plattformanbieter viele architektonische Entwurfsentscheidungen getroffen werden. Bisher gibt es keine Architekturrichtlinien und -werkzeuge, die den Entwurf einer Ökosystemarchitektur unterstützen. Dadurch fehlt hier systematisches, wiederverwendbares Wissen. Plattformanbieter müssen auf ad-hoc Entscheidungen zurückgreifen. Dies kann dann zu Problemen im Betrieb der Software-Plattformen führen, zu erhöhten Ausfallrisiken und Mehrkosten.

Der Mangel an Architekturwissen manifestiert sich konkret in zwei Gruppen von Herausforderungen: Erstens fehlt eine Wissensbasis zu Architekturalternativen und zweitens fehlt es an methodischem Wissen zu Entwicklung und Betrieb von Software-Ökosystemen. Eine Architekturwissensbasis würde Orientierungshilfen zu den Bestandteilen von Software-Ökosystemen und deren Abhängigkeiten geben, während methodisches Wissen die Erstellung dieser Systeme erleichtern würde.

In der Dissertation werden diese Herausforderungen durch die Entwicklung des Frameworks SecoArc für die Modellierung von Software-Ökosystemen angegangen. Der Beitrag der Dissertation ist zweifach: 
1.	Das SecoArc-Framework umfasst eine Architekturwissensbasis, die wiederverwendbare Architekturentwurfsentscheidungen
von Software-Ökosystemen enthält. Die Wissensbasis wurde entwickelt, indem das Architekturwissen bestehender Ökosysteme sowie aus existierender Fachliteratur ermittelt wurde und in einer Produktlinie für Software-Ökosysteme konsolidiert wurde. Die Produktlinie umfasst architektonische Gemeinsamkeiten und Variabilitäten von Software-Ökosystemen. 
2.	Das SecoArc-Framework liefert methodisches Wissen, um die Ökosystemarchitektur in Modellen zu entwerfen und zu analysieren. Dieses Wissen wurde entwickelt, indem drei Architekturmuster identifiziert wurden. Jedes Muster erfasst unterschiedliche Beziehungen zwischen architektonischen Entwurfsentscheidungen zu den Qualitätsmerkmalen einer Ökosystemgesundheit und der Erreichung von Geschäftszielen. 

Die Architekturmuster und die Produktlinie wurden dazu genutzt, ein Modellierungsframework zu entwickeln und in Form eines Prototypen umzusetzen, welches einen Entwurfsprozess, eine Modellierungssprache und eine Architekturanalysetechnik umfasst. Es erleichtert das Modellieren, Analysieren und Vergleichen von Ökosystemarchitekturen.

Die Ergebnisse der Dissertation wurden im Rahmen von zwei Studien evaluiert. In der ersten Validierungsstudie wurden das Framework sowie der Prototyp verwendet, um zwei alternative Ökosystemarchitekturen zu entwerfen und zu analysieren. In der zweiten Studie wurde eine Analyse von existierenden Ökosystemen basierend auf den architektonischen Variabilitäten des Frameworks durchgeführt.}},
  author       = {{Schwichtenberg, Bahar}},
  keywords     = {{Enterprise Architecture, Architectural Design Decisions, Open Platforms}},
  title        = {{{Modeling and Analyzing Software Ecosystems}}},
  doi          = {{10.17619/UNIPB/1-1270 }},
  year         = {{2021}},
}

@article{45844,
  abstract     = {{<jats:title>Abstract</jats:title>
               <jats:p>Abductive reasoning is a non-monotonic formalism stemming from the work of Peirce. It describes the process of deriving the most plausible explanations of known facts. Considering the positive version, asking for sets of variables as explanations, we study, besides the problem of wether there exists a set of explanations, two explanation size limited variants of this reasoning problem (less than or equal to, and equal to a given size bound). In this paper, we present a thorough two-dimensional classification of these problems: the first dimension is regarding the parameterized complexity under a wealth of different parameterizations, and the second dimension spans through all possible Boolean fragments of these problems in Schaefer’s constraint satisfaction framework with co-clones (T. J. Schaefer. The complexity of satisfiability problems. In Proceedings of the 10th Annual ACM Symposium on Theory of Computing, May 1–3, 1978, San Diego, California, USA, R.J. Lipton, W.A. Burkhard, W.J. Savitch, E.P. Friedman, A.V. Aho eds, pp. 216–226. ACM, 1978). Thereby, we almost complete the parameterized complexity classification program initiated by Fellows et al. (The parameterized complexity of abduction. In Proceedings of the Twenty-Sixth AAAI Conference on Articial Intelligence, July 22–26, 2012, Toronto, Ontario, Canada, J. Homann, B. Selman eds. AAAI Press, 2012), partially building on the results by Nordh and Zanuttini (What makes propositional abduction tractable. Artificial Intelligence, 172, 1245–1284, 2008). In this process, we outline a fine-grained analysis of the inherent parameterized intractability of these problems and pinpoint their FPT parts. As the standard algebraic approach is not applicable to our problems, we develop an alternative method that makes the algebraic tools partially available again.</jats:p>}},
  author       = {{Mahmood, Yasir and Meier, Arne and Schmidt, Johannes}},
  issn         = {{0955-792X}},
  journal      = {{Journal of Logic and Computation}},
  keywords     = {{Logic, Hardware and Architecture, Arts and Humanities (miscellaneous), Software, Theoretical Computer Science}},
  number       = {{1}},
  pages        = {{266--296}},
  publisher    = {{Oxford University Press (OUP)}},
  title        = {{{Parameterized complexity of abduction in Schaefer’s framework}}},
  doi          = {{10.1093/logcom/exaa079}},
  volume       = {{31}},
  year         = {{2021}},
}

@inproceedings{10673,
  author       = {{Ho, Nam and Ahmed, Abdullah Fathi and Kaufmann, Paul and Platzner, Marco}},
  booktitle    = {{Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS)}},
  keywords     = {{cache storage, field programmable gate arrays, multiprocessing systems, parallel architectures, reconfigurable architectures, FPGA, dynamic reconfiguration, evolvable cache mapping, many-core architecture, memory-to-cache address mapping function, microarchitectural optimization, multicore architecture, nature-inspired optimization, parallelization degrees, processor, reconfigurable cache mapping, reconfigurable computing, Field programmable gate arrays, Software, Tuning}},
  pages        = {{1--7}},
  title        = {{{Microarchitectural optimization by means of reconfigurable and evolvable cache mappings}}},
  doi          = {{10.1109/AHS.2015.7231178}},
  year         = {{2015}},
}

@misc{33312,
  abstract     = {{Mechatronic systems are used more than ever in human life. They can be found in a very wide range of domain contexts, from household appliances, and cars, to medical equipment. Mechatronic systems, as a kind of embedded systems, are the tight integration of mechanical and electrical engineering, which embed software systems. Information security of mechatronic systems has not received much attention yet. However, wherever data exists, cyber attacks threaten mechatronic systems.

The thesis focuses on the early design stages of the development of mechatronic systems. Model sequence diagrams (MSDs) are used to model requirements with real-time and safety properties. In this thesis, MSDs are extended such that security properties for example authenticity and privacy can be modeled and analyzed automatically.}},
  author       = {{Schwichtenberg, Bahar}},
  keywords     = {{Software Architecture, Requirements Engineering, Embedded Systems}},
  title        = {{{Early Prediction of Security Properties for Mechatronic Systems}}},
  year         = {{2015}},
}

@article{39479,
  author       = {{Vidor, Fábio and Meyers, Thorsten and Hilleringmann, Ulrich}},
  issn         = {{2079-9292}},
  journal      = {{Electronics}},
  keywords     = {{Electrical and Electronic Engineering, Computer Networks and Communications, Hardware and Architecture, Signal Processing, Control and Systems Engineering}},
  number       = {{3}},
  pages        = {{480--506}},
  publisher    = {{MDPI AG}},
  title        = {{{Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors}}},
  doi          = {{10.3390/electronics4030480}},
  volume       = {{4}},
  year         = {{2015}},
}

@inproceedings{10674,
  author       = {{Ho, Nam and Kaufmann, Paul and Platzner, Marco}},
  booktitle    = {{24th Intl. Conf. on Field Programmable Logic and Applications (FPL)}},
  keywords     = {{Linux, hardware-software codesign, multiprocessing systems, parallel processing, LEON3 multicore platform, Linux kernel, PMU, hardware counters, hardware-software infrastructure, high performance embedded computing, perf_event, performance monitoring unit, Computer architecture, Hardware, Monitoring, Phasor measurement units, Radiation detectors, Registers, Software}},
  pages        = {{1--4}},
  title        = {{{A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms}}},
  doi          = {{10.1109/FPL.2014.6927437}},
  year         = {{2014}},
}

@article{46266,
  author       = {{Alizadeh, Bijan and Behnam, Payman and Sadeghi-Kohan, Somayeh}},
  issn         = {{0018-9340}},
  journal      = {{IEEE Transactions on Computers}},
  keywords     = {{Computational Theory and Mathematics, Hardware and Architecture, Theoretical Computer Science, Software}},
  pages        = {{1--1}},
  publisher    = {{Institute of Electrical and Electronics Engineers (IEEE)}},
  title        = {{{A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs}}},
  doi          = {{10.1109/tc.2014.2329687}},
  year         = {{2014}},
}

@article{4706,
  abstract     = {{Purpose – The purpose of this paper is to show how to employ complex event processing (CEP) for the observation and management of business processes. It proposes a conceptual architecture of BPM event producer, processor, and consumer and describes technical implications for the application with standard software in a perfect order scenario. Design/methodology/approach – The authors discuss business process analytics as the technological background. The capabilities of CEP in a BPM context are outlined an architecture design is proposed. A sophisticated proof-of-concept demonstrates its applicability. Findings – The results overcome the separation and data latency issues of process controlling, monitoring, and simulation. Distinct analyses of past, present, and future blur into a holistic real-time approach. The authors highlight the necessity for configurable event producer in BPM engines, process event support in CEP engines, a common process event format, connectors to visualizers, notifiers and return channels to the BPM engine. Research limitations/implications – Further research will thoroughly evaluate the approach in a variety of business settings. New concepts and standards for the architecture's building blocks will be needed to improve maintainability and operability. Practical implications – Managers learn how CEP can yield insights into business processes' operations. The paper illustrates a path to overcome inflexibility, latency, and missing feedback mechanisms of current process modeling and control solutions. Software vendors might be interested in the conceptualization and the described needs for further development. Originality/value – So far, there is no commercial CEP-based BPM solution which facilitates a round trip from insight to action as outlines. As major software vendors have begun developing solutions (BPM/BPA solutions), this paper will stimulate a debate between research and practice on suitable design and technology.}},
  author       = {{Janiesch, Christian and Matzner, Martin and Müller, Oliver}},
  isbn         = {{1020120096}},
  issn         = {{14637154}},
  journal      = {{Business Process Management Journal}},
  keywords     = {{Architecture, Business activity monitoring, Business process management, Business process re-engineering, Complex event processing, Computer software, Standard software}},
  number       = {{4}},
  pages        = {{625----643}},
  title        = {{{Beyond process monitoring: A proof-of-concept of event-driven business activity management}}},
  doi          = {{10.1108/14637151211253765}},
  year         = {{2012}},
}