---
_id: '22309'
abstract:
- lang: eng
  text: Approximate computing (AC) has acquired significant maturity in recent years
    as a promising approach to obtain energy and area-efficient hardware. Automated
    approximate accelerator synthesis involves a great deal of complexity on the size
    of design space which exponentially grows with the number of possible approximations.
    Design space exploration of approximate accelerator synthesis is usually targeted
    via heuristic-based search methods. The majority of existing frameworks prune
    a large part of the design space using a greedy-based approach to keep the problem
    tractable. Therefore, they result in inferior solutions since many potential solutions
    are neglected in the pruning process without the possibility of backtracking of
    removed approximate instances. In this paper, we address the aforementioned issue
    by adopting Monte Carlo Tree Search (MCTS), as an efficient stochastic learning-based
    search algorithm, in the context of automated synthesis of approximate accelerators.
    This enables the synthesis frameworks to deeply subsamples the design space of
    approximate accelerator synthesis toward most promising approximate instances
    based on the required performance goals, i.e., power consumption, area, or/and
    delay. We investigated the challenges of providing an efficient open-source framework
    that benefits analytical and search-based approximation techniques simultaneously
    to both speed up the synthesis runtime and improve the quality of obtained results.
    Besides, we studied the utilization of machine learning algorithms to improve
    the performance of several critical steps, i.e., accelerator quality testing,
    in the synthesis framework. The proposed framework can help the community to rapidly
    generate efficient approximate accelerators in a reasonable runtime.
author:
- first_name: Muhammad
  full_name: Awais, Muhammad
  id: '64665'
  last_name: Awais
  orcid: https://orcid.org/0000-0003-4148-2969
- first_name: Marco
  full_name: Platzner, Marco
  last_name: Platzner
citation:
  ama: 'Awais M, Platzner M. MCTS-Based Synthesis Towards Efficient Approximate Accelerators.
    In: <i>Proceedings of IEEE Computer Society Annual Symposium on VLSI</i>. IEEE;
    2021:384-389.'
  apa: Awais, M., &#38; Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient
    Approximate Accelerators. <i>Proceedings of IEEE Computer Society Annual Symposium
    on VLSI</i>, 384–389.
  bibtex: '@inproceedings{Awais_Platzner_2021, title={MCTS-Based Synthesis Towards
    Efficient Approximate Accelerators}, booktitle={Proceedings of IEEE Computer Society
    Annual Symposium on VLSI}, publisher={IEEE}, author={Awais, Muhammad and Platzner,
    Marco}, year={2021}, pages={384–389} }'
  chicago: Awais, Muhammad, and Marco Platzner. “MCTS-Based Synthesis Towards Efficient
    Approximate Accelerators.” In <i>Proceedings of IEEE Computer Society Annual Symposium
    on VLSI</i>, 384–89. IEEE, 2021.
  ieee: M. Awais and M. Platzner, “MCTS-Based Synthesis Towards Efficient Approximate
    Accelerators,” in <i>Proceedings of IEEE Computer Society Annual Symposium on
    VLSI</i>, Tampa, Florida USA (Virtual), 2021, pp. 384–389.
  mla: Awais, Muhammad, and Marco Platzner. “MCTS-Based Synthesis Towards Efficient
    Approximate Accelerators.” <i>Proceedings of IEEE Computer Society Annual Symposium
    on VLSI</i>, IEEE, 2021, pp. 384–89.
  short: 'M. Awais, M. Platzner, in: Proceedings of IEEE Computer Society Annual Symposium
    on VLSI, IEEE, 2021, pp. 384–389.'
conference:
  end_date: 2021-07-09
  location: Tampa, Florida USA (Virtual)
  name: IEEE Computer Society Annual Symposium on VLSI
  start_date: 2021-07-07
date_created: 2021-06-14T14:05:17Z
date_updated: 2022-01-06T06:55:31Z
department:
- _id: '78'
keyword:
- Approximate computing
- Design space exploration
- Accelerator synthesis
language:
- iso: eng
page: 384-389
publication: Proceedings of IEEE Computer Society Annual Symposium on VLSI
publisher: IEEE
status: public
title: MCTS-Based Synthesis Towards Efficient Approximate Accelerators
type: conference
user_id: '64665'
year: '2021'
...
---
_id: '2200'
author:
- first_name: Tobias
  full_name: Kenter, Tobias
  id: '3145'
  last_name: Kenter
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
- first_name: Christian
  full_name: Plessl, Christian
  id: '16153'
  last_name: Plessl
  orcid: 0000-0001-5728-9982
- first_name: Michael
  full_name: Kauschke, Michael
  last_name: Kauschke
citation:
  ama: 'Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation Framework
    for Automated Exploration of CPU-Accelerator Architectures. In: <i>Proc. Int.
    Symp. on Field-Programmable Gate Arrays (FPGA)</i>. ACM; 2011:177-180. doi:<a
    href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>'
  apa: Kenter, T., Platzner, M., Plessl, C., &#38; Kauschke, M. (2011). Performance
    Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.
    <i>Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)</i>, 177–180. <a
    href="https://doi.org/10.1145/1950413.1950448">https://doi.org/10.1145/1950413.1950448</a>
  bibtex: '@inproceedings{Kenter_Platzner_Plessl_Kauschke_2011, place={New York, NY,
    USA}, title={Performance Estimation Framework for Automated Exploration of CPU-Accelerator
    Architectures}, DOI={<a href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>},
    booktitle={Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)}, publisher={ACM},
    author={Kenter, Tobias and Platzner, Marco and Plessl, Christian and Kauschke,
    Michael}, year={2011}, pages={177–180} }'
  chicago: 'Kenter, Tobias, Marco Platzner, Christian Plessl, and Michael Kauschke.
    “Performance Estimation Framework for Automated Exploration of CPU-Accelerator
    Architectures.” In <i>Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)</i>,
    177–80. New York, NY, USA: ACM, 2011. <a href="https://doi.org/10.1145/1950413.1950448">https://doi.org/10.1145/1950413.1950448</a>.'
  ieee: 'T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation
    Framework for Automated Exploration of CPU-Accelerator Architectures,” in <i>Proc.
    Int. Symp. on Field-Programmable Gate Arrays (FPGA)</i>, 2011, pp. 177–180, doi:
    <a href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>.'
  mla: Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration
    of CPU-Accelerator Architectures.” <i>Proc. Int. Symp. on Field-Programmable Gate
    Arrays (FPGA)</i>, ACM, 2011, pp. 177–80, doi:<a href="https://doi.org/10.1145/1950413.1950448">10.1145/1950413.1950448</a>.
  short: 'T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on
    Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.'
date_created: 2018-04-03T15:08:13Z
date_updated: 2023-09-26T13:45:04Z
department:
- _id: '27'
- _id: '518'
- _id: '78'
doi: 10.1145/1950413.1950448
keyword:
- design space exploration
- LLVM
- partitioning
- performance
- estimation
- funding-intel
language:
- iso: eng
page: 177-180
place: New York, NY, USA
publication: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA)
publication_identifier:
  isbn:
  - 978-1-4503-0554-9
publisher: ACM
quality_controlled: '1'
status: public
title: Performance Estimation Framework for Automated Exploration of CPU-Accelerator
  Architectures
type: conference
user_id: '15278'
year: '2011'
...