---
_id: '37007'
abstract:
- lang: eng
text: UML is widely applied for the specification and modeling of software and some
studies have demonstrated that it is applicable for HW/SW codesign. However, in
this area there is still a big gap from UML modeling to SystemC-based verification
and synthesis environments. This paper presents an efficient approach to bridge
this gap in the context of Systems-on-a-Chip (SoC) design. We propose a framework
for the seamless integration of a customized SysML entry with code generation
for HW/SW cosimulation and high-level FPGA synthesis. For this, we extended the
SysML UML profile by SystemC and synthesis capabilities. Two case studies demonstrate
the applicability of our approach.
author:
- first_name: Fabian
full_name: Mischkalla, Fabian
last_name: Mischkalla
- first_name: Da
full_name: He, Da
last_name: He
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and
Simulation of Combined HW/SW Systems. In: Proceedings of DATE’10. IEEE;
2010. doi:10.1109/DATE.2010.5456990'
apa: Mischkalla, F., He, D., & Müller, W. (2010). Closing the Gap between UML-based
Modeling and Simulation of Combined HW/SW Systems. Proceedings of DATE’10.
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE
2010), Dresden. https://doi.org/10.1109/DATE.2010.5456990
bibtex: '@inproceedings{Mischkalla_He_Müller_2010, place={Dresden}, title={Closing
the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems},
DOI={10.1109/DATE.2010.5456990},
booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Mischkalla, Fabian
and He, Da and Müller, Wolfgang}, year={2010} }'
chicago: 'Mischkalla, Fabian, Da He, and Wolfgang Müller. “Closing the Gap between
UML-Based Modeling and Simulation of Combined HW/SW Systems.” In Proceedings
of DATE’10. Dresden: IEEE, 2010. https://doi.org/10.1109/DATE.2010.5456990.'
ieee: 'F. Mischkalla, D. He, and W. Müller, “Closing the Gap between UML-based Modeling
and Simulation of Combined HW/SW Systems,” presented at the 2010 Design, Automation
& Test in Europe Conference & Exhibition (DATE 2010), Dresden, 2010, doi:
10.1109/DATE.2010.5456990.'
mla: Mischkalla, Fabian, et al. “Closing the Gap between UML-Based Modeling and
Simulation of Combined HW/SW Systems.” Proceedings of DATE’10, IEEE, 2010,
doi:10.1109/DATE.2010.5456990.
short: 'F. Mischkalla, D. He, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden,
2010.'
conference:
location: Dresden
name: 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
date_created: 2023-01-17T09:12:35Z
date_updated: 2023-01-17T09:12:44Z
department:
- _id: '672'
doi: 10.1109/DATE.2010.5456990
keyword:
- Unified modeling language
- Field programmable gate arrays
- Bridges
- Helium
- Real time systems
- Operating systems
- Documentation
- Application software
- XML
- Space exploration
language:
- iso: eng
place: Dresden
publication: Proceedings of DATE’10
publication_identifier:
eisbn:
- 978-3-9810801-6-2
publisher: IEEE
status: public
title: Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW
Systems
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '39029'
abstract:
- lang: eng
text: UML 2.0 provides a rich set of diagrams for systems documentation and specification.
Much effort has been undertaken to employ different aspects of UML for multiple
domains, mainly in the area of software systems. Considering the area of electronic
design automation, however, we currently see only very few approaches which investigate
UML for hardware design and hardware/software co-design. We present an approach
for executable UML closing the gap from system specification to its model-based
execution on reconfigurable hardware. For this purpose, we present our abstract
execution platform (AEP), which is based on a virtual machine running an executable
UML subset for embedded software and reconfigurable hardware. This subset combines
UML 2.0 classes, state-machines and sequence diagrams for a complete system specification.
We describe how these binary encoded UML specifications can be directly executed
and give the implementation of such a virtual machine on a Virtex II FPGA. Finally,
we present evaluation results comparing the AEP implementation with C code on
a C167 microcontroller.
author:
- first_name: Tim
full_name: Schattkowsky, Tim
last_name: Schattkowsky
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Achim
full_name: Rettberg, Achim
last_name: Rettberg
citation:
ama: 'Schattkowsky T, Müller W, Rettberg A. A Model-Based Approach for Executable
Specification on Reconfigurable Hardware. In: Proceedings of DATE’05. IEEE;
2005. doi:10.1109/DATE.2005.20'
apa: Schattkowsky, T., Müller, W., & Rettberg, A. (2005). A Model-Based Approach
for Executable Specification on Reconfigurable Hardware. Proceedings of DATE’05.
https://doi.org/10.1109/DATE.2005.20
bibtex: '@inproceedings{Schattkowsky_Müller_Rettberg_2005, place={Munich, Germany
}, title={A Model-Based Approach for Executable Specification on Reconfigurable
Hardware}, DOI={10.1109/DATE.2005.20},
booktitle={Proceedings of DATE’05}, publisher={IEEE}, author={Schattkowsky, Tim
and Müller, Wolfgang and Rettberg, Achim}, year={2005} }'
chicago: 'Schattkowsky, Tim, Wolfgang Müller, and Achim Rettberg. “A Model-Based
Approach for Executable Specification on Reconfigurable Hardware.” In Proceedings
of DATE’05. Munich, Germany : IEEE, 2005. https://doi.org/10.1109/DATE.2005.20.'
ieee: 'T. Schattkowsky, W. Müller, and A. Rettberg, “A Model-Based Approach for
Executable Specification on Reconfigurable Hardware,” 2005, doi: 10.1109/DATE.2005.20.'
mla: Schattkowsky, Tim, et al. “A Model-Based Approach for Executable Specification
on Reconfigurable Hardware.” Proceedings of DATE’05, IEEE, 2005, doi:10.1109/DATE.2005.20.
short: 'T. Schattkowsky, W. Müller, A. Rettberg, in: Proceedings of DATE’05, IEEE,
Munich, Germany , 2005.'
date_created: 2023-01-24T08:10:40Z
date_updated: 2023-01-24T08:10:44Z
department:
- _id: '672'
doi: 10.1109/DATE.2005.20
keyword:
- Hardware
- Unified modeling language
- Virtual machining
- Object oriented modeling
- Field programmable gate arrays
- Java
- Microcontrollers
- Embedded software
- Real time systems
- Documentation
language:
- iso: eng
place: 'Munich, Germany '
publication: Proceedings of DATE’05
publication_identifier:
isbn:
- 0-7695-2288-2
publisher: IEEE
status: public
title: A Model-Based Approach for Executable Specification on Reconfigurable Hardware
type: conference
user_id: '5786'
year: '2005'
...
---
_id: '39032'
abstract:
- lang: eng
text: Executable UML models are nowadays gaining interest in embedded systems design.
This domain is strongly devoted to the modeling of reactive behavior using StateChart
variants. In this context, the direct execution of UML state machines is an interesting
alternative to native code generation approaches since it significantly increases
portability. However, fully featured UML 2.0 State Machines may contain a broad
set of features with complex execution semantics that differ significantly from
other StateChart variants. This makes their direct execution complex and inefficient.
In this paper, we demonstrate how such state machines can be represented using
a small subset of the UML state machine features that enables efficient execution.
We describe the necessary model transformations in terms of graph transformations
and discuss the underlying semantics and implications for execution.
author:
- first_name: Tim
full_name: Schattkowsky, Tim
last_name: Schattkowsky
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Schattkowsky T, Müller W. Transformation of UML State Machines for Direct
Execution. In: Proceedings of VL/HCC 05. ; 2005. doi:10.1109/VLHCC.2005.64'
apa: Schattkowsky, T., & Müller, W. (2005). Transformation of UML State Machines
for Direct Execution. Proceedings of VL/HCC 05. https://doi.org/10.1109/VLHCC.2005.64
bibtex: '@inproceedings{Schattkowsky_Müller_2005, place={Dallas, TX, USA}, title={Transformation
of UML State Machines for Direct Execution}, DOI={10.1109/VLHCC.2005.64},
booktitle={Proceedings of VL/HCC 05}, author={Schattkowsky, Tim and Müller, Wolfgang},
year={2005} }'
chicago: Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines
for Direct Execution.” In Proceedings of VL/HCC 05. Dallas, TX, USA, 2005.
https://doi.org/10.1109/VLHCC.2005.64.
ieee: 'T. Schattkowsky and W. Müller, “Transformation of UML State Machines for
Direct Execution,” 2005, doi: 10.1109/VLHCC.2005.64.'
mla: Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines
for Direct Execution.” Proceedings of VL/HCC 05, 2005, doi:10.1109/VLHCC.2005.64.
short: 'T. Schattkowsky, W. Müller, in: Proceedings of VL/HCC 05, Dallas, TX, USA,
2005.'
date_created: 2023-01-24T08:18:10Z
date_updated: 2023-01-24T08:18:27Z
department:
- _id: '672'
doi: 10.1109/VLHCC.2005.64
keyword:
- Unified modeling language
- Software design
- Virtual machining
- Embedded system
- Programming
- Documentation
- Hardware
- Computer languages
- Operating systems
- Runtime
language:
- iso: eng
place: Dallas, TX, USA
publication: Proceedings of VL/HCC 05
publication_identifier:
isbn:
- 0-7695-2443-5
status: public
title: Transformation of UML State Machines for Direct Execution
type: conference
user_id: '5786'
year: '2005'
...
---
_id: '39382'
abstract:
- lang: eng
text: We present a rigorous but transparent semantics definition of the SpecC language
that covers the execution of SpecC behaviors and their interaction with the kernel
process. The semantics include wait, wait for, par, and try statements as they
are introduced in SpecC. We present our definition in form of distributed abstract
state machine (ASM) rules strictly following the lines of the SpecC Language Reference
Manual. We mainly see our formal semantics in three application areas. First,
it is a concise, unambiguous description for documentation and standardization.
Second, it applies as a high-level, pseudo code-oriented specification for the
implementation of a SpecC simulator. Finally, it is a first step for SpecC synthesis
in order to identify similar concepts with other languages like VHDL and SystemC
for the definition of common patterns and language subsets.
author:
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Rainer
full_name: Dömer, Rainer
last_name: Dömer
- first_name: Andreas
full_name: Gerstlauer, Andreas
last_name: Gerstlauer
citation:
ama: 'Müller W, Dömer R, Gerstlauer A. The Formal Execution Semantics of SpecC.
In: Proceedings of the ISSS02. ; 2002. doi:10.1145/581199.581234 '
apa: Müller, W., Dömer, R., & Gerstlauer, A. (2002). The Formal Execution Semantics
of SpecC. Proceedings of the ISSS02. https://doi.org/10.1145/581199.581234
bibtex: '@inproceedings{Müller_Dömer_Gerstlauer_2002, place={Nagoya, Japan}, title={The
Formal Execution Semantics of SpecC}, DOI={10.1145/581199.581234 }, booktitle={Proceedings of the ISSS02}, author={Müller,
Wolfgang and Dömer, Rainer and Gerstlauer, Andreas}, year={2002} }'
chicago: Müller, Wolfgang, Rainer Dömer, and Andreas Gerstlauer. “The Formal Execution
Semantics of SpecC.” In Proceedings of the ISSS02. Nagoya, Japan, 2002.
https://doi.org/10.1145/581199.581234
.
ieee: 'W. Müller, R. Dömer, and A. Gerstlauer, “The Formal Execution Semantics of
SpecC,” 2002, doi: 10.1145/581199.581234
.'
mla: Müller, Wolfgang, et al. “The Formal Execution Semantics of SpecC.” Proceedings
of the ISSS02, 2002, doi:10.1145/581199.581234
.
short: 'W. Müller, R. Dömer, A. Gerstlauer, in: Proceedings of the ISSS02, Nagoya,
Japan, 2002.'
date_created: 2023-01-24T10:10:24Z
date_updated: 2023-01-24T10:10:28Z
department:
- _id: '672'
doi: '10.1145/581199.581234 '
keyword:
- Standardization
- Kernel
- Permission
- Formal verification
- Logic functions
- Documentation
- Reasoning about programs
- Specification languages
- Formal specifications
- Software systems
language:
- iso: eng
place: Nagoya, Japan
publication: Proceedings of the ISSS02
publication_identifier:
isbn:
- 1-58113-576-9
status: public
title: The Formal Execution Semantics of SpecC
type: conference
user_id: '5786'
year: '2002'
...