[{"date_created":"2019-07-10T11:23:00Z","type":"conference","keyword":["Linux","cache storage","embedded systems","granular computing","multiprocessing systems","reconfigurable architectures","Leon3 SPARe processor","custom logic events","evolvable-self-adaptable processor cache","fine granular profiling","integer unit events","measurement infrastructure","microarchitectural events","multicore embedded system","perf_event standard Linux performance measurement interface","processor properties","run-time reconfigurable memory-to-cache address mapping engine","run-time reconfigurable multicore infrastructure","split-level caching","Field programmable gate arrays","Frequency locked loops","Irrigation","Phasor measurement units","Registers","Weaving"],"department":[{"_id":"78"}],"publication":"2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)","citation":{"ama":"Ho N, Kaufmann P, Platzner M. Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In: <i>2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)</i>. ; 2014:31-37. doi:<a href=\"https://doi.org/10.1109/ICES.2014.7008719\">10.1109/ICES.2014.7008719</a>","short":"N. Ho, P. Kaufmann, M. Platzner, in: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.","chicago":"Ho, Nam, Paul Kaufmann, and Marco Platzner. “Towards Self-Adaptive Caches: A Run-Time Reconfigurable Multi-Core Infrastructure.” In <i>2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)</i>, 31–37, 2014. <a href=\"https://doi.org/10.1109/ICES.2014.7008719\">https://doi.org/10.1109/ICES.2014.7008719</a>.","bibtex":"@inproceedings{Ho_Kaufmann_Platzner_2014, title={Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure}, DOI={<a href=\"https://doi.org/10.1109/ICES.2014.7008719\">10.1109/ICES.2014.7008719</a>}, booktitle={2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)}, author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2014}, pages={31–37} }","apa":"Ho, N., Kaufmann, P., &#38; Platzner, M. (2014). Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In <i>2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)</i> (pp. 31–37). <a href=\"https://doi.org/10.1109/ICES.2014.7008719\">https://doi.org/10.1109/ICES.2014.7008719</a>","mla":"Ho, Nam, et al. “Towards Self-Adaptive Caches: A Run-Time Reconfigurable Multi-Core Infrastructure.” <i>2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)</i>, 2014, pp. 31–37, doi:<a href=\"https://doi.org/10.1109/ICES.2014.7008719\">10.1109/ICES.2014.7008719</a>.","ieee":"N. Ho, P. Kaufmann, and M. Platzner, “Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure,” in <i>2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES)</i>, 2014, pp. 31–37."},"page":"31-37","language":[{"iso":"eng"}],"_id":"10677","doi":"10.1109/ICES.2014.7008719","user_id":"3118","year":"2014","title":"Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure","status":"public","author":[{"last_name":"Ho","first_name":"Nam","full_name":"Ho, Nam"},{"full_name":"Kaufmann, Paul","last_name":"Kaufmann","first_name":"Paul"},{"last_name":"Platzner","first_name":"Marco","full_name":"Platzner, Marco","id":"398"}],"date_updated":"2022-01-06T06:50:49Z"},{"keyword":["System testing","Automatic testing","Object oriented modeling","Classification tree analysis","Automotive engineering","Mathematical model","Embedded system","Control systems","Electronic equipment testing","Software testing"],"type":"conference","department":[{"_id":"672"}],"place":"Dresden","date_created":"2023-01-17T10:41:15Z","abstract":[{"text":"Today we can identify a big gap between requirement specification and the generation of test environments. This article extends the Classification Tree Method for Embedded Systems (CTM/ES) to fill this gap by new concepts for the precise specification of stimuli for operational ranges of continuous control systems. It introduces novel means for continuous acceptance criteria definition and for functional coverage definition.","lang":"eng"}],"publication":"Proceedings of DATE’10","citation":{"ama":"Krupp A, Müller W. A Systematic Approach to Combined HW/SW System Test. In: <i>Proceedings of DATE’10</i>. IEEE; 2010. doi:<a href=\"https://doi.org/10.1109/DATE.2010.5457186\">10.1109/DATE.2010.5457186</a>","bibtex":"@inproceedings{Krupp_Müller_2010, place={Dresden}, title={A Systematic Approach to Combined HW/SW System Test}, DOI={<a href=\"https://doi.org/10.1109/DATE.2010.5457186\">10.1109/DATE.2010.5457186</a>}, booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Krupp, Alexander and Müller, Wolfgang}, year={2010} }","mla":"Krupp, Alexander, and Wolfgang Müller. “A Systematic Approach to Combined HW/SW System Test.” <i>Proceedings of DATE’10</i>, IEEE, 2010, doi:<a href=\"https://doi.org/10.1109/DATE.2010.5457186\">10.1109/DATE.2010.5457186</a>.","short":"A. Krupp, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden, 2010.","chicago":"Krupp, Alexander, and Wolfgang Müller. “A Systematic Approach to Combined HW/SW System Test.” In <i>Proceedings of DATE’10</i>. Dresden: IEEE, 2010. <a href=\"https://doi.org/10.1109/DATE.2010.5457186\">https://doi.org/10.1109/DATE.2010.5457186</a>.","apa":"Krupp, A., &#38; Müller, W. (2010). A Systematic Approach to Combined HW/SW System Test. <i>Proceedings of DATE’10</i>. Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden. <a href=\"https://doi.org/10.1109/DATE.2010.5457186\">https://doi.org/10.1109/DATE.2010.5457186</a>","ieee":"A. Krupp and W. Müller, “A Systematic Approach to Combined HW/SW System Test,” presented at the Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden, 2010, doi: <a href=\"https://doi.org/10.1109/DATE.2010.5457186\">10.1109/DATE.2010.5457186</a>."},"doi":"10.1109/DATE.2010.5457186","user_id":"5786","language":[{"iso":"eng"}],"_id":"37037","publisher":"IEEE","date_updated":"2023-01-17T10:41:25Z","year":"2010","status":"public","title":"A Systematic Approach to Combined HW/SW System Test","conference":{"location":"Dresden","name":"Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)"},"author":[{"last_name":"Krupp","first_name":"Alexander","full_name":"Krupp, Alexander"},{"id":"16243","last_name":"Müller","first_name":"Wolfgang","full_name":"Müller, Wolfgang"}]},{"date_created":"2023-01-24T08:06:09Z","place":"Munich, Germany","keyword":["Classification tree analysis","System testing","Embedded system","Safety","Automatic testing","Automation"],"type":"conference","department":[{"_id":"672"}],"publication":"Proceedings of the Design Automation & Test in Europe Conference","citation":{"mla":"Krupp, Alexander, and Wolfgang Müller. “Classification Trees for Functional Coverage and Random Test Generation.” <i>Proceedings of the Design Automation &#38; Test in Europe Conference</i>, IEEE, 2006, doi:<a href=\"https://doi.org/10.1109/DATE.2006.243902\">10.1109/DATE.2006.243902</a>.","bibtex":"@inproceedings{Krupp_Müller_2006, place={Munich, Germany}, title={Classification Trees for Functional Coverage and Random Test Generation}, DOI={<a href=\"https://doi.org/10.1109/DATE.2006.243902\">10.1109/DATE.2006.243902</a>}, booktitle={Proceedings of the Design Automation &#38; Test in Europe Conference}, publisher={IEEE}, author={Krupp, Alexander and Müller, Wolfgang}, year={2006} }","ama":"Krupp A, Müller W. Classification Trees for Functional Coverage and Random Test Generation. In: <i>Proceedings of the Design Automation &#38; Test in Europe Conference</i>. IEEE; 2006. doi:<a href=\"https://doi.org/10.1109/DATE.2006.243902\">10.1109/DATE.2006.243902</a>","ieee":"A. Krupp and W. Müller, “Classification Trees for Functional Coverage and Random Test Generation,” 2006, doi: <a href=\"https://doi.org/10.1109/DATE.2006.243902\">10.1109/DATE.2006.243902</a>.","apa":"Krupp, A., &#38; Müller, W. (2006). Classification Trees for Functional Coverage and Random Test Generation. <i>Proceedings of the Design Automation &#38; Test in Europe Conference</i>. <a href=\"https://doi.org/10.1109/DATE.2006.243902\">https://doi.org/10.1109/DATE.2006.243902</a>","chicago":"Krupp, Alexander, and Wolfgang Müller. “Classification Trees for Functional Coverage and Random Test Generation.” In <i>Proceedings of the Design Automation &#38; Test in Europe Conference</i>. Munich, Germany: IEEE, 2006. <a href=\"https://doi.org/10.1109/DATE.2006.243902\">https://doi.org/10.1109/DATE.2006.243902</a>.","short":"A. Krupp, W. Müller, in: Proceedings of the Design Automation &#38; Test in Europe Conference, IEEE, Munich, Germany, 2006."},"abstract":[{"text":"This article presents the classification tree method for functional verification to close the gap from the specification of a test plan to SystemVerilog (Chandra and Chakrabarty, 2001) test bench generation. Our method supports the systematic development of test configurations and is based on the classification tree method for embedded systems (CTM/ES) (Chakrabarty et al., 2000) extending CTM/ES for random test generation as well as for functional coverage and property specification","lang":"eng"}],"language":[{"iso":"eng"}],"_id":"38784","publisher":"IEEE","user_id":"5786","doi":"10.1109/DATE.2006.243902","title":"Classification Trees for Functional Coverage and Random Test Generation","year":"2006","status":"public","author":[{"first_name":"Alexander","last_name":"Krupp","full_name":"Krupp, Alexander"},{"first_name":"Wolfgang","last_name":"Müller","full_name":"Müller, Wolfgang","id":"16243"}],"publication_identifier":{"isbn":["3-9810801-1-4"]},"date_updated":"2023-01-24T08:06:14Z"},{"user_id":"5786","doi":"10.1109/VLHCC.2005.64","_id":"39032","language":[{"iso":"eng"}],"date_updated":"2023-01-24T08:18:27Z","year":"2005","status":"public","title":"Transformation of UML State Machines for Direct Execution","author":[{"last_name":"Schattkowsky","first_name":"Tim","full_name":"Schattkowsky, Tim"},{"id":"16243","last_name":"Müller","first_name":"Wolfgang","full_name":"Müller, Wolfgang"}],"publication_identifier":{"isbn":["0-7695-2443-5"]},"type":"conference","keyword":["Unified modeling language","Software design","Virtual machining","Embedded system","Programming","Documentation","Hardware","Computer languages","Operating systems","Runtime"],"department":[{"_id":"672"}],"date_created":"2023-01-24T08:18:10Z","place":"Dallas, TX, USA","abstract":[{"text":"Executable UML models are nowadays gaining interest in embedded systems design. This domain is strongly devoted to the modeling of reactive behavior using StateChart variants. In this context, the direct execution of UML state machines is an interesting alternative to native code generation approaches since it significantly increases portability. However, fully featured UML 2.0 State Machines may contain a broad set of features with complex execution semantics that differ significantly from other StateChart variants. This makes their direct execution complex and inefficient. In this paper, we demonstrate how such state machines can be represented using a small subset of the UML state machine features that enables efficient execution. We describe the necessary model transformations in terms of graph transformations and discuss the underlying semantics and implications for execution.","lang":"eng"}],"publication":"Proceedings of VL/HCC 05","citation":{"ieee":"T. Schattkowsky and W. Müller, “Transformation of UML State Machines for Direct Execution,” 2005, doi: <a href=\"https://doi.org/10.1109/VLHCC.2005.64\">10.1109/VLHCC.2005.64</a>.","apa":"Schattkowsky, T., &#38; Müller, W. (2005). Transformation of UML State Machines for Direct Execution. <i>Proceedings of VL/HCC 05</i>. <a href=\"https://doi.org/10.1109/VLHCC.2005.64\">https://doi.org/10.1109/VLHCC.2005.64</a>","chicago":"Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines for Direct Execution.” In <i>Proceedings of VL/HCC 05</i>. Dallas, TX, USA, 2005. <a href=\"https://doi.org/10.1109/VLHCC.2005.64\">https://doi.org/10.1109/VLHCC.2005.64</a>.","short":"T. Schattkowsky, W. Müller, in: Proceedings of VL/HCC 05, Dallas, TX, USA, 2005.","mla":"Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines for Direct Execution.” <i>Proceedings of VL/HCC 05</i>, 2005, doi:<a href=\"https://doi.org/10.1109/VLHCC.2005.64\">10.1109/VLHCC.2005.64</a>.","bibtex":"@inproceedings{Schattkowsky_Müller_2005, place={Dallas, TX, USA}, title={Transformation of UML State Machines for Direct Execution}, DOI={<a href=\"https://doi.org/10.1109/VLHCC.2005.64\">10.1109/VLHCC.2005.64</a>}, booktitle={Proceedings of VL/HCC 05}, author={Schattkowsky, Tim and Müller, Wolfgang}, year={2005} }","ama":"Schattkowsky T, Müller W. Transformation of UML State Machines for Direct Execution. In: <i>Proceedings of VL/HCC 05</i>. ; 2005. doi:<a href=\"https://doi.org/10.1109/VLHCC.2005.64\">10.1109/VLHCC.2005.64</a>"}}]