[{"article_number":"101027","language":[{"iso":"eng"}],"doi":"10.1016/j.iot.2023.101027","year":"2024","title":"An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction","author":[{"full_name":"Amiri, Arman","first_name":"Arman","last_name":"Amiri"},{"full_name":"Tavana, Madjid","last_name":"Tavana","first_name":"Madjid","id":"31858"},{"first_name":"Hosein","last_name":"Arman","full_name":"Arman, Hosein"}],"publication_identifier":{"issn":["2542-6605"]},"publication_status":"published","date_updated":"2024-04-15T13:08:17Z","intvolume":"        25","date_created":"2024-04-04T13:34:26Z","keyword":["Management of Technology and Innovation","Artificial Intelligence","Computer Science Applications","Hardware and Architecture","Engineering (miscellaneous)","Information Systems","Computer Science (miscellaneous)","Software"],"type":"journal_article","department":[{"_id":"277"}],"publication":"Internet of Things","_id":"53213","publisher":"Elsevier BV","user_id":"51811","volume":25,"status":"public","citation":{"ama":"Amiri A, Tavana M, Arman H. An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction. <i>Internet of Things</i>. 2024;25. doi:<a href=\"https://doi.org/10.1016/j.iot.2023.101027\">10.1016/j.iot.2023.101027</a>","bibtex":"@article{Amiri_Tavana_Arman_2024, title={An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction}, volume={25}, DOI={<a href=\"https://doi.org/10.1016/j.iot.2023.101027\">10.1016/j.iot.2023.101027</a>}, number={101027}, journal={Internet of Things}, publisher={Elsevier BV}, author={Amiri, Arman and Tavana, Madjid and Arman, Hosein}, year={2024} }","mla":"Amiri, Arman, et al. “An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction.” <i>Internet of Things</i>, vol. 25, 101027, Elsevier BV, 2024, doi:<a href=\"https://doi.org/10.1016/j.iot.2023.101027\">10.1016/j.iot.2023.101027</a>.","chicago":"Amiri, Arman, Madjid Tavana, and Hosein Arman. “An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction.” <i>Internet of Things</i> 25 (2024). <a href=\"https://doi.org/10.1016/j.iot.2023.101027\">https://doi.org/10.1016/j.iot.2023.101027</a>.","short":"A. Amiri, M. Tavana, H. Arman, Internet of Things 25 (2024).","apa":"Amiri, A., Tavana, M., &#38; Arman, H. (2024). An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction. <i>Internet of Things</i>, <i>25</i>, Article 101027. <a href=\"https://doi.org/10.1016/j.iot.2023.101027\">https://doi.org/10.1016/j.iot.2023.101027</a>","ieee":"A. Amiri, M. Tavana, and H. Arman, “An Integrated Fuzzy Analytic Network Process and Fuzzy Regression Method for Bitcoin Price Prediction,” <i>Internet of Things</i>, vol. 25, Art. no. 101027, 2024, doi: <a href=\"https://doi.org/10.1016/j.iot.2023.101027\">10.1016/j.iot.2023.101027</a>."}},{"publication":"Journal of Manufacturing Systems","department":[{"_id":"277"}],"type":"journal_article","keyword":["Industrial and Manufacturing Engineering","Hardware and Architecture","Software","Control and Systems Engineering"],"date_created":"2024-04-04T13:33:48Z","intvolume":"        72","date_updated":"2024-04-15T13:08:02Z","publication_status":"published","author":[{"full_name":"Mahmoodi, Ehsan","last_name":"Mahmoodi","first_name":"Ehsan"},{"full_name":"Fathi, Masood","first_name":"Masood","last_name":"Fathi"},{"full_name":"Tavana, Madjid","first_name":"Madjid","last_name":"Tavana","id":"31858"},{"full_name":"Ghobakhloo, Morteza","first_name":"Morteza","last_name":"Ghobakhloo"},{"full_name":"Ng, Amos H.C.","first_name":"Amos H.C.","last_name":"Ng"}],"publication_identifier":{"issn":["0278-6125"]},"year":"2024","title":"Data-driven simulation-based decision support system for resource allocation in industry 4.0 and smart manufacturing","doi":"10.1016/j.jmsy.2023.11.019","language":[{"iso":"eng"}],"citation":{"ama":"Mahmoodi E, Fathi M, Tavana M, Ghobakhloo M, Ng AHC. Data-driven simulation-based decision support system for resource allocation in industry 4.0 and smart manufacturing. <i>Journal of Manufacturing Systems</i>. 2024;72:287-307. doi:<a href=\"https://doi.org/10.1016/j.jmsy.2023.11.019\">10.1016/j.jmsy.2023.11.019</a>","bibtex":"@article{Mahmoodi_Fathi_Tavana_Ghobakhloo_Ng_2024, title={Data-driven simulation-based decision support system for resource allocation in industry 4.0 and smart manufacturing}, volume={72}, DOI={<a href=\"https://doi.org/10.1016/j.jmsy.2023.11.019\">10.1016/j.jmsy.2023.11.019</a>}, journal={Journal of Manufacturing Systems}, publisher={Elsevier BV}, author={Mahmoodi, Ehsan and Fathi, Masood and Tavana, Madjid and Ghobakhloo, Morteza and Ng, Amos H.C.}, year={2024}, pages={287–307} }","mla":"Mahmoodi, Ehsan, et al. “Data-Driven Simulation-Based Decision Support System for Resource Allocation in Industry 4.0 and Smart Manufacturing.” <i>Journal of Manufacturing Systems</i>, vol. 72, Elsevier BV, 2024, pp. 287–307, doi:<a href=\"https://doi.org/10.1016/j.jmsy.2023.11.019\">10.1016/j.jmsy.2023.11.019</a>.","chicago":"Mahmoodi, Ehsan, Masood Fathi, Madjid Tavana, Morteza Ghobakhloo, and Amos H.C. Ng. “Data-Driven Simulation-Based Decision Support System for Resource Allocation in Industry 4.0 and Smart Manufacturing.” <i>Journal of Manufacturing Systems</i> 72 (2024): 287–307. <a href=\"https://doi.org/10.1016/j.jmsy.2023.11.019\">https://doi.org/10.1016/j.jmsy.2023.11.019</a>.","short":"E. Mahmoodi, M. Fathi, M. Tavana, M. Ghobakhloo, A.H.C. Ng, Journal of Manufacturing Systems 72 (2024) 287–307.","apa":"Mahmoodi, E., Fathi, M., Tavana, M., Ghobakhloo, M., &#38; Ng, A. H. C. (2024). Data-driven simulation-based decision support system for resource allocation in industry 4.0 and smart manufacturing. <i>Journal of Manufacturing Systems</i>, <i>72</i>, 287–307. <a href=\"https://doi.org/10.1016/j.jmsy.2023.11.019\">https://doi.org/10.1016/j.jmsy.2023.11.019</a>","ieee":"E. Mahmoodi, M. Fathi, M. Tavana, M. Ghobakhloo, and A. H. C. Ng, “Data-driven simulation-based decision support system for resource allocation in industry 4.0 and smart manufacturing,” <i>Journal of Manufacturing Systems</i>, vol. 72, pp. 287–307, 2024, doi: <a href=\"https://doi.org/10.1016/j.jmsy.2023.11.019\">10.1016/j.jmsy.2023.11.019</a>."},"status":"public","volume":72,"user_id":"51811","_id":"53212","publisher":"Elsevier BV","page":"287-307"},{"citation":{"mla":"Sadeghi-Kohan, Somayeh, et al. “Workload-Aware Periodic Interconnect BIST.” <i>IEEE Design &#38;Test</i>, Institute of Electrical and Electronics Engineers (IEEE), 2023, pp. 1–1, doi:<a href=\"https://doi.org/10.1109/mdat.2023.3298849\">10.1109/mdat.2023.3298849</a>.","ama":"Sadeghi-Kohan S, Hellebrand S, Wunderlich H-J. Workload-Aware Periodic Interconnect BIST. <i>IEEE Design &#38;Test</i>. Published online 2023:1-1. doi:<a href=\"https://doi.org/10.1109/mdat.2023.3298849\">10.1109/mdat.2023.3298849</a>","bibtex":"@article{Sadeghi-Kohan_Hellebrand_Wunderlich_2023, title={Workload-Aware Periodic Interconnect BIST}, DOI={<a href=\"https://doi.org/10.1109/mdat.2023.3298849\">10.1109/mdat.2023.3298849</a>}, journal={IEEE Design &#38;Test}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Sadeghi-Kohan, Somayeh and Hellebrand, Sybille and Wunderlich, Hans-Joachim}, year={2023}, pages={1–1} }","apa":"Sadeghi-Kohan, S., Hellebrand, S., &#38; Wunderlich, H.-J. (2023). Workload-Aware Periodic Interconnect BIST. <i>IEEE Design &#38;Test</i>, 1–1. <a href=\"https://doi.org/10.1109/mdat.2023.3298849\">https://doi.org/10.1109/mdat.2023.3298849</a>","ieee":"S. Sadeghi-Kohan, S. Hellebrand, and H.-J. Wunderlich, “Workload-Aware Periodic Interconnect BIST,” <i>IEEE Design &#38;Test</i>, pp. 1–1, 2023, doi: <a href=\"https://doi.org/10.1109/mdat.2023.3298849\">10.1109/mdat.2023.3298849</a>.","short":"S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, IEEE Design &#38;Test (2023) 1–1.","chicago":"Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Workload-Aware Periodic Interconnect BIST.” <i>IEEE Design &#38;Test</i>, 2023, 1–1. <a href=\"https://doi.org/10.1109/mdat.2023.3298849\">https://doi.org/10.1109/mdat.2023.3298849</a>."},"user_id":"209","page":"1-1","_id":"46264","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","status":"public","keyword":["Electrical and Electronic Engineering","Hardware and Architecture","Software"],"type":"journal_article","department":[{"_id":"48"}],"date_created":"2023-08-02T11:07:43Z","abstract":[{"lang":"eng","text":"System-level interconnects provide the\r\nbackbone for increasingly complex systems on a chip. Their\r\nvulnerability to electromigration and crosstalk can lead to\r\nserious reliability and safety issues during the system lifetime.\r\nThis article presents an approach for periodic in-system testing\r\nwhich maintains a reliability profile to detect potential\r\nproblems before they actually cause a failure. Relying on a\r\ncommon infrastructure for EM-aware system workload\r\nmanagement and test, it minimizes the stress induced by the\r\ntest itself and contributes to the self-healing of system-induced\r\nelectromigration degradations. "}],"publication":"IEEE Design &Test","doi":"10.1109/mdat.2023.3298849","main_file_link":[{"url":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10194315"}],"language":[{"iso":"eng"}],"publication_status":"published","date_updated":"2024-03-22T17:15:10Z","article_type":"original","year":"2023","title":"Workload-Aware Periodic Interconnect BIST","publication_identifier":{"issn":["2168-2356","2168-2364"]},"author":[{"full_name":"Sadeghi-Kohan, Somayeh","orcid":"https://orcid.org/0000-0001-7246-0610","last_name":"Sadeghi-Kohan","first_name":"Somayeh","id":"78614"},{"id":"209","full_name":"Hellebrand, Sybille","first_name":"Sybille","orcid":"0000-0002-3717-3939","last_name":"Hellebrand"},{"full_name":"Wunderlich, Hans-Joachim","first_name":"Hans-Joachim","last_name":"Wunderlich"}]},{"author":[{"id":"31858","last_name":"Tavana","first_name":"Madjid","full_name":"Tavana, Madjid"},{"last_name":"Khalili Nasr","first_name":"Arash","full_name":"Khalili Nasr, Arash"},{"last_name":"Ahmadabadi","first_name":"Alireza Barati","full_name":"Ahmadabadi, Alireza Barati"},{"full_name":"Amiri, Alireza Shamekhi","first_name":"Alireza Shamekhi","last_name":"Amiri"},{"full_name":"Mina, Hassan","first_name":"Hassan","last_name":"Mina"}],"publication_identifier":{"issn":["2542-6605"]},"year":"2023","title":"An interval multi-criteria decision-making model for evaluating blockchain-IoT technology in supply chain networks","intvolume":"        22","date_updated":"2024-04-15T13:10:41Z","publication_status":"published","language":[{"iso":"eng"}],"article_number":"100786","doi":"10.1016/j.iot.2023.100786","publication":"Internet of Things","date_created":"2024-04-04T13:49:53Z","department":[{"_id":"277"}],"type":"journal_article","keyword":["Management of Technology and Innovation","Artificial Intelligence","Computer Science Applications","Hardware and Architecture","Engineering (miscellaneous)","Information Systems","Computer Science (miscellaneous)","Software"],"status":"public","publisher":"Elsevier BV","_id":"53220","volume":22,"user_id":"51811","citation":{"apa":"Tavana, M., Khalili Nasr, A., Ahmadabadi, A. B., Amiri, A. S., &#38; Mina, H. (2023). An interval multi-criteria decision-making model for evaluating blockchain-IoT technology in supply chain networks. <i>Internet of Things</i>, <i>22</i>, Article 100786. <a href=\"https://doi.org/10.1016/j.iot.2023.100786\">https://doi.org/10.1016/j.iot.2023.100786</a>","ieee":"M. Tavana, A. Khalili Nasr, A. B. Ahmadabadi, A. S. Amiri, and H. Mina, “An interval multi-criteria decision-making model for evaluating blockchain-IoT technology in supply chain networks,” <i>Internet of Things</i>, vol. 22, Art. no. 100786, 2023, doi: <a href=\"https://doi.org/10.1016/j.iot.2023.100786\">10.1016/j.iot.2023.100786</a>.","chicago":"Tavana, Madjid, Arash Khalili Nasr, Alireza Barati Ahmadabadi, Alireza Shamekhi Amiri, and Hassan Mina. “An Interval Multi-Criteria Decision-Making Model for Evaluating Blockchain-IoT Technology in Supply Chain Networks.” <i>Internet of Things</i> 22 (2023). <a href=\"https://doi.org/10.1016/j.iot.2023.100786\">https://doi.org/10.1016/j.iot.2023.100786</a>.","short":"M. Tavana, A. Khalili Nasr, A.B. Ahmadabadi, A.S. Amiri, H. Mina, Internet of Things 22 (2023).","mla":"Tavana, Madjid, et al. “An Interval Multi-Criteria Decision-Making Model for Evaluating Blockchain-IoT Technology in Supply Chain Networks.” <i>Internet of Things</i>, vol. 22, 100786, Elsevier BV, 2023, doi:<a href=\"https://doi.org/10.1016/j.iot.2023.100786\">10.1016/j.iot.2023.100786</a>.","ama":"Tavana M, Khalili Nasr A, Ahmadabadi AB, Amiri AS, Mina H. An interval multi-criteria decision-making model for evaluating blockchain-IoT technology in supply chain networks. <i>Internet of Things</i>. 2023;22. doi:<a href=\"https://doi.org/10.1016/j.iot.2023.100786\">10.1016/j.iot.2023.100786</a>","bibtex":"@article{Tavana_Khalili Nasr_Ahmadabadi_Amiri_Mina_2023, title={An interval multi-criteria decision-making model for evaluating blockchain-IoT technology in supply chain networks}, volume={22}, DOI={<a href=\"https://doi.org/10.1016/j.iot.2023.100786\">10.1016/j.iot.2023.100786</a>}, number={100786}, journal={Internet of Things}, publisher={Elsevier BV}, author={Tavana, Madjid and Khalili Nasr, Arash and Ahmadabadi, Alireza Barati and Amiri, Alireza Shamekhi and Mina, Hassan}, year={2023} }"}},{"_id":"45361","publisher":"SAGE Publications","user_id":"75963","status":"public","oa":"1","citation":{"bibtex":"@article{Schade_Kenter_Elgabarty_Lass_Kühne_Plessl_2023, title={Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics}, DOI={<a href=\"https://doi.org/10.1177/10943420231177631\">10.1177/10943420231177631</a>}, number={109434202311776}, journal={The International Journal of High Performance Computing Applications}, publisher={SAGE Publications}, author={Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Kühne, Thomas and Plessl, Christian}, year={2023} }","chicago":"Schade, Robert, Tobias Kenter, Hossam Elgabarty, Michael Lass, Thomas Kühne, and Christian Plessl. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.” <i>The International Journal of High Performance Computing Applications</i>, 2023. <a href=\"https://doi.org/10.1177/10943420231177631\">https://doi.org/10.1177/10943420231177631</a>.","ama":"Schade R, Kenter T, Elgabarty H, Lass M, Kühne T, Plessl C. Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics. <i>The International Journal of High Performance Computing Applications</i>. Published online 2023. doi:<a href=\"https://doi.org/10.1177/10943420231177631\">10.1177/10943420231177631</a>","short":"R. Schade, T. Kenter, H. Elgabarty, M. Lass, T. Kühne, C. Plessl, The International Journal of High Performance Computing Applications (2023).","ieee":"R. Schade, T. Kenter, H. Elgabarty, M. Lass, T. Kühne, and C. Plessl, “Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics,” <i>The International Journal of High Performance Computing Applications</i>, Art. no. 109434202311776, 2023, doi: <a href=\"https://doi.org/10.1177/10943420231177631\">10.1177/10943420231177631</a>.","mla":"Schade, Robert, et al. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.” <i>The International Journal of High Performance Computing Applications</i>, 109434202311776, SAGE Publications, 2023, doi:<a href=\"https://doi.org/10.1177/10943420231177631\">10.1177/10943420231177631</a>.","apa":"Schade, R., Kenter, T., Elgabarty, H., Lass, M., Kühne, T., &#38; Plessl, C. (2023). Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics. <i>The International Journal of High Performance Computing Applications</i>, Article 109434202311776. <a href=\"https://doi.org/10.1177/10943420231177631\">https://doi.org/10.1177/10943420231177631</a>"},"project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"quality_controlled":"1","language":[{"iso":"eng"}],"article_number":"109434202311776","main_file_link":[{"open_access":"1","url":"https://journals.sagepub.com/doi/10.1177/10943420231177631"}],"doi":"10.1177/10943420231177631","publication_identifier":{"issn":["1094-3420","1741-2846"]},"author":[{"orcid":"0000-0002-6268-539","first_name":"Robert","last_name":"Schade","full_name":"Schade, Robert","id":"75963"},{"id":"3145","full_name":"Kenter, Tobias","first_name":"Tobias","last_name":"Kenter"},{"id":"60250","full_name":"Elgabarty, Hossam","first_name":"Hossam","last_name":"Elgabarty","orcid":"0000-0002-4945-1481"},{"id":"24135","full_name":"Lass, Michael","first_name":"Michael","last_name":"Lass","orcid":"0000-0002-5708-7632"},{"last_name":"Kühne","first_name":"Thomas","full_name":"Kühne, Thomas","id":"49079"},{"id":"16153","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","first_name":"Christian","last_name":"Plessl"}],"title":"Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics","year":"2023","article_type":"original","publication_status":"published","date_updated":"2023-08-02T15:04:53Z","date_created":"2023-05-30T09:19:09Z","department":[{"_id":"27"},{"_id":"518"}],"type":"journal_article","keyword":["Hardware and Architecture","Theoretical Computer Science","Software"],"publication":"The International Journal of High Performance Computing Applications","abstract":[{"text":"<jats:p> The non-orthogonal local submatrix method applied to electronic structure–based molecular dynamics simulations is shown to exceed 1.1 EFLOP/s in FP16/FP32-mixed floating-point arithmetic when using 4400 NVIDIA A100 GPUs of the Perlmutter system. This is enabled by a modification of the original method that pushes the sustained fraction of the peak performance to about 80%. Example calculations are performed for SARS-CoV-2 spike proteins with up to 83 million atoms. </jats:p>","lang":"eng"}]},{"citation":{"mla":"Kontinen, Juha, et al. “A Parameterized View on the Complexity of Dependence and Independence Logic.” <i>Journal of Logic and Computation</i>, vol. 32, no. 8, Oxford University Press (OUP), 2022, pp. 1624–44, doi:<a href=\"https://doi.org/10.1093/logcom/exac070\">10.1093/logcom/exac070</a>.","ama":"Kontinen J, Meier A, Mahmood Y. A parameterized view on the complexity of dependence and independence logic. <i>Journal of Logic and Computation</i>. 2022;32(8):1624-1644. doi:<a href=\"https://doi.org/10.1093/logcom/exac070\">10.1093/logcom/exac070</a>","bibtex":"@article{Kontinen_Meier_Mahmood_2022, title={A parameterized view on the complexity of dependence and independence logic}, volume={32}, DOI={<a href=\"https://doi.org/10.1093/logcom/exac070\">10.1093/logcom/exac070</a>}, number={8}, journal={Journal of Logic and Computation}, publisher={Oxford University Press (OUP)}, author={Kontinen, Juha and Meier, Arne and Mahmood, Yasir}, year={2022}, pages={1624–1644} }","apa":"Kontinen, J., Meier, A., &#38; Mahmood, Y. (2022). A parameterized view on the complexity of dependence and independence logic. <i>Journal of Logic and Computation</i>, <i>32</i>(8), 1624–1644. <a href=\"https://doi.org/10.1093/logcom/exac070\">https://doi.org/10.1093/logcom/exac070</a>","ieee":"J. Kontinen, A. Meier, and Y. Mahmood, “A parameterized view on the complexity of dependence and independence logic,” <i>Journal of Logic and Computation</i>, vol. 32, no. 8, pp. 1624–1644, 2022, doi: <a href=\"https://doi.org/10.1093/logcom/exac070\">10.1093/logcom/exac070</a>.","short":"J. Kontinen, A. Meier, Y. Mahmood, Journal of Logic and Computation 32 (2022) 1624–1644.","chicago":"Kontinen, Juha, Arne Meier, and Yasir Mahmood. “A Parameterized View on the Complexity of Dependence and Independence Logic.” <i>Journal of Logic and Computation</i> 32, no. 8 (2022): 1624–44. <a href=\"https://doi.org/10.1093/logcom/exac070\">https://doi.org/10.1093/logcom/exac070</a>."},"volume":32,"user_id":"99353","_id":"45847","publisher":"Oxford University Press (OUP)","page":"1624-1644","status":"public","keyword":["Logic","Hardware and Architecture","Arts and Humanities (miscellaneous)","Software","Theoretical Computer Science"],"type":"journal_article","date_created":"2023-07-03T11:36:55Z","extern":"1","abstract":[{"text":"<jats:title>Abstract</jats:title>\r\n               <jats:p>In this paper, we investigate the parameterized complexity of model checking for Dependence and Independence logic, which are well studied logics in the area of Team Semantics. We start with a list of nine immediate parameterizations for this problem, namely the number of disjunctions (i.e. splits)/(free) variables/universal quantifiers, formula-size, the tree-width of the Gaifman graph of the input structure, the size of the universe/team and the arity of dependence atoms. We present a comprehensive picture of the parameterized complexity of model checking and obtain a division of the problem into tractable and various intractable degrees. Furthermore, we also consider the complexity of the most important variants (data and expression complexity) of the model checking problem by fixing parts of the input.</jats:p>","lang":"eng"}],"issue":"8","publication":"Journal of Logic and Computation","doi":"10.1093/logcom/exac070","language":[{"iso":"eng"}],"intvolume":"        32","publication_status":"published","date_updated":"2024-06-04T16:06:37Z","publication_identifier":{"issn":["0955-792X","1465-363X"]},"author":[{"full_name":"Kontinen, Juha","first_name":"Juha","last_name":"Kontinen"},{"last_name":"Meier","first_name":"Arne","full_name":"Meier, Arne"},{"id":"99353","first_name":"Yasir","last_name":"Mahmood","full_name":"Mahmood, Yasir"}],"title":"A parameterized view on the complexity of dependence and independence logic","year":"2022"},{"date_created":"2022-10-11T08:17:02Z","keyword":["Artificial Intelligence","Computer Graphics and Computer-Aided Design","Computer Networks and Communications","Hardware and Architecture","Theoretical Computer Science","Software"],"type":"journal_article","department":[{"_id":"613"},{"_id":"27"},{"_id":"518"}],"publication":"Parallel Computing","article_number":"102920","main_file_link":[{"url":"https://www.sciencedirect.com/science/article/pii/S0167819122000242","open_access":"1"}],"language":[{"iso":"eng"}],"doi":"10.1016/j.parco.2022.102920","year":"2022","title":"Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms","publication_identifier":{"issn":["0167-8191"]},"author":[{"id":"75963","full_name":"Schade, Robert","orcid":"0000-0002-6268-539","last_name":"Schade","first_name":"Robert"},{"id":"3145","first_name":"Tobias","last_name":"Kenter","full_name":"Kenter, Tobias"},{"id":"60250","full_name":"Elgabarty, Hossam","first_name":"Hossam","orcid":"0000-0002-4945-1481","last_name":"Elgabarty"},{"id":"24135","full_name":"Lass, Michael","last_name":"Lass","orcid":"0000-0002-5708-7632","first_name":"Michael"},{"first_name":"Ole","last_name":"Schütt","full_name":"Schütt, Ole"},{"last_name":"Lazzaro","first_name":"Alfio","full_name":"Lazzaro, Alfio"},{"full_name":"Pabst, Hans","first_name":"Hans","last_name":"Pabst"},{"full_name":"Mohr, Stephan","first_name":"Stephan","last_name":"Mohr"},{"first_name":"Jürg","last_name":"Hutter","full_name":"Hutter, Jürg"},{"last_name":"Kühne","first_name":"Thomas","full_name":"Kühne, Thomas","id":"49079"},{"id":"16153","last_name":"Plessl","first_name":"Christian","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"publication_status":"published","date_updated":"2023-08-02T15:03:55Z","intvolume":"       111","oa":"1","citation":{"ieee":"R. Schade <i>et al.</i>, “Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms,” <i>Parallel Computing</i>, vol. 111, Art. no. 102920, 2022, doi: <a href=\"https://doi.org/10.1016/j.parco.2022.102920\">10.1016/j.parco.2022.102920</a>.","apa":"Schade, R., Kenter, T., Elgabarty, H., Lass, M., Schütt, O., Lazzaro, A., Pabst, H., Mohr, S., Hutter, J., Kühne, T., &#38; Plessl, C. (2022). Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms. <i>Parallel Computing</i>, <i>111</i>, Article 102920. <a href=\"https://doi.org/10.1016/j.parco.2022.102920\">https://doi.org/10.1016/j.parco.2022.102920</a>","short":"R. Schade, T. Kenter, H. Elgabarty, M. Lass, O. Schütt, A. Lazzaro, H. Pabst, S. Mohr, J. Hutter, T. Kühne, C. Plessl, Parallel Computing 111 (2022).","chicago":"Schade, Robert, Tobias Kenter, Hossam Elgabarty, Michael Lass, Ole Schütt, Alfio Lazzaro, Hans Pabst, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.” <i>Parallel Computing</i> 111 (2022). <a href=\"https://doi.org/10.1016/j.parco.2022.102920\">https://doi.org/10.1016/j.parco.2022.102920</a>.","mla":"Schade, Robert, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.” <i>Parallel Computing</i>, vol. 111, 102920, Elsevier BV, 2022, doi:<a href=\"https://doi.org/10.1016/j.parco.2022.102920\">10.1016/j.parco.2022.102920</a>.","bibtex":"@article{Schade_Kenter_Elgabarty_Lass_Schütt_Lazzaro_Pabst_Mohr_Hutter_Kühne_et al._2022, title={Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms}, volume={111}, DOI={<a href=\"https://doi.org/10.1016/j.parco.2022.102920\">10.1016/j.parco.2022.102920</a>}, number={102920}, journal={Parallel Computing}, publisher={Elsevier BV}, author={Schade, Robert and Kenter, Tobias and Elgabarty, Hossam and Lass, Michael and Schütt, Ole and Lazzaro, Alfio and Pabst, Hans and Mohr, Stephan and Hutter, Jürg and Kühne, Thomas and et al.}, year={2022} }","ama":"Schade R, Kenter T, Elgabarty H, et al. Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms. <i>Parallel Computing</i>. 2022;111. doi:<a href=\"https://doi.org/10.1016/j.parco.2022.102920\">10.1016/j.parco.2022.102920</a>"},"quality_controlled":"1","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"_id":"33684","publisher":"Elsevier BV","user_id":"75963","volume":111,"status":"public"},{"publication_status":"published","date_updated":"2022-04-18T10:04:21Z","author":[{"first_name":"Alfonso","last_name":"Rodriguez","full_name":"Rodriguez, Alfonso"},{"full_name":"Otero, Andres","first_name":"Andres","last_name":"Otero"},{"id":"398","first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco"},{"full_name":"De la Torre, Eduardo","first_name":"Eduardo","last_name":"De la Torre"}],"publication_identifier":{"issn":["0018-9340","1557-9956","2326-3814"]},"status":"public","year":"2021","title":"Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs","user_id":"398","doi":"10.1109/tc.2021.3107196","_id":"30907","language":[{"iso":"eng"}],"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","page":"1-1","citation":{"mla":"Rodriguez, Alfonso, et al. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.” <i>IEEE Transactions on Computers</i>, Institute of Electrical and Electronics Engineers (IEEE), 2021, pp. 1–1, doi:<a href=\"https://doi.org/10.1109/tc.2021.3107196\">10.1109/tc.2021.3107196</a>.","ama":"Rodriguez A, Otero A, Platzner M, De la Torre E. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. <i>IEEE Transactions on Computers</i>. Published online 2021:1-1. doi:<a href=\"https://doi.org/10.1109/tc.2021.3107196\">10.1109/tc.2021.3107196</a>","bibtex":"@article{Rodriguez_Otero_Platzner_De la Torre_2021, title={Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs}, DOI={<a href=\"https://doi.org/10.1109/tc.2021.3107196\">10.1109/tc.2021.3107196</a>}, journal={IEEE Transactions on Computers}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Rodriguez, Alfonso and Otero, Andres and Platzner, Marco and De la Torre, Eduardo}, year={2021}, pages={1–1} }","apa":"Rodriguez, A., Otero, A., Platzner, M., &#38; De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. <i>IEEE Transactions on Computers</i>, 1–1. <a href=\"https://doi.org/10.1109/tc.2021.3107196\">https://doi.org/10.1109/tc.2021.3107196</a>","ieee":"A. Rodriguez, A. Otero, M. Platzner, and E. De la Torre, “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs,” <i>IEEE Transactions on Computers</i>, pp. 1–1, 2021, doi: <a href=\"https://doi.org/10.1109/tc.2021.3107196\">10.1109/tc.2021.3107196</a>.","short":"A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on Computers (2021) 1–1.","chicago":"Rodriguez, Alfonso, Andres Otero, Marco Platzner, and Eduardo De la Torre. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.” <i>IEEE Transactions on Computers</i>, 2021, 1–1. <a href=\"https://doi.org/10.1109/tc.2021.3107196\">https://doi.org/10.1109/tc.2021.3107196</a>."},"publication":"IEEE Transactions on Computers","department":[{"_id":"78"}],"type":"journal_article","keyword":["Computational Theory and Mathematics","Hardware and Architecture","Theoretical Computer Science","Software"],"date_created":"2022-04-18T10:03:16Z"},{"citation":{"ama":"Mahmood Y, Meier A, Schmidt J. Parameterized complexity of abduction in Schaefer’s framework. <i>Journal of Logic and Computation</i>. 2021;31(1):266-296. doi:<a href=\"https://doi.org/10.1093/logcom/exaa079\">10.1093/logcom/exaa079</a>","bibtex":"@article{Mahmood_Meier_Schmidt_2021, title={Parameterized complexity of abduction in Schaefer’s framework}, volume={31}, DOI={<a href=\"https://doi.org/10.1093/logcom/exaa079\">10.1093/logcom/exaa079</a>}, number={1}, journal={Journal of Logic and Computation}, publisher={Oxford University Press (OUP)}, author={Mahmood, Yasir and Meier, Arne and Schmidt, Johannes}, year={2021}, pages={266–296} }","mla":"Mahmood, Yasir, et al. “Parameterized Complexity of Abduction in Schaefer’s Framework.” <i>Journal of Logic and Computation</i>, vol. 31, no. 1, Oxford University Press (OUP), 2021, pp. 266–96, doi:<a href=\"https://doi.org/10.1093/logcom/exaa079\">10.1093/logcom/exaa079</a>.","short":"Y. Mahmood, A. Meier, J. Schmidt, Journal of Logic and Computation 31 (2021) 266–296.","chicago":"Mahmood, Yasir, Arne Meier, and Johannes Schmidt. “Parameterized Complexity of Abduction in Schaefer’s Framework.” <i>Journal of Logic and Computation</i> 31, no. 1 (2021): 266–96. <a href=\"https://doi.org/10.1093/logcom/exaa079\">https://doi.org/10.1093/logcom/exaa079</a>.","apa":"Mahmood, Y., Meier, A., &#38; Schmidt, J. (2021). Parameterized complexity of abduction in Schaefer’s framework. <i>Journal of Logic and Computation</i>, <i>31</i>(1), 266–296. <a href=\"https://doi.org/10.1093/logcom/exaa079\">https://doi.org/10.1093/logcom/exaa079</a>","ieee":"Y. Mahmood, A. Meier, and J. Schmidt, “Parameterized complexity of abduction in Schaefer’s framework,” <i>Journal of Logic and Computation</i>, vol. 31, no. 1, pp. 266–296, 2021, doi: <a href=\"https://doi.org/10.1093/logcom/exaa079\">10.1093/logcom/exaa079</a>."},"status":"public","volume":31,"user_id":"99353","publisher":"Oxford University Press (OUP)","_id":"45844","page":"266-296","extern":"1","abstract":[{"lang":"eng","text":"<jats:title>Abstract</jats:title>\r\n               <jats:p>Abductive reasoning is a non-monotonic formalism stemming from the work of Peirce. It describes the process of deriving the most plausible explanations of known facts. Considering the positive version, asking for sets of variables as explanations, we study, besides the problem of wether there exists a set of explanations, two explanation size limited variants of this reasoning problem (less than or equal to, and equal to a given size bound). In this paper, we present a thorough two-dimensional classification of these problems: the first dimension is regarding the parameterized complexity under a wealth of different parameterizations, and the second dimension spans through all possible Boolean fragments of these problems in Schaefer’s constraint satisfaction framework with co-clones (T. J. Schaefer. The complexity of satisfiability problems. In Proceedings of the 10th Annual ACM Symposium on Theory of Computing, May 1–3, 1978, San Diego, California, USA, R.J. Lipton, W.A. Burkhard, W.J. Savitch, E.P. Friedman, A.V. Aho eds, pp. 216–226. ACM, 1978). Thereby, we almost complete the parameterized complexity classification program initiated by Fellows et al. (The parameterized complexity of abduction. In Proceedings of the Twenty-Sixth AAAI Conference on Articial Intelligence, July 22–26, 2012, Toronto, Ontario, Canada, J. Homann, B. Selman eds. AAAI Press, 2012), partially building on the results by Nordh and Zanuttini (What makes propositional abduction tractable. Artificial Intelligence, 172, 1245–1284, 2008). In this process, we outline a fine-grained analysis of the inherent parameterized intractability of these problems and pinpoint their FPT parts. As the standard algebraic approach is not applicable to our problems, we develop an alternative method that makes the algebraic tools partially available again.</jats:p>"}],"issue":"1","publication":"Journal of Logic and Computation","department":[{"_id":"574"}],"keyword":["Logic","Hardware and Architecture","Arts and Humanities (miscellaneous)","Software","Theoretical Computer Science"],"type":"journal_article","date_created":"2023-07-03T11:35:23Z","intvolume":"        31","publication_status":"published","date_updated":"2024-06-04T16:03:14Z","author":[{"full_name":"Mahmood, Yasir","first_name":"Yasir","last_name":"Mahmood"},{"full_name":"Meier, Arne","first_name":"Arne","last_name":"Meier"},{"full_name":"Schmidt, Johannes","last_name":"Schmidt","first_name":"Johannes"}],"publication_identifier":{"issn":["0955-792X","1465-363X"]},"year":"2021","title":"Parameterized complexity of abduction in Schaefer’s framework","doi":"10.1093/logcom/exaa079","language":[{"iso":"eng"}]},{"language":[{"iso":"eng"}],"doi":"10.3390/electronics4030480","year":"2015","title":"Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors","publication_identifier":{"issn":["2079-9292"]},"author":[{"first_name":"Fábio","last_name":"Vidor","full_name":"Vidor, Fábio"},{"last_name":"Meyers","first_name":"Thorsten","full_name":"Meyers, Thorsten"},{"id":"20179","last_name":"Hilleringmann","first_name":"Ulrich","full_name":"Hilleringmann, Ulrich"}],"date_updated":"2023-03-21T10:16:23Z","publication_status":"published","intvolume":"         4","date_created":"2023-01-24T11:23:57Z","type":"journal_article","keyword":["Electrical and Electronic Engineering","Computer Networks and Communications","Hardware and Architecture","Signal Processing","Control and Systems Engineering"],"department":[{"_id":"59"}],"publication":"Electronics","issue":"3","page":"480-506","publisher":"MDPI AG","_id":"39479","user_id":"20179","volume":4,"status":"public","citation":{"mla":"Vidor, Fábio, et al. “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors.” <i>Electronics</i>, vol. 4, no. 3, MDPI AG, 2015, pp. 480–506, doi:<a href=\"https://doi.org/10.3390/electronics4030480\">10.3390/electronics4030480</a>.","bibtex":"@article{Vidor_Meyers_Hilleringmann_2015, title={Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors}, volume={4}, DOI={<a href=\"https://doi.org/10.3390/electronics4030480\">10.3390/electronics4030480</a>}, number={3}, journal={Electronics}, publisher={MDPI AG}, author={Vidor, Fábio and Meyers, Thorsten and Hilleringmann, Ulrich}, year={2015}, pages={480–506} }","ama":"Vidor F, Meyers T, Hilleringmann U. Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors. <i>Electronics</i>. 2015;4(3):480-506. doi:<a href=\"https://doi.org/10.3390/electronics4030480\">10.3390/electronics4030480</a>","ieee":"F. Vidor, T. Meyers, and U. Hilleringmann, “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors,” <i>Electronics</i>, vol. 4, no. 3, pp. 480–506, 2015, doi: <a href=\"https://doi.org/10.3390/electronics4030480\">10.3390/electronics4030480</a>.","apa":"Vidor, F., Meyers, T., &#38; Hilleringmann, U. (2015). Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors. <i>Electronics</i>, <i>4</i>(3), 480–506. <a href=\"https://doi.org/10.3390/electronics4030480\">https://doi.org/10.3390/electronics4030480</a>","chicago":"Vidor, Fábio, Thorsten Meyers, and Ulrich Hilleringmann. “Flexible Electronics: Integration Processes for Organic and Inorganic Semiconductor-Based Thin-Film Transistors.” <i>Electronics</i> 4, no. 3 (2015): 480–506. <a href=\"https://doi.org/10.3390/electronics4030480\">https://doi.org/10.3390/electronics4030480</a>.","short":"F. Vidor, T. Meyers, U. Hilleringmann, Electronics 4 (2015) 480–506."}},{"year":"2014","status":"public","title":"A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs","author":[{"first_name":"Bijan","last_name":"Alizadeh","full_name":"Alizadeh, Bijan"},{"first_name":"Payman","last_name":"Behnam","full_name":"Behnam, Payman"},{"last_name":"Sadeghi-Kohan","first_name":"Somayeh","orcid":"https://orcid.org/0000-0001-7246-0610","full_name":"Sadeghi-Kohan, Somayeh","id":"78614"}],"publication_identifier":{"issn":["0018-9340"]},"publication_status":"published","date_updated":"2023-08-02T11:32:37Z","page":"1-1","_id":"46266","language":[{"iso":"eng"}],"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","user_id":"78614","doi":"10.1109/tc.2014.2329687","publication":"IEEE Transactions on Computers","citation":{"mla":"Alizadeh, Bijan, et al. “A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs.” <i>IEEE Transactions on Computers</i>, Institute of Electrical and Electronics Engineers (IEEE), 2014, pp. 1–1, doi:<a href=\"https://doi.org/10.1109/tc.2014.2329687\">10.1109/tc.2014.2329687</a>.","ama":"Alizadeh B, Behnam P, Sadeghi-Kohan S. A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs. <i>IEEE Transactions on Computers</i>. Published online 2014:1-1. doi:<a href=\"https://doi.org/10.1109/tc.2014.2329687\">10.1109/tc.2014.2329687</a>","bibtex":"@article{Alizadeh_Behnam_Sadeghi-Kohan_2014, title={A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs}, DOI={<a href=\"https://doi.org/10.1109/tc.2014.2329687\">10.1109/tc.2014.2329687</a>}, journal={IEEE Transactions on Computers}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Alizadeh, Bijan and Behnam, Payman and Sadeghi-Kohan, Somayeh}, year={2014}, pages={1–1} }","apa":"Alizadeh, B., Behnam, P., &#38; Sadeghi-Kohan, S. (2014). A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs. <i>IEEE Transactions on Computers</i>, 1–1. <a href=\"https://doi.org/10.1109/tc.2014.2329687\">https://doi.org/10.1109/tc.2014.2329687</a>","ieee":"B. Alizadeh, P. Behnam, and S. Sadeghi-Kohan, “A Scalable Formal Debugging Approach with Auto-Correction Capability based on Static Slicing and Dynamic Ranking for RTL Datapath Designs,” <i>IEEE Transactions on Computers</i>, pp. 1–1, 2014, doi: <a href=\"https://doi.org/10.1109/tc.2014.2329687\">10.1109/tc.2014.2329687</a>.","chicago":"Alizadeh, Bijan, Payman Behnam, and Somayeh Sadeghi-Kohan. “A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs.” <i>IEEE Transactions on Computers</i>, 2014, 1–1. <a href=\"https://doi.org/10.1109/tc.2014.2329687\">https://doi.org/10.1109/tc.2014.2329687</a>.","short":"B. Alizadeh, P. Behnam, S. Sadeghi-Kohan, IEEE Transactions on Computers (2014) 1–1."},"extern":"1","date_created":"2023-08-02T11:15:22Z","keyword":["Computational Theory and Mathematics","Hardware and Architecture","Theoretical Computer Science","Software"],"type":"journal_article","department":[{"_id":"48"}]},{"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","_id":"39925","page":"28-44","volume":9,"user_id":"20179","status":"public","citation":{"ama":"Goser K, Hilleringmann U, Rueckert U, Schumacher K. VLSI technologies for artificial neural networks. <i>IEEE Micro</i>. 2002;9(6):28-44. doi:<a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>","bibtex":"@article{Goser_Hilleringmann_Rueckert_Schumacher_2002, title={VLSI technologies for artificial neural networks}, volume={9}, DOI={<a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>}, number={6}, journal={IEEE Micro}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Goser, K. and Hilleringmann, Ulrich and Rueckert, U. and Schumacher, K.}, year={2002}, pages={28–44} }","mla":"Goser, K., et al. “VLSI Technologies for Artificial Neural Networks.” <i>IEEE Micro</i>, vol. 9, no. 6, Institute of Electrical and Electronics Engineers (IEEE), 2002, pp. 28–44, doi:<a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>.","chicago":"Goser, K., Ulrich Hilleringmann, U. Rueckert, and K. Schumacher. “VLSI Technologies for Artificial Neural Networks.” <i>IEEE Micro</i> 9, no. 6 (2002): 28–44. <a href=\"https://doi.org/10.1109/40.42985\">https://doi.org/10.1109/40.42985</a>.","short":"K. Goser, U. Hilleringmann, U. Rueckert, K. Schumacher, IEEE Micro 9 (2002) 28–44.","apa":"Goser, K., Hilleringmann, U., Rueckert, U., &#38; Schumacher, K. (2002). VLSI technologies for artificial neural networks. <i>IEEE Micro</i>, <i>9</i>(6), 28–44. <a href=\"https://doi.org/10.1109/40.42985\">https://doi.org/10.1109/40.42985</a>","ieee":"K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,” <i>IEEE Micro</i>, vol. 9, no. 6, pp. 28–44, 2002, doi: <a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>."},"language":[{"iso":"eng"}],"doi":"10.1109/40.42985","publication_identifier":{"issn":["0272-1732"]},"author":[{"full_name":"Goser, K.","first_name":"K.","last_name":"Goser"},{"full_name":"Hilleringmann, Ulrich","last_name":"Hilleringmann","first_name":"Ulrich","id":"20179"},{"full_name":"Rueckert, U.","first_name":"U.","last_name":"Rueckert"},{"last_name":"Schumacher","first_name":"K.","full_name":"Schumacher, K."}],"year":"2002","title":"VLSI technologies for artificial neural networks","intvolume":"         9","date_updated":"2023-03-21T09:57:17Z","publication_status":"published","date_created":"2023-01-25T09:33:18Z","department":[{"_id":"59"}],"keyword":["Electrical and Electronic Engineering","Hardware and Architecture","Software"],"type":"journal_article","issue":"6","publication":"IEEE Micro"},{"keyword":["Electrical and Electronic Engineering","Hardware and Architecture","Software"],"type":"journal_article","department":[{"_id":"59"}],"date_created":"2023-01-25T09:33:50Z","publication":"IEEE Micro","issue":"6","doi":"10.1109/40.42985","language":[{"iso":"eng"}],"date_updated":"2023-03-22T10:36:45Z","publication_status":"published","intvolume":"         9","title":"VLSI technologies for artificial neural networks","year":"2002","publication_identifier":{"issn":["0272-1732"]},"author":[{"full_name":"Goser, K.","first_name":"K.","last_name":"Goser"},{"id":"20179","last_name":"Hilleringmann","first_name":"Ulrich","full_name":"Hilleringmann, Ulrich"},{"first_name":"U.","last_name":"Rueckert","full_name":"Rueckert, U."},{"first_name":"K.","last_name":"Schumacher","full_name":"Schumacher, K."}],"citation":{"mla":"Goser, K., et al. “VLSI Technologies for Artificial Neural Networks.” <i>IEEE Micro</i>, vol. 9, no. 6, Institute of Electrical and Electronics Engineers (IEEE), 2002, pp. 28–44, doi:<a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>.","bibtex":"@article{Goser_Hilleringmann_Rueckert_Schumacher_2002, title={VLSI technologies for artificial neural networks}, volume={9}, DOI={<a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>}, number={6}, journal={IEEE Micro}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Goser, K. and Hilleringmann, Ulrich and Rueckert, U. and Schumacher, K.}, year={2002}, pages={28–44} }","ama":"Goser K, Hilleringmann U, Rueckert U, Schumacher K. VLSI technologies for artificial neural networks. <i>IEEE Micro</i>. 2002;9(6):28-44. doi:<a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>","ieee":"K. Goser, U. Hilleringmann, U. Rueckert, and K. Schumacher, “VLSI technologies for artificial neural networks,” <i>IEEE Micro</i>, vol. 9, no. 6, pp. 28–44, 2002, doi: <a href=\"https://doi.org/10.1109/40.42985\">10.1109/40.42985</a>.","apa":"Goser, K., Hilleringmann, U., Rueckert, U., &#38; Schumacher, K. (2002). VLSI technologies for artificial neural networks. <i>IEEE Micro</i>, <i>9</i>(6), 28–44. <a href=\"https://doi.org/10.1109/40.42985\">https://doi.org/10.1109/40.42985</a>","short":"K. Goser, U. Hilleringmann, U. Rueckert, K. Schumacher, IEEE Micro 9 (2002) 28–44.","chicago":"Goser, K., Ulrich Hilleringmann, U. Rueckert, and K. Schumacher. “VLSI Technologies for Artificial Neural Networks.” <i>IEEE Micro</i> 9, no. 6 (2002): 28–44. <a href=\"https://doi.org/10.1109/40.42985\">https://doi.org/10.1109/40.42985</a>."},"user_id":"20179","volume":9,"page":"28-44","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","_id":"39926","status":"public"}]