---
_id: '10674'
author:
- first_name: Nam
full_name: Ho, Nam
last_name: Ho
- first_name: Paul
full_name: Kaufmann, Paul
last_name: Kaufmann
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
citation:
ama: 'Ho N, Kaufmann P, Platzner M. A hardware/software infrastructure for performance
monitoring on LEON3 multicore platforms. In: 24th Intl. Conf. on Field Programmable
Logic and Applications (FPL). ; 2014:1-4. doi:10.1109/FPL.2014.6927437'
apa: Ho, N., Kaufmann, P., & Platzner, M. (2014). A hardware/software infrastructure
for performance monitoring on LEON3 multicore platforms. In 24th Intl. Conf.
on Field Programmable Logic and Applications (FPL) (pp. 1–4). https://doi.org/10.1109/FPL.2014.6927437
bibtex: '@inproceedings{Ho_Kaufmann_Platzner_2014, title={A hardware/software infrastructure
for performance monitoring on LEON3 multicore platforms}, DOI={10.1109/FPL.2014.6927437},
booktitle={24th Intl. Conf. on Field Programmable Logic and Applications (FPL)},
author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2014}, pages={1–4}
}'
chicago: Ho, Nam, Paul Kaufmann, and Marco Platzner. “A Hardware/Software Infrastructure
for Performance Monitoring on LEON3 Multicore Platforms.” In 24th Intl. Conf.
on Field Programmable Logic and Applications (FPL), 1–4, 2014. https://doi.org/10.1109/FPL.2014.6927437.
ieee: N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for
performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on
Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.
mla: Ho, Nam, et al. “A Hardware/Software Infrastructure for Performance Monitoring
on LEON3 Multicore Platforms.” 24th Intl. Conf. on Field Programmable Logic
and Applications (FPL), 2014, pp. 1–4, doi:10.1109/FPL.2014.6927437.
short: 'N. Ho, P. Kaufmann, M. Platzner, in: 24th Intl. Conf. on Field Programmable
Logic and Applications (FPL), 2014, pp. 1–4.'
date_created: 2019-07-10T11:18:01Z
date_updated: 2022-01-06T06:50:49Z
department:
- _id: '78'
doi: 10.1109/FPL.2014.6927437
keyword:
- Linux
- hardware-software codesign
- multiprocessing systems
- parallel processing
- LEON3 multicore platform
- Linux kernel
- PMU
- hardware counters
- hardware-software infrastructure
- high performance embedded computing
- perf_event
- performance monitoring unit
- Computer architecture
- Hardware
- Monitoring
- Phasor measurement units
- Radiation detectors
- Registers
- Software
language:
- iso: eng
page: 1-4
project:
- _id: '31'
grant_number: '257906'
name: Engineering Proprioception in Computing Systems
publication: 24th Intl. Conf. on Field Programmable Logic and Applications (FPL)
status: public
title: A hardware/software infrastructure for performance monitoring on LEON3 multicore
platforms
type: conference
user_id: '3118'
year: '2014'
...
---
_id: '37046'
abstract:
- lang: eng
text: In this article, we present a flexible simulation environment for embedded
real-time software refinement by a mixed level cosimulation. For this, we combine
the native speed of an abstract real-time operating system (RTOS) model in SystemC
with dynamic binary translation for fast Instruction Set Simulation (ISS) by QEMU.
In order to support stepwise RTOS software refinement from system level to the
target software, each task can be separately migrated between the native execution
and the ISS. By adapting the dynamic binary translation approach to an efficient
but yet very accurate synchronization scheme the overhead of QEMU user mode execution
is only factor two compared to native SystemC. Furthermore, the simulation speed
increases almost linearly according to the utilization of the task set abstracted
by the native execution. Hereby, the simulation time can be considerably reduced
by cosimulating just a subset of tasks on QEMU.
author:
- first_name: Markus
full_name: Becker, Markus
last_name: Becker
- first_name: Henning
full_name: Zabel, Henning
last_name: Zabel
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Becker M, Zabel H, Müller W. A Mixed Level Simulation Environment for Stepwise
RTOS Software Refinement. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag;
2010. doi:10.1007/978-3-642-15234-4_15'
apa: Becker, M., Zabel, H., & Müller, W. (2010). A Mixed Level Simulation
Environment for Stepwise RTOS Software Refinement (L. Kleinjohann & B.
Kleinjohann, Eds.). Springer Verlag. https://doi.org/10.1007/978-3-642-15234-4_15
bibtex: '@inproceedings{Becker_Zabel_Müller_2010, place={Dordrecht}, title={A Mixed
Level Simulation Environment for Stepwise RTOS Software Refinement}, DOI={10.1007/978-3-642-15234-4_15},
publisher={Springer Verlag}, author={Becker, Markus and Zabel, Henning and Müller,
Wolfgang}, editor={Kleinjohann, L. and Kleinjohann, B.}, year={2010} }'
chicago: 'Becker, Markus, Henning Zabel, and Wolfgang Müller. “A Mixed Level Simulation
Environment for Stepwise RTOS Software Refinement.” edited by L. Kleinjohann and
B. Kleinjohann. Dordrecht: Springer Verlag, 2010. https://doi.org/10.1007/978-3-642-15234-4_15.'
ieee: 'M. Becker, H. Zabel, and W. Müller, “A Mixed Level Simulation Environment
for Stepwise RTOS Software Refinement,” 2010, doi: 10.1007/978-3-642-15234-4_15.'
mla: Becker, Markus, et al. A Mixed Level Simulation Environment for Stepwise
RTOS Software Refinement. Edited by L. Kleinjohann and B. Kleinjohann, Springer
Verlag, 2010, doi:10.1007/978-3-642-15234-4_15.
short: 'M. Becker, H. Zabel, W. Müller, in: L. Kleinjohann, B. Kleinjohann (Eds.),
Springer Verlag, Dordrecht, 2010.'
conference:
name: IFIP Working Conference on Distributed and Parallel Embedded Systems (DIPES
2010)
date_created: 2023-01-17T11:01:30Z
date_updated: 2023-01-17T11:03:00Z
department:
- _id: '672'
doi: 10.1007/978-3-642-15234-4_15
editor:
- first_name: L.
full_name: Kleinjohann, L.
last_name: Kleinjohann
- first_name: B.
full_name: Kleinjohann, B.
last_name: Kleinjohann
keyword:
- Application Programming Interface User Mode Kernel Space System Level
Design Mixed Level
language:
- iso: eng
place: Dordrecht
publication_identifier:
isbn:
- 978-3-642-15233-7
publisher: Springer Verlag
status: public
title: A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '39382'
abstract:
- lang: eng
text: We present a rigorous but transparent semantics definition of the SpecC language
that covers the execution of SpecC behaviors and their interaction with the kernel
process. The semantics include wait, wait for, par, and try statements as they
are introduced in SpecC. We present our definition in form of distributed abstract
state machine (ASM) rules strictly following the lines of the SpecC Language Reference
Manual. We mainly see our formal semantics in three application areas. First,
it is a concise, unambiguous description for documentation and standardization.
Second, it applies as a high-level, pseudo code-oriented specification for the
implementation of a SpecC simulator. Finally, it is a first step for SpecC synthesis
in order to identify similar concepts with other languages like VHDL and SystemC
for the definition of common patterns and language subsets.
author:
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Rainer
full_name: Dömer, Rainer
last_name: Dömer
- first_name: Andreas
full_name: Gerstlauer, Andreas
last_name: Gerstlauer
citation:
ama: 'Müller W, Dömer R, Gerstlauer A. The Formal Execution Semantics of SpecC.
In: Proceedings of the ISSS02. ; 2002. doi:10.1145/581199.581234 '
apa: Müller, W., Dömer, R., & Gerstlauer, A. (2002). The Formal Execution Semantics
of SpecC. Proceedings of the ISSS02. https://doi.org/10.1145/581199.581234
bibtex: '@inproceedings{Müller_Dömer_Gerstlauer_2002, place={Nagoya, Japan}, title={The
Formal Execution Semantics of SpecC}, DOI={10.1145/581199.581234 }, booktitle={Proceedings of the ISSS02}, author={Müller,
Wolfgang and Dömer, Rainer and Gerstlauer, Andreas}, year={2002} }'
chicago: Müller, Wolfgang, Rainer Dömer, and Andreas Gerstlauer. “The Formal Execution
Semantics of SpecC.” In Proceedings of the ISSS02. Nagoya, Japan, 2002.
https://doi.org/10.1145/581199.581234
.
ieee: 'W. Müller, R. Dömer, and A. Gerstlauer, “The Formal Execution Semantics of
SpecC,” 2002, doi: 10.1145/581199.581234
.'
mla: Müller, Wolfgang, et al. “The Formal Execution Semantics of SpecC.” Proceedings
of the ISSS02, 2002, doi:10.1145/581199.581234
.
short: 'W. Müller, R. Dömer, A. Gerstlauer, in: Proceedings of the ISSS02, Nagoya,
Japan, 2002.'
date_created: 2023-01-24T10:10:24Z
date_updated: 2023-01-24T10:10:28Z
department:
- _id: '672'
doi: '10.1145/581199.581234 '
keyword:
- Standardization
- Kernel
- Permission
- Formal verification
- Logic functions
- Documentation
- Reasoning about programs
- Specification languages
- Formal specifications
- Software systems
language:
- iso: eng
place: Nagoya, Japan
publication: Proceedings of the ISSS02
publication_identifier:
isbn:
- 1-58113-576-9
status: public
title: The Formal Execution Semantics of SpecC
type: conference
user_id: '5786'
year: '2002'
...
---
_id: '39421'
abstract:
- lang: eng
text: We present a rigorous but transparent semantics definition of SystemC that
covers method, thread, and clocked thread behavior as well as their interaction
with the simulation kernel process. The semantics includes watching statements,
signal assignment, and wait statements as they are introduced in SystemC V1.O.
We present our definition in form of distributed Abstract State Machines (ASMs)
rules reflecting the view given in the SystemC User's Manual and the reference
implementation. We mainly see our formal semantics as a concise, unambiguous,
high-level specification for SystemC-based implementations and for standardization.
Additionally, it can be used as a sound basis to investigate SystemC interoperability
with Verilog and VHDL.
author:
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Jürgen
full_name: Ruf, Jürgen
last_name: Ruf
- first_name: D. W.
full_name: Hoffmann, D. W.
last_name: Hoffmann
- first_name: Joachim
full_name: Gerlach, Joachim
last_name: Gerlach
- first_name: Thomas
full_name: Kropf, Thomas
last_name: Kropf
- first_name: W.
full_name: Rosenstiehl, W.
last_name: Rosenstiehl
citation:
ama: 'Müller W, Ruf J, Hoffmann DW, Gerlach J, Kropf T, Rosenstiehl W. The Simulation
Semantics of SystemC. In: Proceedings of the Design, Automation, and Test in
Europe (DATE’01). IEEE; 2001. doi:10.1109/DATE.2001.915002'
apa: Müller, W., Ruf, J., Hoffmann, D. W., Gerlach, J., Kropf, T., & Rosenstiehl,
W. (2001). The Simulation Semantics of SystemC. Proceedings of the Design,
Automation, and Test in Europe (DATE’01). Proceedings Design, Automation
and Test in Europe. Conference and Exhibition 2001. https://doi.org/10.1109/DATE.2001.915002
bibtex: '@inproceedings{Müller_Ruf_Hoffmann_Gerlach_Kropf_Rosenstiehl_2001, place={Munich,
Germany }, title={The Simulation Semantics of SystemC}, DOI={10.1109/DATE.2001.915002},
booktitle={Proceedings of the Design, Automation, and Test in Europe (DATE’01)},
publisher={IEEE}, author={Müller, Wolfgang and Ruf, Jürgen and Hoffmann, D. W.
and Gerlach, Joachim and Kropf, Thomas and Rosenstiehl, W.}, year={2001} }'
chicago: 'Müller, Wolfgang, Jürgen Ruf, D. W. Hoffmann, Joachim Gerlach, Thomas
Kropf, and W. Rosenstiehl. “The Simulation Semantics of SystemC.” In Proceedings
of the Design, Automation, and Test in Europe (DATE’01). Munich, Germany :
IEEE, 2001. https://doi.org/10.1109/DATE.2001.915002.'
ieee: 'W. Müller, J. Ruf, D. W. Hoffmann, J. Gerlach, T. Kropf, and W. Rosenstiehl,
“The Simulation Semantics of SystemC,” presented at the Proceedings Design, Automation
and Test in Europe. Conference and Exhibition 2001, 2001, doi: 10.1109/DATE.2001.915002.'
mla: Müller, Wolfgang, et al. “The Simulation Semantics of SystemC.” Proceedings
of the Design, Automation, and Test in Europe (DATE’01), IEEE, 2001, doi:10.1109/DATE.2001.915002.
short: 'W. Müller, J. Ruf, D.W. Hoffmann, J. Gerlach, T. Kropf, W. Rosenstiehl,
in: Proceedings of the Design, Automation, and Test in Europe (DATE’01), IEEE,
Munich, Germany , 2001.'
conference:
name: ' Proceedings Design, Automation and Test in Europe. Conference and Exhibition
2001'
date_created: 2023-01-24T10:39:33Z
date_updated: 2023-01-24T10:39:38Z
department:
- _id: '672'
doi: 10.1109/DATE.2001.915002
keyword:
- Yarn
- Formal verification
- Kernel
- Hardware design languages
- Electronic design automation and methodology
- Algebra
- Computational modeling
- Logic functions
- Computer languages
- Clocks
language:
- iso: eng
place: 'Munich, Germany '
publication: Proceedings of the Design, Automation, and Test in Europe (DATE’01)
publication_identifier:
isbn:
- 0-7695-0993-2
publisher: IEEE
status: public
title: The Simulation Semantics of SystemC
type: conference
user_id: '5786'
year: '2001'
...
---
_id: '34448'
abstract:
- lang: eng
text: We present a rigorous but transparent semantic definition for VHDL corresponding
to the IEEE VHDL’ 93 standard [68, 9, 84]. Our definition covers the full behavior
of signal and variable assignments as well as the behavior of the various wait
statements including delta, time, and postponed cycles. We consider explicitly
declared signals, ports, local variables, and shared variables. Our specification
defines an abstract VHDL ’ 93 interpreter in the form of transition rules for
an evolving algebra machine (EA-Machine) [60]. It faithfully reflects and supports
the view of simulation given in the IEEE VHDL ’ 93 standard language reference
manual. The definition can be understood without any prior formal training. We
illustrate our definition by running the example VHDL program set out in the Introduction
to this volume.
author:
- first_name: Egon
full_name: Börger, Egon
last_name: Börger
- first_name: Uwe
full_name: Glässer, Uwe
last_name: Glässer
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Börger E, Glässer U, Müller W. A Formal Definition of an Abstract VHDL’93
Simulator by EA-Machines. In: Delgado Kloos C, Breuer PT, eds. Semantics of
VHDL. Kluwer Academic Publishers; 1995:107-139. doi:10.1007/978-1-4615-2237-9_5'
apa: Börger, E., Glässer, U., & Müller, W. (1995). A Formal Definition of an
Abstract VHDL’93 Simulator by EA-Machines. In C. Delgado Kloos & P. T. Breuer
(Eds.), Semantics of VHDL (pp. 107–139). Kluwer Academic Publishers. https://doi.org/10.1007/978-1-4615-2237-9_5
bibtex: '@inbook{Börger_Glässer_Müller_1995, place={Dordrecht}, title={A Formal
Definition of an Abstract VHDL’93 Simulator by EA-Machines}, DOI={10.1007/978-1-4615-2237-9_5},
booktitle={Semantics of VHDL}, publisher={Kluwer Academic Publishers}, author={Börger,
Egon and Glässer, Uwe and Müller, Wolfgang}, editor={Delgado Kloos, C. and Breuer,
Peter T.}, year={1995}, pages={107–139} }'
chicago: 'Börger, Egon, Uwe Glässer, and Wolfgang Müller. “A Formal Definition of
an Abstract VHDL’93 Simulator by EA-Machines.” In Semantics of VHDL, edited
by C. Delgado Kloos and Peter T. Breuer, 107–39. Dordrecht: Kluwer Academic Publishers,
1995. https://doi.org/10.1007/978-1-4615-2237-9_5.'
ieee: 'E. Börger, U. Glässer, and W. Müller, “A Formal Definition of an Abstract
VHDL’93 Simulator by EA-Machines,” in Semantics of VHDL, C. Delgado Kloos
and P. T. Breuer, Eds. Dordrecht: Kluwer Academic Publishers, 1995, pp. 107–139.'
mla: Börger, Egon, et al. “A Formal Definition of an Abstract VHDL’93 Simulator
by EA-Machines.” Semantics of VHDL, edited by C. Delgado Kloos and Peter
T. Breuer, Kluwer Academic Publishers, 1995, pp. 107–39, doi:10.1007/978-1-4615-2237-9_5.
short: 'E. Börger, U. Glässer, W. Müller, in: C. Delgado Kloos, P.T. Breuer (Eds.),
Semantics of VHDL, Kluwer Academic Publishers, Dordrecht, 1995, pp. 107–139.'
date_created: 2022-12-15T11:42:48Z
date_updated: 2022-12-15T11:43:14Z
department:
- _id: '672'
doi: 10.1007/978-1-4615-2237-9_5
editor:
- first_name: C.
full_name: Delgado Kloos, C.
last_name: Delgado Kloos
- first_name: Peter T.
full_name: Breuer, Peter T.
last_name: Breuer
keyword:
- Transition Rule Formal Verification Variable Assignment Kernel Process Simulation
Cycle
language:
- iso: eng
page: 107 - 139
place: Dordrecht
publication: Semantics of VHDL
publication_identifier:
isbn:
- 978-1-4615-2237-9
publisher: Kluwer Academic Publishers
status: public
title: A Formal Definition of an Abstract VHDL'93 Simulator by EA-Machines
type: book_chapter
user_id: '5786'
year: '1995'
...