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(2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In <i>2017 International Conference on Field Programmable Technology (ICFPT)</i> (pp. 215–218). <a href=\"https://doi.org/10.1109/FPT.2017.8280144\">https://doi.org/10.1109/FPT.2017.8280144</a>","short":"N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.","bibtex":"@inproceedings{Ho_Kaufmann_Platzner_2017, title={Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor}, DOI={<a href=\"https://doi.org/10.1109/FPT.2017.8280144\">10.1109/FPT.2017.8280144</a>}, booktitle={2017 International Conference on Field Programmable Technology (ICFPT)}, author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2017}, pages={215–218} }","mla":"Ho, Nam, et al. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.” <i>2017 International Conference on Field Programmable Technology (ICFPT)</i>, 2017, pp. 215–18, doi:<a href=\"https://doi.org/10.1109/FPT.2017.8280144\">10.1109/FPT.2017.8280144</a>.","ama":"Ho N, Kaufmann P, Platzner M. Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In: <i>2017 International Conference on Field Programmable Technology (ICFPT)</i>. ; 2017:215-218. doi:<a href=\"https://doi.org/10.1109/FPT.2017.8280144\">10.1109/FPT.2017.8280144</a>","chicago":"Ho, Nam, Paul Kaufmann, and Marco Platzner. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.” In <i>2017 International Conference on Field Programmable Technology (ICFPT)</i>, 215–18, 2017. <a href=\"https://doi.org/10.1109/FPT.2017.8280144\">https://doi.org/10.1109/FPT.2017.8280144</a>.","ieee":"N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in <i>2017 International Conference on Field Programmable Technology (ICFPT)</i>, 2017, pp. 215–218."},"year":"2017"},{"status":"public","type":"conference","publication":"12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","keyword":["embedded systems","image sensors","power aware computing","wireless sensor networks","Zynq-based VSN node prototype","computational self-awareness","design approach","platform levels","power consumption","visual sensor networks","visual sensor nodes","Cameras","Hardware","Middleware","Multicore processing","Operating systems","Runtime","Reconfigurable platforms","distributed embedded systems","performance-resource trade-off","self-awareness","visual sensor nodes"],"language":[{"iso":"eng"}],"_id":"10780","user_id":"3118","department":[{"_id":"78"}],"year":"2017","citation":{"bibtex":"@inproceedings{Guettatfi_Hübner_Platzner_Rinner_2017, title={Computational self-awareness as design approach for visual sensor nodes}, DOI={<a href=\"https://doi.org/10.1109/ReCoSoC.2017.8016147\">10.1109/ReCoSoC.2017.8016147</a>}, booktitle={12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)}, author={Guettatfi, Zakarya and Hübner, Philipp and Platzner, Marco and Rinner, Bernhard}, year={2017}, pages={1–8} }","mla":"Guettatfi, Zakarya, et al. “Computational Self-Awareness as Design Approach for Visual Sensor Nodes.” <i>12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)</i>, 2017, pp. 1–8, doi:<a href=\"https://doi.org/10.1109/ReCoSoC.2017.8016147\">10.1109/ReCoSoC.2017.8016147</a>.","short":"Z. Guettatfi, P. Hübner, M. Platzner, B. Rinner, in: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.","apa":"Guettatfi, Z., Hübner, P., Platzner, M., &#38; Rinner, B. (2017). Computational self-awareness as design approach for visual sensor nodes. In <i>12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)</i> (pp. 1–8). <a href=\"https://doi.org/10.1109/ReCoSoC.2017.8016147\">https://doi.org/10.1109/ReCoSoC.2017.8016147</a>","ieee":"Z. Guettatfi, P. Hübner, M. Platzner, and B. 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In: <i>12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)</i>. ; 2017:1-8. doi:<a href=\"https://doi.org/10.1109/ReCoSoC.2017.8016147\">10.1109/ReCoSoC.2017.8016147</a>"},"page":"1-8","title":"Computational self-awareness as design approach for visual sensor nodes","doi":"10.1109/ReCoSoC.2017.8016147","date_updated":"2022-01-06T06:50:50Z","author":[{"first_name":"Zakarya","full_name":"Guettatfi, Zakarya","last_name":"Guettatfi"},{"first_name":"Philipp","full_name":"Hübner, Philipp","last_name":"Hübner"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"},{"last_name":"Rinner","full_name":"Rinner, Bernhard","first_name":"Bernhard"}],"date_created":"2019-07-10T12:13:15Z"}]