---
_id: '62643'
author:
- first_name: Tobias
full_name: Schwabe, Tobias
id: '39217'
last_name: Schwabe
- first_name: Christian
full_name: Kress, Christian
id: '13256'
last_name: Kress
orcid: 0000-0002-4403-2237
- first_name: Stephan
full_name: Kruse, Stephan
id: '38254'
last_name: Kruse
- first_name: Maxim
full_name: Weizel, Maxim
id: '44271'
last_name: Weizel
orcid: 0000-0003-2699-9839
- first_name: Hanjo
full_name: Rhee, Hanjo
last_name: Rhee
- first_name: J. Christoph
full_name: Scheytt, J. Christoph
id: '37144'
last_name: Scheytt
orcid: '0000-0002-5950-6618 '
citation:
ama: Schwabe T, Kress C, Kruse S, Weizel M, Rhee H, Scheytt JC. Forward-Biased Silicon
Phase Shifter Modeling for Electronic-Photonic Co-Simulation and Validation in
a 250 nm EPIC BiCMOS Technology. Journal of Lightwave Technology. 2025;43(1):255-270.
doi:10.1109/JLT.2024.3450949
apa: Schwabe, T., Kress, C., Kruse, S., Weizel, M., Rhee, H., & Scheytt, J.
C. (2025). Forward-Biased Silicon Phase Shifter Modeling for Electronic-Photonic
Co-Simulation and Validation in a 250 nm EPIC BiCMOS Technology. Journal of
Lightwave Technology, 43(1), 255–270. https://doi.org/10.1109/JLT.2024.3450949
bibtex: '@article{Schwabe_Kress_Kruse_Weizel_Rhee_Scheytt_2025, title={Forward-Biased
Silicon Phase Shifter Modeling for Electronic-Photonic Co-Simulation and Validation
in a 250 nm EPIC BiCMOS Technology}, volume={43}, DOI={10.1109/JLT.2024.3450949},
number={1}, journal={Journal of Lightwave Technology}, author={Schwabe, Tobias
and Kress, Christian and Kruse, Stephan and Weizel, Maxim and Rhee, Hanjo and
Scheytt, J. Christoph}, year={2025}, pages={255–270} }'
chicago: 'Schwabe, Tobias, Christian Kress, Stephan Kruse, Maxim Weizel, Hanjo Rhee,
and J. Christoph Scheytt. “Forward-Biased Silicon Phase Shifter Modeling for Electronic-Photonic
Co-Simulation and Validation in a 250 Nm EPIC BiCMOS Technology.” Journal of
Lightwave Technology 43, no. 1 (2025): 255–70. https://doi.org/10.1109/JLT.2024.3450949.'
ieee: 'T. Schwabe, C. Kress, S. Kruse, M. Weizel, H. Rhee, and J. C. Scheytt, “Forward-Biased
Silicon Phase Shifter Modeling for Electronic-Photonic Co-Simulation and Validation
in a 250 nm EPIC BiCMOS Technology,” Journal of Lightwave Technology, vol.
43, no. 1, pp. 255–270, 2025, doi: 10.1109/JLT.2024.3450949.'
mla: Schwabe, Tobias, et al. “Forward-Biased Silicon Phase Shifter Modeling for
Electronic-Photonic Co-Simulation and Validation in a 250 Nm EPIC BiCMOS Technology.”
Journal of Lightwave Technology, vol. 43, no. 1, 2025, pp. 255–70, doi:10.1109/JLT.2024.3450949.
short: T. Schwabe, C. Kress, S. Kruse, M. Weizel, H. Rhee, J.C. Scheytt, Journal
of Lightwave Technology 43 (2025) 255–270.
date_created: 2025-11-27T07:14:34Z
date_updated: 2025-11-27T07:16:01Z
department:
- _id: '58'
doi: 10.1109/JLT.2024.3450949
intvolume: ' 43'
issue: '1'
keyword:
- Integrated circuit modeling
- Capacitance
- Silicon
- Modulation
- Adaptation models
- Semiconductor device modeling
- Bandwidth
- Data communication
- electrooptical transmitter
- equalization
- free-carrier-plasma dispersion effect
- modelling
- optical modulator
- phase shifter
- silicon photonics
language:
- iso: eng
page: 255-270
publication: Journal of Lightwave Technology
status: public
title: Forward-Biased Silicon Phase Shifter Modeling for Electronic-Photonic Co-Simulation
and Validation in a 250 nm EPIC BiCMOS Technology
type: journal_article
user_id: '38254'
volume: 43
year: '2025'
...
---
_id: '62644'
author:
- first_name: Tobias
full_name: Schwabe, Tobias
id: '39217'
last_name: Schwabe
- first_name: Christian
full_name: Kress, Christian
id: '13256'
last_name: Kress
orcid: 0000-0002-4403-2237
- first_name: Babak
full_name: Sadiye, Babak
id: '93634'
last_name: Sadiye
- first_name: Stephan
full_name: Kruse, Stephan
id: '38254'
last_name: Kruse
- first_name: J. Christoph
full_name: Scheytt, J. Christoph
id: '37144'
last_name: Scheytt
orcid: '0000-0002-5950-6618 '
citation:
ama: Schwabe T, Kress C, Sadiye B, Kruse S, Scheytt JC. Analysis and Design of Forward
Biased Silicon Photonics Phase Shifter Equalizer Circuits. IEEE Access.
2025;13:192433-192450. doi:10.1109/ACCESS.2025.3629385
apa: Schwabe, T., Kress, C., Sadiye, B., Kruse, S., & Scheytt, J. C. (2025).
Analysis and Design of Forward Biased Silicon Photonics Phase Shifter Equalizer
Circuits. IEEE Access, 13, 192433–192450. https://doi.org/10.1109/ACCESS.2025.3629385
bibtex: '@article{Schwabe_Kress_Sadiye_Kruse_Scheytt_2025, title={Analysis and Design
of Forward Biased Silicon Photonics Phase Shifter Equalizer Circuits}, volume={13},
DOI={10.1109/ACCESS.2025.3629385},
journal={IEEE Access}, author={Schwabe, Tobias and Kress, Christian and Sadiye,
Babak and Kruse, Stephan and Scheytt, J. Christoph}, year={2025}, pages={192433–192450}
}'
chicago: 'Schwabe, Tobias, Christian Kress, Babak Sadiye, Stephan Kruse, and J.
Christoph Scheytt. “Analysis and Design of Forward Biased Silicon Photonics Phase
Shifter Equalizer Circuits.” IEEE Access 13 (2025): 192433–50. https://doi.org/10.1109/ACCESS.2025.3629385.'
ieee: 'T. Schwabe, C. Kress, B. Sadiye, S. Kruse, and J. C. Scheytt, “Analysis and
Design of Forward Biased Silicon Photonics Phase Shifter Equalizer Circuits,”
IEEE Access, vol. 13, pp. 192433–192450, 2025, doi: 10.1109/ACCESS.2025.3629385.'
mla: Schwabe, Tobias, et al. “Analysis and Design of Forward Biased Silicon Photonics
Phase Shifter Equalizer Circuits.” IEEE Access, vol. 13, 2025, pp. 192433–50,
doi:10.1109/ACCESS.2025.3629385.
short: T. Schwabe, C. Kress, B. Sadiye, S. Kruse, J.C. Scheytt, IEEE Access 13 (2025)
192433–192450.
date_created: 2025-11-27T07:14:48Z
date_updated: 2025-11-27T07:16:06Z
department:
- _id: '58'
doi: 10.1109/ACCESS.2025.3629385
intvolume: ' 13'
keyword:
- Optical attenuators
- Equalizers
- Phase shifters
- Optical modulation
- Electro-optic modulators
- Optical amplifiers
- Circuits
- Silicon photonics
- Optical saturation
- Integrated circuit modeling
- Data communication
- equalization
- electro-optical transmitter
- silicon photonics
- phase shifter
- optical modulator
- free-carrier plasma dispersion effect
- driver architectures
- biasing schemes
language:
- iso: eng
page: 192433-192450
publication: IEEE Access
status: public
title: Analysis and Design of Forward Biased Silicon Photonics Phase Shifter Equalizer
Circuits
type: journal_article
user_id: '38254'
volume: 13
year: '2025'
...
---
_id: '58606'
article_type: original
author:
- first_name: Albert
full_name: Mathew, Albert
last_name: Mathew
- first_name: Rebecca
full_name: Aschwanden, Rebecca
last_name: Aschwanden
- first_name: Aditya
full_name: Tripathi, Aditya
last_name: Tripathi
- first_name: Piyush
full_name: Jangid, Piyush
last_name: Jangid
- first_name: Basudeb
full_name: Sain, Basudeb
last_name: Sain
- first_name: Thomas
full_name: Zentgraf, Thomas
id: '30525'
last_name: Zentgraf
orcid: 0000-0002-8662-1101
- first_name: Sergey
full_name: Kruk, Sergey
last_name: Kruk
citation:
ama: Mathew A, Aschwanden R, Tripathi A, et al. Nonreciprocal Metasurfaces with
Epsilon-Near-Zero Materials. Nano Letters. Published online 2025. doi:10.1021/acs.nanolett.4c06188
apa: Mathew, A., Aschwanden, R., Tripathi, A., Jangid, P., Sain, B., Zentgraf, T.,
& Kruk, S. (2025). Nonreciprocal Metasurfaces with Epsilon-Near-Zero Materials.
Nano Letters. https://doi.org/10.1021/acs.nanolett.4c06188
bibtex: '@article{Mathew_Aschwanden_Tripathi_Jangid_Sain_Zentgraf_Kruk_2025, title={Nonreciprocal
Metasurfaces with Epsilon-Near-Zero Materials}, DOI={10.1021/acs.nanolett.4c06188},
journal={Nano Letters}, publisher={American Chemical Society (ACS)}, author={Mathew,
Albert and Aschwanden, Rebecca and Tripathi, Aditya and Jangid, Piyush and Sain,
Basudeb and Zentgraf, Thomas and Kruk, Sergey}, year={2025} }'
chicago: Mathew, Albert, Rebecca Aschwanden, Aditya Tripathi, Piyush Jangid, Basudeb
Sain, Thomas Zentgraf, and Sergey Kruk. “Nonreciprocal Metasurfaces with Epsilon-Near-Zero
Materials.” Nano Letters, 2025. https://doi.org/10.1021/acs.nanolett.4c06188.
ieee: 'A. Mathew et al., “Nonreciprocal Metasurfaces with Epsilon-Near-Zero
Materials,” Nano Letters, 2025, doi: 10.1021/acs.nanolett.4c06188.'
mla: Mathew, Albert, et al. “Nonreciprocal Metasurfaces with Epsilon-Near-Zero Materials.”
Nano Letters, American Chemical Society (ACS), 2025, doi:10.1021/acs.nanolett.4c06188.
short: A. Mathew, R. Aschwanden, A. Tripathi, P. Jangid, B. Sain, T. Zentgraf, S.
Kruk, Nano Letters (2025).
date_created: 2025-02-12T12:54:41Z
date_updated: 2026-04-20T05:06:06Z
department:
- _id: '15'
- _id: '230'
- _id: '289'
- _id: '623'
doi: 10.1021/acs.nanolett.4c06188
external_id:
arxiv:
- '2501.11920'
keyword:
- metasurfaces
- nanophotonics
- nonreciprocity
- optical isolators
- silicon photonics
language:
- iso: eng
main_file_link:
- url: https://pubs.acs.org/doi/full/10.1021/acs.nanolett.4c06188
project:
- _id: '53'
name: 'TRR 142: TRR 142 - Maßgeschneiderte nichtlineare Photonik: Von grundlegenden
Konzepten zu funktionellen Strukturen'
- _id: '54'
name: 'TRR 142 - A: TRR 142 - Project Area A'
- _id: '55'
name: 'TRR 142 - B: TRR 142 - Project Area B'
- _id: '170'
name: 'TRR 142 - B09: TRR 142 - Effiziente Erzeugung mit maßgeschneiderter optischer
Phaselage der zweiten Harmonischen mittels Quasi-gebundener Zustände in GaAs Metaoberflächen
(B09*)'
- _id: '65'
name: 'TRR 142 - A08: TRR 142 - Nichtlineare Kopplung von Zwischenschicht-Exzitonen
in van der Waals-Heterostrukturen an plasmonische und dielektrische Nanokavitäten
(A08)'
publication: Nano Letters
publication_identifier:
issn:
- 1530-6984
- 1530-6992
publication_status: published
publisher: American Chemical Society (ACS)
quality_controlled: '1'
status: public
title: Nonreciprocal Metasurfaces with Epsilon-Near-Zero Materials
type: journal_article
user_id: '30525'
year: '2025'
...
---
_id: '46482'
abstract:
- lang: eng
text: "Ever increasing demands on the performance of microchips are leading to ever
more complex semiconductor technologies with ever shrinking feature sizes. Complex
applications with high demands on safety and reliability, such as autonomous driving,
are simultaneously driving the requirements for test and diagnosis of VLSI circuits.
Throughout the life cycle of a microchip, uncertainties occur that affect its
timing behavior. For example, weak circuit structures, aging effects, or process
variations can lead to a change in the timing behavior of the circuit. While these
uncertainties do not necessarily lead to a change of the functional behavior,
they can lead to a reliability problem.\r\nWith modular and hybrid compaction
two test instruments are presented in this work that can be used for X-tolerant
test response compaction in the built-in Faster-than-At-Speed Test (FAST) which
is used to detect uncertainties in VLSI circuits. One challenge for test response
compaction during FAST is the high and varying X-rate at the outputs of the circuit
under test. By dividing the circuit outputs into test groups and separately compacting
these test groups using stochastic compactors, the modular compaction is able
to handle these high and varying X-rates.\r\nTo deal with uncertainties on logic
interconnects, a method for distinguishing crosstalk and process variation is
presented. In current semiconductor technologies, the number of parasitic coupling
capacitances between logic interconnects is growing. These coupling capacitances
can lead to crosstalk, which causes increased current flow in the logic interconnects,
which in turn can lead to increased electromigration. In the presented method,
delay maps describing the timing behavior of the circuit outputs at different
operating points are used to train artificial neural networks which classify the
tested circuits into fault-free and faulty."
- lang: ger
text: "Immer größere Anforderungen an die Leistungsfähigkeit von Mikrochips führen
zu Halbleitertechnologien mit immer kleiner werdenden Strukturgrößen. Anwendungen
mit hohen Ansprüchen an Sicherheit und Zuverlässigkeit, wie z.B. das autonome
Fahren, treiben gleichzeitig die Anforderungen an den Test hochintegrierter Schaltungen
an. Während des gesamten Lebenszyklus eines Mikrochips kommt es zu Unsicherheiten
im Zeitverhalten. So können z.B. schwache Schaltungsstrukturen, Alterungseffekte
oder Prozessvariationen zu einer Veränderung des Zeitverhaltens führen. Während
diese Unsicherheiten nicht zu einer Veränderung des funktionalen Verhaltens führen
müssen, können sie jedoch zu einem Zuverlässigkeitsproblem führen.\r\nMit der
modularen und der hybriden Kompaktierung werden in dieser Arbeit zwei Testinstrumente
vorgestellt, die für die X-tolerante Testantwortkompaktierung im eingebauten Hochgeschwindigkeitstest
verwendet werden können. Eine Herausforderung für die Testantwortkompaktierung
während des Hochgeschwindigkeitstests ist die hohe und variierende X-Rate an den
Ausgängen der zu testenden Schaltung. Durch die Einteilung der Schaltungsausgänge
in Prüfgruppen und die separierte Kompaktierung der Prüfgruppen mithilfe von stochastischen
Kompaktierern, können die vorgestellten Verfahren diese hohen und variierenden
X-Raten verarbeiten.\r\nFür den Umgang mit Unsicherheiten auf Verbindungsleitungen
der Logik-Schaltung wird ein Verfahren zur Unterscheidung von Übersprechen und
Prozessvariation vorgestellt. In aktuellen Halbleitertechnologien kommt es vermehrt
zu parasitären Koppelkapazitäten zwischen den Verbindungsleitungen. In dem vorgestellten
Verfahren werden künstliche neuronale Netze trainiert, um die Schaltungen in fehlerfrei
und fehlerhaft zu klassifizieren."
author:
- first_name: Alexander
full_name: Sprenger, Alexander
id: '22707'
last_name: Sprenger
orcid: 0000-0002-0775-7677
citation:
ama: Sprenger A. Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten
in Logikblöcken hochintegrierter Schaltungen. Universität Paderborn; 2023.
doi:10.17619/UNIPB/1-1787
apa: Sprenger, A. (2023). Testinstrumente und Testdatenanalyse zur Verarbeitung
von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Universität
Paderborn. https://doi.org/10.17619/UNIPB/1-1787
bibtex: '@book{Sprenger_2023, place={Paderborn}, title={Testinstrumente und Testdatenanalyse
zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen},
DOI={10.17619/UNIPB/1-1787},
publisher={Universität Paderborn}, author={Sprenger, Alexander}, year={2023} }'
chicago: 'Sprenger, Alexander. Testinstrumente und Testdatenanalyse zur Verarbeitung
von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Paderborn:
Universität Paderborn, 2023. https://doi.org/10.17619/UNIPB/1-1787.'
ieee: 'A. Sprenger, Testinstrumente und Testdatenanalyse zur Verarbeitung von
Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Paderborn: Universität
Paderborn, 2023.'
mla: Sprenger, Alexander. Testinstrumente und Testdatenanalyse zur Verarbeitung
von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Universität
Paderborn, 2023, doi:10.17619/UNIPB/1-1787.
short: A. Sprenger, Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten
in Logikblöcken hochintegrierter Schaltungen, Universität Paderborn, Paderborn,
2023.
date_created: 2023-08-12T09:10:38Z
date_updated: 2023-08-12T09:13:18Z
department:
- _id: '48'
doi: 10.17619/UNIPB/1-1787
extern: '1'
keyword:
- Testantwortkompaktierung
- Prozessvariation
- Silicon Lifecycle Management
language:
- iso: ger
main_file_link:
- open_access: '1'
url: https://nbn-resolving.org/urn:nbn:de:hbz:466:2-45493
oa: '1'
page: xi, 160
place: Paderborn
publication_status: published
publisher: Universität Paderborn
status: public
supervisor:
- first_name: Sybille
full_name: Hellebrand, Sybille
id: '209'
last_name: Hellebrand
orcid: 0000-0002-3717-3939
- first_name: Marco
full_name: Platzner, Marco
id: '398'
last_name: Platzner
title: Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in
Logikblöcken hochintegrierter Schaltungen
type: dissertation
user_id: '22707'
year: '2023'
...