---
_id: '11891'
abstract:
- lang: eng
  text: In this paper we present a combined hardware/software approach for synchronizing
    the sampling clocks of an acoustic sensor network. A first clock frequency offset
    estimate is obtained by a time stamp exchange protocol with a low data rate and
    computational requirements. The estimate is then postprocessed by a Kalman filter
    which exploits the specific properties of the statistics of the frequency offset
    estimation error. In long term experiments the deviation between the sampling
    oscillators of two sensor nodes never exceeded half a sample with a wired and
    with a wireless link between the nodes. The achieved precision enables the estimation
    of time difference of arrival values across different hardware devices without
    sharing a common sampling hardware.
author:
- first_name: Joerg
  full_name: Schmalenstroeer, Joerg
  id: '460'
  last_name: Schmalenstroeer
- first_name: Reinhold
  full_name: Haeb-Umbach, Reinhold
  id: '242'
  last_name: Haeb-Umbach
citation:
  ama: 'Schmalenstroeer J, Haeb-Umbach R. Sampling Rate Synchronisation in Acoustic
    Sensor Networks with a Pre-Trained Clock Skew Error Model. In: <i>21th European
    Signal Processing Conference (EUSIPCO 2013)</i>. ; 2013.'
  apa: Schmalenstroeer, J., &#38; Haeb-Umbach, R. (2013). Sampling Rate Synchronisation
    in Acoustic Sensor Networks with a Pre-Trained Clock Skew Error Model. <i>21th
    European Signal Processing Conference (EUSIPCO 2013)</i>.
  bibtex: '@inproceedings{Schmalenstroeer_Haeb-Umbach_2013, title={Sampling Rate Synchronisation
    in Acoustic Sensor Networks with a Pre-Trained Clock Skew Error Model}, booktitle={21th
    European Signal Processing Conference (EUSIPCO 2013)}, author={Schmalenstroeer,
    Joerg and Haeb-Umbach, Reinhold}, year={2013} }'
  chicago: Schmalenstroeer, Joerg, and Reinhold Haeb-Umbach. “Sampling Rate Synchronisation
    in Acoustic Sensor Networks with a Pre-Trained Clock Skew Error Model.” In <i>21th
    European Signal Processing Conference (EUSIPCO 2013)</i>, 2013.
  ieee: J. Schmalenstroeer and R. Haeb-Umbach, “Sampling Rate Synchronisation in Acoustic
    Sensor Networks with a Pre-Trained Clock Skew Error Model,” 2013.
  mla: Schmalenstroeer, Joerg, and Reinhold Haeb-Umbach. “Sampling Rate Synchronisation
    in Acoustic Sensor Networks with a Pre-Trained Clock Skew Error Model.” <i>21th
    European Signal Processing Conference (EUSIPCO 2013)</i>, 2013.
  short: 'J. Schmalenstroeer, R. Haeb-Umbach, in: 21th European Signal Processing
    Conference (EUSIPCO 2013), 2013.'
date_created: 2019-07-12T05:30:15Z
date_updated: 2023-10-26T08:11:01Z
department:
- _id: '54'
keyword:
- synchronization
- acoustic sensor network
language:
- iso: eng
main_file_link:
- open_access: '1'
  url: https://groups.uni-paderborn.de/nt/pubs/2013/SchHaeb2013.pdf
oa: '1'
publication: 21th European Signal Processing Conference (EUSIPCO 2013)
quality_controlled: '1'
related_material:
  link:
  - description: Presentation
    relation: supplementary_material
    url: https://groups.uni-paderborn.de/nt/pubs/2013/SchHaeb2013_Presentation.pdf
status: public
title: Sampling Rate Synchronisation in Acoustic Sensor Networks with a Pre-Trained
  Clock Skew Error Model
type: conference
user_id: '460'
year: '2013'
...
---
_id: '36919'
abstract:
- lang: eng
  text: Faced with increasing demands on energy efficiency, current electronic systems
    operate according to complex power management schemes including more and more
    fine-grained voltage frequency scaling and power shutdown scenarios. Consequently,
    validation of the power design intent should begin as early as possible at electronic
    system-level (ESL) together with first executable system specifications for integrity
    tests. However, today's system-level design methodologies usually focus on the
    abstraction of digital logic and time, so that typical low-power aspects cannot
    be considered so far. In this paper, we present a high-level modeling approach
    on top of the SystemC/TLM standard to simulate power distribution and voltage
    based implications in a "loosely-timed" functional execution context. The approach
    reuses legacy TLM models and prevents the need for detailed lock-step process
    synchronization in contrast to existing methods. A case study derived from an
    open source low-power design demonstrates the efficiency of our approach in terms
    of simulation performance and testability.
author:
- first_name: Fabian
  full_name: Mischkalla, Fabian
  last_name: Mischkalla
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed”
    Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:<a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>'
  apa: 'Mischkalla, F., &#38; Müller, W. (2013). <i>Efficient Power-Intent Validation
    Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. 23rd International
    Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS). <a
    href="https://doi.org/10.1109/PATMOS.2013.6662171">https://doi.org/10.1109/PATMOS.2013.6662171</a>'
  bibtex: '@inproceedings{Mischkalla_Müller_2013, place={Karlsruhe}, title={Efficient
    Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive
    Approach}, DOI={<a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>},
    publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2013}
    }'
  chicago: 'Mischkalla, Fabian, and Wolfgang Müller. “Efficient Power-Intent Validation
    Using ‘Loosely-Timed’ Simulation Models: A Non-Invasive Approach.” Karlsruhe:
    IEEE, 2013. <a href="https://doi.org/10.1109/PATMOS.2013.6662171">https://doi.org/10.1109/PATMOS.2013.6662171</a>.'
  ieee: 'F. Mischkalla and W. Müller, “Efficient Power-Intent Validation Using ‘Loosely-Timed’
    Simulation Models: A Non-Invasive Approach,” presented at the 23rd International
    Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013,
    doi: <a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>.'
  mla: 'Mischkalla, Fabian, and Wolfgang Müller. <i>Efficient Power-Intent Validation
    Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. IEEE, 2013,
    doi:<a href="https://doi.org/10.1109/PATMOS.2013.6662171">10.1109/PATMOS.2013.6662171</a>.'
  short: 'F. Mischkalla, W. Müller, in: IEEE, Karlsruhe, 2013.'
conference:
  name: 23rd International Workshop on Power and Timing Modeling, Optimization and
    Simulation (PATMOS)
date_created: 2023-01-16T12:08:03Z
date_updated: 2023-01-16T12:08:17Z
department:
- _id: '672'
doi: 10.1109/PATMOS.2013.6662171
keyword:
- Time-varying systems
- Time-domain analysis
- Synchronization
- Context modeling
- Clocks
- Semantics
- Standards
language:
- iso: eng
place: Karlsruhe
publication_identifier:
  eisbn:
  - 978-1-4799-1170-7
publisher: IEEE
status: public
title: 'Efficient Power-Intent Validation Using "Loosely-Timed" Simulation Models:
  A Non-Invasive Approach'
type: conference
user_id: '5786'
year: '2013'
...