@article{65311,
  abstract     = {{Information Systems (IS) is rooted in systems theory. Systems theory offers powerful concepts to address challenges of growing system complexity and non-systemic design approaches in information systems. Despite its systemic origins, systems theory remains a peripheral topic in IS. The study addresses this gap by introducing a comprehensive framework of 52 systems-theoretical concepts to guide the design of complex IS artifacts. We synthesize scattered systems knowledge from diverse disciplines to provide a unified level of abstraction for complex information system design. We apply the framework to a use case of business reputation systems to show how the systems lens informs the design of a novel, complex information system. We make three key contributions to the literature. First, the framework provides a common ground for interdisciplinary research in information system design. Second, it offers a unified level of abstraction grounded in systems theory that serves as a coherent basis for artifact design. Third, it demonstrates the potential of systems theory as a foundational justificatory knowledge base. Furthermore, we provide guidance on applying the framework across multiple modes of reasoning, alongside further application guidelines. The study thus serves as a bridge between the body of systems knowledge and contextual design in IS.}},
  author       = {{Ibrahimli, Ulvi and Hemmrich, Simon and Winkelmann, Axel}},
  journal      = {{Communication of the Association for Information Systems}},
  keywords     = {{Information Systems Research, Systems Theory, System Complexity, System Design, Design Science}},
  publisher    = {{AIS}},
  title        = {{{Bridging Systems Theory and Information Systems: A Framework for Designing Complex Information Systems}}},
  doi          = {{https://aisel.aisnet.org/cais/vol58/iss1/37/}},
  year         = {{2026}},
}

@inproceedings{36917,
  abstract     = {{The ever-increasing complexity of heterogeneous electronic systems demand for intensified abstraction and automation efforts to improve design, verification and validation productivity, especially in earlier phases of system engineering. Within the verification activity various metrics can be applied to determine functional correctness or the overall progress. Here, a supporting verification methodology defining high-level verification planning down to the actual metric code development is essential. Moreover, an advanced assistance for the designer, such as a tooling infrastructure to automatize and accelerate the metric code implementation, is needed to minimize the influence of errorprone manual coding. In this article we present a single-source verification metric code-generation methodology for improved coverage automation. We determine (i) a suitable metric model for model-based capture of verification metrics as well as (ii) an assisted model-based processing and generation flow of the verification environment and metric skeletons. We apply our method to a SystemC case-study, in doing so, targeting metric code implementation productivity and consistency enhancement.}},
  author       = {{Kuznik, Christoph and Müller, Wolfgang and Defo, Gilles Bertrand}},
  keywords     = {{System Design, Verification}},
  title        = {{{An Assisted Single Source Verification Metric Model Code Generation Methodology}}},
  year         = {{2014}},
}

@inproceedings{34585,
  abstract     = {{In this paper, we present an efficient approach to virtual platform modeling for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666 Standard SystemC simulation.  For evaluation we consider Infineon's recently introduced AURIX processor family as a target platform, which utilizes multiple CPU cores operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals. For SoC prototyping, we integrate the fast and open instruction accurate QEMU software emulator with the TLMu library for SystemC co-verification. This article reports our most recent efforts of the implementation of the TriCore instruction set for QEMU. The experimental results demonstrate the functional correctness and performance of our TriCore implementation.}},
  author       = {{Koppelmann, Bastian and Messidat, Bernd and Becker, Markus and Müller, Wolfgang and Scheytt, J. Christoph}},
  booktitle    = {{Proceedings of the Design and Verification Conference Europe (DVCON Europe)}},
  keywords     = {{System Design, Verification}},
  title        = {{{Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}}},
  year         = {{2014}},
}

@inproceedings{34583,
  abstract     = {{In this paper, we present an efficient approach to virtual platform modeling for TriCore-based SoCs by combining fast and open software emulation with IEEE-1666 Standard SystemC simulation.  For evaluation we consider Infineon's recently introduced AURIX processor family as a target platform, which utilizes multiple CPU cores operating in lockstep mode, memories, hierarchical buses, and a rich set of peripherals. For SoC prototyping, we integrate the fast and open instruction accurate QEMU software emulator with the TLMu library for SystemC co-verification. This article reports our most recent efforts of the implementation of the TriCore instruction set for QEMU. The experimental results demonstrate the functional correctness and performance of our TriCore implementation.}},
  author       = {{Koppelmann, Bastian and Messidat, Bernd and Kuznik, Christoph and Müller, Wolfgang and Becker, Markus and Scheytt, J. Christoph}},
  booktitle    = {{Proceedings of the Design and Verification Conference Europe (DVCON Europe)}},
  keywords     = {{System Design, Verification}},
  title        = {{{Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU}}},
  year         = {{2014}},
}