[{"publisher":"IEEE","date_updated":"2023-01-16T12:08:17Z","author":[{"first_name":"Fabian","last_name":"Mischkalla","full_name":"Mischkalla, Fabian"},{"id":"16243","full_name":"Müller, Wolfgang","last_name":"Müller","first_name":"Wolfgang"}],"date_created":"2023-01-16T12:08:03Z","title":"Efficient Power-Intent Validation Using \"Loosely-Timed\" Simulation Models: A Non-Invasive Approach","conference":{"name":"23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)"},"doi":"10.1109/PATMOS.2013.6662171","publication_identifier":{"eisbn":["978-1-4799-1170-7"]},"place":"Karlsruhe","year":"2013","citation":{"ieee":"F. Mischkalla and W. Müller, “Efficient Power-Intent Validation Using ‘Loosely-Timed’ Simulation Models: A Non-Invasive Approach,” presented at the 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013, doi: <a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>.","chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Efficient Power-Intent Validation Using ‘Loosely-Timed’ Simulation Models: A Non-Invasive Approach.” Karlsruhe: IEEE, 2013. <a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">https://doi.org/10.1109/PATMOS.2013.6662171</a>.","ama":"Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:<a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>","mla":"Mischkalla, Fabian, and Wolfgang Müller. <i>Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. IEEE, 2013, doi:<a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>.","short":"F. Mischkalla, W. Müller, in: IEEE, Karlsruhe, 2013.","bibtex":"@inproceedings{Mischkalla_Müller_2013, place={Karlsruhe}, title={Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach}, DOI={<a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">10.1109/PATMOS.2013.6662171</a>}, publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2013} }","apa":"Mischkalla, F., &#38; Müller, W. (2013). <i>Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach</i>. 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS). <a href=\"https://doi.org/10.1109/PATMOS.2013.6662171\">https://doi.org/10.1109/PATMOS.2013.6662171</a>"},"_id":"36919","user_id":"5786","department":[{"_id":"672"}],"keyword":["Time-varying systems","Time-domain analysis","Synchronization","Context modeling","Clocks","Semantics","Standards"],"language":[{"iso":"eng"}],"type":"conference","abstract":[{"text":"Faced with increasing demands on energy efficiency, current electronic systems operate according to complex power management schemes including more and more fine-grained voltage frequency scaling and power shutdown scenarios. Consequently, validation of the power design intent should begin as early as possible at electronic system-level (ESL) together with first executable system specifications for integrity tests. However, today's system-level design methodologies usually focus on the abstraction of digital logic and time, so that typical low-power aspects cannot be considered so far. In this paper, we present a high-level modeling approach on top of the SystemC/TLM standard to simulate power distribution and voltage based implications in a \"loosely-timed\" functional execution context. The approach reuses legacy TLM models and prevents the need for detailed lock-step process synchronization in contrast to existing methods. A case study derived from an open source low-power design demonstrates the efficiency of our approach in terms of simulation performance and testability.","lang":"eng"}],"status":"public"}]