---
_id: '29049'
abstract:
- lang: eng
  text: "This study investigates the conditions under which tax rate changes accelerate
    risky investments.\r\nWhile tax rate increases are often expected to harm investment,
    analytical\r\nstudies find tax rate increases may foster investment under flexibility.We
    design a theorybased\r\nexperimentwith a binomial random walk and entry–exit flexibility.We
    find accelerated\r\ninvestment upon tax rate increases irrespective of an exit
    option, but no corresponding\r\nresponse to tax cuts. This asymmetry may be due
    to tax salience and mechanisms\r\nfrom irreversible choice under uncertainty.
    Given this evidence of unexpected tax-reform\r\neffects, tax policymakers should
    carefully consider behavioral aspects."
article_type: original
author:
- first_name: René
  full_name: Fahr, René
  last_name: Fahr
- first_name: Elmar A.
  full_name: Janssen, Elmar A.
  last_name: Janssen
- first_name: Caren
  full_name: Sureth-Sloane, Caren
  id: '530'
  last_name: Sureth-Sloane
  orcid: ' 0000-0002-8183-5901'
citation:
  ama: Fahr R, Janssen EA, Sureth-Sloane C. Can Tax Rate Changes Accelerate Investment
    under Entry and Exit Flexibility? – Insights from an Economic Experiment. <i>FinanzArchiv
    / European Journal of Public Finance</i>. 2022;78(1-2):239-289.
  apa: Fahr, R., Janssen, E. A., &#38; Sureth-Sloane, C. (2022). Can Tax Rate Changes
    Accelerate Investment under Entry and Exit Flexibility? – Insights from an Economic
    Experiment. <i>FinanzArchiv / European Journal of Public Finance</i>, <i>78</i>(1–2),
    239–289.
  bibtex: '@article{Fahr_Janssen_Sureth-Sloane_2022, title={Can Tax Rate Changes Accelerate
    Investment under Entry and Exit Flexibility? – Insights from an Economic Experiment},
    volume={78}, number={1–2}, journal={FinanzArchiv / European Journal of Public
    Finance}, author={Fahr, René and Janssen, Elmar A. and Sureth-Sloane, Caren},
    year={2022}, pages={239–289} }'
  chicago: 'Fahr, René, Elmar A. Janssen, and Caren Sureth-Sloane. “Can Tax Rate Changes
    Accelerate Investment under Entry and Exit Flexibility? – Insights from an Economic
    Experiment.” <i>FinanzArchiv / European Journal of Public Finance</i> 78, no.
    1–2 (2022): 239–89.'
  ieee: R. Fahr, E. A. Janssen, and C. Sureth-Sloane, “Can Tax Rate Changes Accelerate
    Investment under Entry and Exit Flexibility? – Insights from an Economic Experiment,”
    <i>FinanzArchiv / European Journal of Public Finance</i>, vol. 78, no. 1–2, pp.
    239–289, 2022.
  mla: Fahr, René, et al. “Can Tax Rate Changes Accelerate Investment under Entry
    and Exit Flexibility? – Insights from an Economic Experiment.” <i>FinanzArchiv
    / European Journal of Public Finance</i>, vol. 78, no. 1–2, 2022, pp. 239–89.
  short: R. Fahr, E.A. Janssen, C. Sureth-Sloane, FinanzArchiv / European Journal
    of Public Finance 78 (2022) 239–289.
date_created: 2021-12-20T08:23:13Z
date_updated: 2026-04-09T07:25:41Z
department:
- _id: '187'
intvolume: '        78'
issue: 1-2
jel:
- H25
- H21
- C91
keyword:
- Economic ExperimentM
- Investment Decisions
- Tax Effects
- Timing Flexibility
- Uncertainty
language:
- iso: eng
page: 239-289
publication: FinanzArchiv / European Journal of Public Finance
publication_status: published
quality_controlled: '1'
status: public
title: Can Tax Rate Changes Accelerate Investment under Entry and Exit Flexibility?
  – Insights from an Economic Experiment
type: journal_article
user_id: '96670'
volume: 78
year: '2022'
...
---
_id: '17667'
abstract:
- lang: eng
  text: 'Resolving distributed attacks benefits from collaboration between networks.
    We present three approaches for the same multi-domain defensive action that can
    be applied in such an alliance: 1) Counteract Everywhere, 2) Minimize Countermeasures,
    and 3) Minimize Propagation. First, we provide a formula to compute efficiency
    of a defense; then we use this formula to compute the efficiency of the approaches
    under various circumstances. Finally, we discuss how task execution order and
    timing influence defense efficiency. Our results show that the Minimize Propagation
    approach is the most efficient method when defending against the chosen attack.'
author:
- first_name: Ralph
  full_name: Koning, Ralph
  last_name: Koning
- first_name: Gleb
  full_name: Polevoy, Gleb
  id: '83983'
  last_name: Polevoy
- first_name: Lydia
  full_name: Meijer, Lydia
  last_name: Meijer
- first_name: Cees
  full_name: de Laat, Cees
  last_name: de Laat
- first_name: Paola
  full_name: Grosso, Paola
  last_name: Grosso
citation:
  ama: 'Koning R, Polevoy G, Meijer L, de Laat C, Grosso P. Approaches for Collaborative
    Security Defences in Multi Network Environments. In: <i>2019 6th IEEE International
    Conference on Cyber Security and Cloud Computing (CSCloud)/ 2019 5th IEEE International
    Conference on Edge Computing and Scalable Cloud (EdgeCom)</i>. 2019 6th IEEE International
    Conference on Cyber Security and Cloud Computing (CSCloud)/ 2019 5th IEEE International
    Conference on Edge Computing and Scalable Cloud (EdgeCom). ; 2019:113-123. doi:<a
    href="https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9">10.1109/CSCloud/EdgeCom.2019.000-9</a>'
  apa: Koning, R., Polevoy, G., Meijer, L., de Laat, C., &#38; Grosso, P. (2019).
    Approaches for Collaborative Security Defences in Multi Network Environments.
    In <i>2019 6th IEEE International Conference on Cyber Security and Cloud Computing
    (CSCloud)/ 2019 5th IEEE International Conference on Edge Computing and Scalable
    Cloud (EdgeCom)</i> (pp. 113–123). <a href="https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9">https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9</a>
  bibtex: '@inproceedings{Koning_Polevoy_Meijer_de Laat_Grosso_2019, series={2019
    6th IEEE International Conference on Cyber Security and Cloud Computing (CSCloud)/
    2019 5th IEEE International Conference on Edge Computing and Scalable Cloud (EdgeCom)},
    title={Approaches for Collaborative Security Defences in Multi Network Environments},
    DOI={<a href="https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9">10.1109/CSCloud/EdgeCom.2019.000-9</a>},
    booktitle={2019 6th IEEE International Conference on Cyber Security and Cloud
    Computing (CSCloud)/ 2019 5th IEEE International Conference on Edge Computing
    and Scalable Cloud (EdgeCom)}, author={Koning, Ralph and Polevoy, Gleb and Meijer,
    Lydia and de Laat, Cees and Grosso, Paola}, year={2019}, pages={113–123}, collection={2019
    6th IEEE International Conference on Cyber Security and Cloud Computing (CSCloud)/
    2019 5th IEEE International Conference on Edge Computing and Scalable Cloud (EdgeCom)}
    }'
  chicago: Koning, Ralph, Gleb Polevoy, Lydia Meijer, Cees de Laat, and Paola Grosso.
    “Approaches for Collaborative Security Defences in Multi Network Environments.”
    In <i>2019 6th IEEE International Conference on Cyber Security and Cloud Computing
    (CSCloud)/ 2019 5th IEEE International Conference on Edge Computing and Scalable
    Cloud (EdgeCom)</i>, 113–23. 2019 6th IEEE International Conference on Cyber Security
    and Cloud Computing (CSCloud)/ 2019 5th IEEE International Conference on Edge
    Computing and Scalable Cloud (EdgeCom), 2019. <a href="https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9">https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9</a>.
  ieee: R. Koning, G. Polevoy, L. Meijer, C. de Laat, and P. Grosso, “Approaches for
    Collaborative Security Defences in Multi Network Environments,” in <i>2019 6th
    IEEE International Conference on Cyber Security and Cloud Computing (CSCloud)/
    2019 5th IEEE International Conference on Edge Computing and Scalable Cloud (EdgeCom)</i>,
    2019, pp. 113–123.
  mla: Koning, Ralph, et al. “Approaches for Collaborative Security Defences in Multi
    Network Environments.” <i>2019 6th IEEE International Conference on Cyber Security
    and Cloud Computing (CSCloud)/ 2019 5th IEEE International Conference on Edge
    Computing and Scalable Cloud (EdgeCom)</i>, 2019, pp. 113–23, doi:<a href="https://doi.org/10.1109/CSCloud/EdgeCom.2019.000-9">10.1109/CSCloud/EdgeCom.2019.000-9</a>.
  short: 'R. Koning, G. Polevoy, L. Meijer, C. de Laat, P. Grosso, in: 2019 6th IEEE
    International Conference on Cyber Security and Cloud Computing (CSCloud)/ 2019
    5th IEEE International Conference on Edge Computing and Scalable Cloud (EdgeCom),
    2019, pp. 113–123.'
conference:
  name: 2019 6th IEEE International Conference on Cyber Security and Cloud Computing
    (CSCloud)/ 2019 5th IEEE International Conference on Edge Computing and Scalable
    Cloud (EdgeCom)
date_created: 2020-08-06T15:23:23Z
date_updated: 2022-01-06T06:53:16Z
department:
- _id: '63'
- _id: '541'
doi: 10.1109/CSCloud/EdgeCom.2019.000-9
extern: '1'
keyword:
- computer network security
- multinetwork environments
- multidomain defensive action
- task execution order
- timing influence defense efficiency
- distributed attacks
- collaborative security defence approach
- minimize propagation approach
- minimize countermeasure approach
- counteract everywhere approach
- Conferences
- Cloud computing
- Computer crime
- Edge computing
- Security
- Defense Approaches
- Multi-Domain Defense
- Collaborative Defense
- Defense Algorithms
- Computer Networks
language:
- iso: eng
main_file_link:
- url: https://ieeexplore.ieee.org/abstract/document/8854057/authors#authors
page: 113-123
publication: 2019 6th IEEE International Conference on Cyber Security and Cloud Computing
  (CSCloud)/ 2019 5th IEEE International Conference on Edge Computing and Scalable
  Cloud (EdgeCom)
publication_identifier:
  issn:
  - 'null'
quality_controlled: '1'
series_title: 2019 6th IEEE International Conference on Cyber Security and Cloud Computing
  (CSCloud)/ 2019 5th IEEE International Conference on Edge Computing and Scalable
  Cloud (EdgeCom)
status: public
title: Approaches for Collaborative Security Defences in Multi Network Environments
type: conference
user_id: '83983'
year: '2019'
...
---
_id: '37009'
abstract:
- lang: eng
  text: Today, mobile and embedded real time systems have to cope with the migration
    and allocation of multiple software tasks running on top of a real time operating
    system (RTOS) residing on one or several processors. For scaling of each task
    set and processor configuration, instruction set simulation and worst case timing
    analysis are typically applied. This paper presents a complementary approach for
    the verification of RTOS properties based on an abstract RTOS-Model in SystemC.
    We apply IEEE P1850 PSL for which we present an approach and first experiences
    for the assertion-based verification of RTOS properties.
author:
- first_name: Marcio F. S.
  full_name: Oliveira, Marcio F. S.
  last_name: Oliveira
- first_name: Henning
  full_name: Zabel, Henning
  last_name: Zabel
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Oliveira MFS, Zabel H, Müller W. Assertion-Based Verification of RTOS Properties.
    In: <i>Proceedings of DATE’10</i>. IEEE; 2010. doi:<a href="https://doi.org/10.1109/DATE.2010.5457130">10.1109/DATE.2010.5457130</a>'
  apa: Oliveira, M. F. S., Zabel, H., &#38; Müller, W. (2010). Assertion-Based Verification
    of RTOS Properties. <i>Proceedings of DATE’10</i>. 2010 Design, Automation &#38;
    Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden. <a href="https://doi.org/10.1109/DATE.2010.5457130">https://doi.org/10.1109/DATE.2010.5457130</a>
  bibtex: '@inproceedings{Oliveira_Zabel_Müller_2010, place={Dresden}, title={Assertion-Based
    Verification of RTOS Properties}, DOI={<a href="https://doi.org/10.1109/DATE.2010.5457130">10.1109/DATE.2010.5457130</a>},
    booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Oliveira, Marcio
    F. S. and Zabel, Henning and Müller, Wolfgang}, year={2010} }'
  chicago: 'Oliveira, Marcio F. S., Henning Zabel, and Wolfgang Müller. “Assertion-Based
    Verification of RTOS Properties.” In <i>Proceedings of DATE’10</i>. Dresden: IEEE,
    2010. <a href="https://doi.org/10.1109/DATE.2010.5457130">https://doi.org/10.1109/DATE.2010.5457130</a>.'
  ieee: 'M. F. S. Oliveira, H. Zabel, and W. Müller, “Assertion-Based Verification
    of RTOS Properties,” presented at the 2010 Design, Automation &#38; Test in Europe
    Conference &#38; Exhibition (DATE 2010), Dresden, 2010, doi: <a href="https://doi.org/10.1109/DATE.2010.5457130">10.1109/DATE.2010.5457130</a>.'
  mla: Oliveira, Marcio F. S., et al. “Assertion-Based Verification of RTOS Properties.”
    <i>Proceedings of DATE’10</i>, IEEE, 2010, doi:<a href="https://doi.org/10.1109/DATE.2010.5457130">10.1109/DATE.2010.5457130</a>.
  short: 'M.F.S. Oliveira, H. Zabel, W. Müller, in: Proceedings of DATE’10, IEEE,
    Dresden, 2010.'
conference:
  location: Dresden
  name: 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
date_created: 2023-01-17T09:15:10Z
date_updated: 2023-01-17T09:15:18Z
department:
- _id: '672'
doi: 10.1109/DATE.2010.5457130
keyword:
- Operating systems
- Real time systems
- Timing
- Hardware
- Analytical models
- Embedded software
- Software systems
- Processor scheduling
- Software performance
- Performance analysis
language:
- iso: eng
place: Dresden
publication: Proceedings of DATE’10
publisher: IEEE
status: public
title: Assertion-Based Verification of RTOS Properties
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37011'
abstract:
- lang: eng
  text: Safety-critical automotive systems must fulfill hard real-time constraints
    for reliability and safety. This paper presents a case study for the application
    of an AUTOSAR-based language for timing modeling and analysis. We present and
    apply the Timing Augmented Description Language (TADL) and demonstrate a methodology
    for the development of a speed-adaptive steer-by-wire system. We examine the impact
    of TADL and the methodology on the development process and the suitability and
    interoperability of the applied tools with respect to the AUTOSAR-based tool chain
    in the context of our case study.
author:
- first_name: Kay
  full_name: Klobedanz, Kay
  last_name: Klobedanz
- first_name: Christoph
  full_name: Kuznik, Christoph
  last_name: Kuznik
- first_name: Andre
  full_name: Thuy, Andre
  last_name: Thuy
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Klobedanz K, Kuznik C, Thuy A, Müller W. Timing Modeling and Analysis for
    AUTOSAR-Based Software Development - A Case Study. In: <i>Proceedings of DATE’10,
    Dresden</i>. IEEE; 2010. doi:<a href="https://doi.org/10.1109/DATE.2010.5457125">10.1109/DATE.2010.5457125</a>'
  apa: Klobedanz, K., Kuznik, C., Thuy, A., &#38; Müller, W. (2010). Timing Modeling
    and Analysis for AUTOSAR-Based Software Development - A Case Study. <i>Proceedings
    of DATE’10, Dresden</i>. 2010 Design, Automation &#38; Test in Europe Conference
    &#38; Exhibition (DATE 2010), Dresden. <a href="https://doi.org/10.1109/DATE.2010.5457125">https://doi.org/10.1109/DATE.2010.5457125</a>
  bibtex: '@inproceedings{Klobedanz_Kuznik_Thuy_Müller_2010, place={Dresden}, title={Timing
    Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study},
    DOI={<a href="https://doi.org/10.1109/DATE.2010.5457125">10.1109/DATE.2010.5457125</a>},
    booktitle={Proceedings of DATE’10, Dresden}, publisher={IEEE}, author={Klobedanz,
    Kay and Kuznik, Christoph and Thuy, Andre and Müller, Wolfgang}, year={2010} }'
  chicago: 'Klobedanz, Kay, Christoph Kuznik, Andre Thuy, and Wolfgang Müller. “Timing
    Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study.”
    In <i>Proceedings of DATE’10, Dresden</i>. Dresden: IEEE, 2010. <a href="https://doi.org/10.1109/DATE.2010.5457125">https://doi.org/10.1109/DATE.2010.5457125</a>.'
  ieee: 'K. Klobedanz, C. Kuznik, A. Thuy, and W. Müller, “Timing Modeling and Analysis
    for AUTOSAR-Based Software Development - A Case Study,” presented at the 2010
    Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010),
    Dresden, 2010, doi: <a href="https://doi.org/10.1109/DATE.2010.5457125">10.1109/DATE.2010.5457125</a>.'
  mla: Klobedanz, Kay, et al. “Timing Modeling and Analysis for AUTOSAR-Based Software
    Development - A Case Study.” <i>Proceedings of DATE’10, Dresden</i>, IEEE, 2010,
    doi:<a href="https://doi.org/10.1109/DATE.2010.5457125">10.1109/DATE.2010.5457125</a>.
  short: 'K. Klobedanz, C. Kuznik, A. Thuy, W. Müller, in: Proceedings of DATE’10,
    Dresden, IEEE, Dresden, 2010.'
conference:
  location: Dresden
  name: 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
date_created: 2023-01-17T09:19:36Z
date_updated: 2023-01-17T09:19:46Z
department:
- _id: '672'
doi: 10.1109/DATE.2010.5457125
keyword:
- Timing
- Programming
- Automotive engineering
- Application software
- Hardware
- Computer architecture
- Communication system software
- Software architecture
- Delay
- Software standards
language:
- iso: eng
place: Dresden
publication: Proceedings of DATE’10, Dresden
publisher: IEEE
status: public
title: Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case
  Study
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37040'
abstract:
- lang: eng
  text: Refinement of untimed TLM models into a timed HW/SW platform is a step by
    step design process which is a trade-off between timing accuracy of the used models
    and correct estimation of the final timing performance. The use of an RTOS on
    the target platform is mandatory in the case real-time properties must be guaranteed.
    Thus, the question is when the RTOS must be introduced in this step by step refinement
    process. This paper proposes a four-level RTOS-aware refinement methodology that,
    starting from an untimed TLM SystemC description of the whole system, progressively
    introduce HW/SW partitioning, timing, device driver and RTOS functionalities,
    till to obtain an accurate model of the final platform, where SW tasks run upon
    an RTOS hosted by QEMU and HW components are modeled by cycle accurate TLM descriptions.
    Each refinement level allows the designer to estimate more and more accurate timing
    properties, thus anticipating design decisions without being constrained to leave
    timing analysis to the final step of the refinement. The effectiveness of the
    methodology has been evaluated in the design of two complex platforms.
author:
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Giuseppe
  full_name: Di Guglielmo, Giuseppe
  last_name: Di Guglielmo
- first_name: Franco
  full_name: Fummi, Franco
  last_name: Fummi
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Graziano
  full_name: Pravadelli, Graziano
  last_name: Pravadelli
- first_name: Tao
  full_name: Xie, Tao
  last_name: Xie
citation:
  ama: 'Becker M, Di Guglielmo G, Fummi F, Müller W, Pravadelli G, Xie T. RTOS-Aware
    Refinement for TLM2.0-based HW/SW Design. In: <i>Proceedings of DATE’10</i>. IEEE;
    2010. doi:<a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>'
  apa: Becker, M., Di Guglielmo, G., Fummi, F., Müller, W., Pravadelli, G., &#38;
    Xie, T. (2010). RTOS-Aware Refinement for TLM2.0-based HW/SW Design. <i>Proceedings
    of DATE’10</i>. Design, Automation &#38; Test in Europe Conference &#38; Exhibition
    (DATE 2010), Dresden. <a href="https://doi.org/10.1109/DATE.2010.5456965">https://doi.org/10.1109/DATE.2010.5456965</a>
  bibtex: '@inproceedings{Becker_Di Guglielmo_Fummi_Müller_Pravadelli_Xie_2010, place={Dresden},
    title={RTOS-Aware Refinement for TLM2.0-based HW/SW Design}, DOI={<a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>},
    booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Becker, Markus and
    Di Guglielmo, Giuseppe and Fummi, Franco and Müller, Wolfgang and Pravadelli,
    Graziano and Xie, Tao}, year={2010} }'
  chicago: 'Becker, Markus, Giuseppe Di Guglielmo, Franco Fummi, Wolfgang Müller,
    Graziano Pravadelli, and Tao Xie. “RTOS-Aware Refinement for TLM2.0-Based HW/SW
    Design.” In <i>Proceedings of DATE’10</i>. Dresden: IEEE, 2010. <a href="https://doi.org/10.1109/DATE.2010.5456965">https://doi.org/10.1109/DATE.2010.5456965</a>.'
  ieee: 'M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, and T. Xie,
    “RTOS-Aware Refinement for TLM2.0-based HW/SW Design,” presented at the Design,
    Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden,
    2010, doi: <a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>.'
  mla: Becker, Markus, et al. “RTOS-Aware Refinement for TLM2.0-Based HW/SW Design.”
    <i>Proceedings of DATE’10</i>, IEEE, 2010, doi:<a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>.
  short: 'M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, T. Xie,
    in: Proceedings of DATE’10, IEEE, Dresden, 2010.'
conference:
  location: Dresden
  name: Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
date_created: 2023-01-17T10:47:29Z
date_updated: 2023-01-17T10:47:37Z
department:
- _id: '672'
doi: 10.1109/DATE.2010.5456965
keyword:
- Timing
- Hardware
- Operating systems
- Process design
- Accuracy
- Standards development
- Context modeling
- Real time systems
- Communication channels
- Microprogramming
language:
- iso: eng
place: Dresden
publication: Proceedings of DATE’10
publication_identifier:
  eisbn:
  - 978-3-9810801-6-2
publisher: IEEE
status: public
title: RTOS-Aware Refinement for TLM2.0-based HW/SW Design
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37053'
abstract:
- lang: eng
  text: Seamless HW/SW codesign flows support early verification of hardware and Hardware-dependent
    Software (HdS) like drivers, operating systems, and firmware. For early estimation
    and verification, the application of SystemC in combination with Instruction Set
    Simulators and Software Emulators like QEMU is widely accepted. In this article,
    we present an advanced design flow for HW, (RT)OS and HdS refinement and verification
    with focus on the transition from abstract RTOS verification to full system RTOS/HdS
    emulation. In the context of assertion-based verification, we introduce a set
    of generic real-time properties which can be reused and verified at different
    abstraction levels and discuss their application. The properties are presented
    by the means of IEEE standard PSL assertions which are applied for mixed SystemC/HdS
    models.
author:
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Marcio F.
  full_name: da S. Oliveira, Marcio F.
  last_name: da S. Oliveira
- first_name: Henning
  full_name: Zabel, Henning
  last_name: Zabel
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
citation:
  ama: 'Müller W, da S. Oliveira MF, Zabel H, Becker M. Verification of Real-Time
    Properties for Hardware-Dependant Software. In: <i>Proceedings of HLDVT2010</i>.
    IEEE; 2010.'
  apa: Müller, W., da S. Oliveira, M. F., Zabel, H., &#38; Becker, M. (2010). Verification
    of Real-Time Properties for Hardware-Dependant Software. <i>Proceedings of HLDVT2010</i>.
    IEEE International High Level Design Validation and Test Workshop (HLDVT), Anaheim,
    FL, USA.
  bibtex: '@inproceedings{Müller_da S. Oliveira_Zabel_Becker_2010, title={Verification
    of Real-Time Properties for Hardware-Dependant Software}, booktitle={Proceedings
    of HLDVT2010}, publisher={IEEE}, author={Müller, Wolfgang and da S. Oliveira,
    Marcio F. and Zabel, Henning and Becker, Markus}, year={2010} }'
  chicago: Müller, Wolfgang, Marcio F. da S. Oliveira, Henning Zabel, and Markus Becker.
    “Verification of Real-Time Properties for Hardware-Dependant Software.” In <i>Proceedings
    of HLDVT2010</i>. IEEE, 2010.
  ieee: W. Müller, M. F. da S. Oliveira, H. Zabel, and M. Becker, “Verification of
    Real-Time Properties for Hardware-Dependant Software,” presented at the IEEE International
    High Level Design Validation and Test Workshop (HLDVT), Anaheim, FL, USA, 2010.
  mla: Müller, Wolfgang, et al. “Verification of Real-Time Properties for Hardware-Dependant
    Software.” <i>Proceedings of HLDVT2010</i>, IEEE, 2010.
  short: 'W. Müller, M.F. da S. Oliveira, H. Zabel, M. Becker, in: Proceedings of
    HLDVT2010, IEEE, 2010.'
conference:
  location: Anaheim, FL, USA
  name: IEEE International High Level Design Validation and Test Workshop (HLDVT)
date_created: 2023-01-17T11:28:26Z
date_updated: 2023-01-17T11:28:30Z
department:
- _id: '672'
keyword:
- Hardware
- Microprogramming
- Application software
- Timing
- Protocols
- Virtual prototyping
- Real time systems
- Sampling methods
- Operating systems
- Emulation
language:
- iso: eng
publication: Proceedings of HLDVT2010
publication_identifier:
  eisbn:
  - 978-1-4244-7806-4
publisher: IEEE
status: public
title: Verification of Real-Time Properties for Hardware-Dependant Software
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37039'
abstract:
- lang: eng
  text: Refinement of untimed TLM models into a timed HW/SW platform is a step by
    step design process which is a trade-off between timing accuracy of the used models
    and correct estimation of the final timing performance. The use of an RTOS on
    the target platform is mandatory in the case real-time properties must be guaranteed.
    Thus, the question is when the RTOS must be introduced in this step by step refinement
    process. This paper proposes a four-level RTOS-aware refinement methodology that,
    starting from an untimed TLM SystemC description of the whole system, progressively
    introduce HW/SW partitioning, timing, device driver and RTOS functionalities,
    till to obtain an accurate model of the final platform, where SW tasks run upon
    an RTOS hosted by QEMU and HW components are modeled by cycle accurate TLM descriptions.
    Each refinement level allows the designer to estimate more and more accurate timing
    properties, thus anticipating design decisions without being constrained to leave
    timing analysis to the final step of the refinement. The effectiveness of the
    methodology has been evaluated in the design of two complex platforms.
author:
- first_name: Markus
  full_name: Becker, Markus
  last_name: Becker
- first_name: Giuseppe
  full_name: Di Guglielmo, Giuseppe
  last_name: Di Guglielmo
- first_name: Franco
  full_name: Fummi, Franco
  last_name: Fummi
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Graziano
  full_name: Pravadelli, Graziano
  last_name: Pravadelli
- first_name: Tao
  full_name: Xie, Tao
  last_name: Xie
citation:
  ama: 'Becker M, Di Guglielmo G, Fummi F, Müller W, Pravadelli G, Xie T. RTOS-Aware
    Refinement for TLM2.0-based HW/SW Design. In: <i>Proceedings of DATE’10</i>. IEEE;
    2010. doi:<a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>'
  apa: Becker, M., Di Guglielmo, G., Fummi, F., Müller, W., Pravadelli, G., &#38;
    Xie, T. (2010). RTOS-Aware Refinement for TLM2.0-based HW/SW Design. <i>Proceedings
    of DATE’10</i>. Design, Automation &#38; Test in Europe Conference &#38; Exhibition
    (DATE 2010), Dresden. <a href="https://doi.org/10.1109/DATE.2010.5456965">https://doi.org/10.1109/DATE.2010.5456965</a>
  bibtex: '@inproceedings{Becker_Di Guglielmo_Fummi_Müller_Pravadelli_Xie_2010, place={Dresden},
    title={RTOS-Aware Refinement for TLM2.0-based HW/SW Design}, DOI={<a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>},
    booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Becker, Markus and
    Di Guglielmo, Giuseppe and Fummi, Franco and Müller, Wolfgang and Pravadelli,
    Graziano and Xie, Tao}, year={2010} }'
  chicago: 'Becker, Markus, Giuseppe Di Guglielmo, Franco Fummi, Wolfgang Müller,
    Graziano Pravadelli, and Tao Xie. “RTOS-Aware Refinement for TLM2.0-Based HW/SW
    Design.” In <i>Proceedings of DATE’10</i>. Dresden: IEEE, 2010. <a href="https://doi.org/10.1109/DATE.2010.5456965">https://doi.org/10.1109/DATE.2010.5456965</a>.'
  ieee: 'M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, and T. Xie,
    “RTOS-Aware Refinement for TLM2.0-based HW/SW Design,” presented at the Design,
    Automation &#38; Test in Europe Conference &#38; Exhibition (DATE 2010), Dresden,
    2010, doi: <a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>.'
  mla: Becker, Markus, et al. “RTOS-Aware Refinement for TLM2.0-Based HW/SW Design.”
    <i>Proceedings of DATE’10</i>, IEEE, 2010, doi:<a href="https://doi.org/10.1109/DATE.2010.5456965">10.1109/DATE.2010.5456965</a>.
  short: 'M. Becker, G. Di Guglielmo, F. Fummi, W. Müller, G. Pravadelli, T. Xie,
    in: Proceedings of DATE’10, IEEE, Dresden, 2010.'
conference:
  location: Dresden
  name: Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
date_created: 2023-01-17T10:44:46Z
date_updated: 2025-03-12T16:39:17Z
doi: 10.1109/DATE.2010.5456965
keyword:
- Timing
- Hardware
- Operating systems
- Process design
- Accuracy
- Standards development
- Context modeling
- Real time systems
- Communication channels
- Microprogramming
language:
- iso: eng
place: Dresden
publication: Proceedings of DATE’10
publication_identifier:
  eisbn:
  - 978-3-9810801-6-2
publisher: IEEE
status: public
title: RTOS-Aware Refinement for TLM2.0-based HW/SW Design
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37066'
abstract:
- lang: eng
  text: Today, mobile and embedded real-time systems have to cope with the migration
    and allocation of multiple software tasks running on top of a real-time operating
    system (RTOS) residing on one or multiple system processors. Abstract RTOS simulations
    and timing analysis applies for fast and early estimation to configure it towards
    the individual needs of the application and environment. In this context, a high
    accuracy of the simulation compared to an instruction set simulation (ISS) is
    of key importance. In this paper, we investigate the accuracy of abstract RTOS
    simulation and compare it to ISS and the behavior of the physical system. We show
    that we can reach an increased accuracy of the simulation when we inject noise
    into the time model. Our results indicate that it is sufficient to inject uniformly
    distributed random time values to the RTOS real-time clock.
author:
- first_name: Henning
  full_name: Zabel, Henning
  last_name: Zabel
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Zabel H, Müller W. Increased Accuracy through Noise Injection in Abstract
    RTOS Simulation. In: <i>Proceedings of DATE’09</i>. ; 2009. doi:<a href="https://doi.org/10.1109/DATE.2009.5090925">10.1109/DATE.2009.5090925</a>'
  apa: Zabel, H., &#38; Müller, W. (2009). Increased Accuracy through Noise Injection
    in Abstract RTOS Simulation. <i>Proceedings of DATE’09</i>. Design, Automation
    &#38; Test in Europe Conference &#38; Exhibition. <a href="https://doi.org/10.1109/DATE.2009.5090925">https://doi.org/10.1109/DATE.2009.5090925</a>
  bibtex: '@inproceedings{Zabel_Müller_2009, place={Nice, France}, title={Increased
    Accuracy through Noise Injection in Abstract RTOS Simulation}, DOI={<a href="https://doi.org/10.1109/DATE.2009.5090925">10.1109/DATE.2009.5090925</a>},
    booktitle={Proceedings of DATE’09}, author={Zabel, Henning and Müller, Wolfgang},
    year={2009} }'
  chicago: Zabel, Henning, and Wolfgang Müller. “Increased Accuracy through Noise
    Injection in Abstract RTOS Simulation.” In <i>Proceedings of DATE’09</i>. Nice,
    France, 2009. <a href="https://doi.org/10.1109/DATE.2009.5090925">https://doi.org/10.1109/DATE.2009.5090925</a>.
  ieee: 'H. Zabel and W. Müller, “Increased Accuracy through Noise Injection in Abstract
    RTOS Simulation,” presented at the Design, Automation &#38; Test in Europe Conference
    &#38; Exhibition, 2009, doi: <a href="https://doi.org/10.1109/DATE.2009.5090925">10.1109/DATE.2009.5090925</a>.'
  mla: Zabel, Henning, and Wolfgang Müller. “Increased Accuracy through Noise Injection
    in Abstract RTOS Simulation.” <i>Proceedings of DATE’09</i>, 2009, doi:<a href="https://doi.org/10.1109/DATE.2009.5090925">10.1109/DATE.2009.5090925</a>.
  short: 'H. Zabel, W. Müller, in: Proceedings of DATE’09, Nice, France, 2009.'
conference:
  name: Design, Automation & Test in Europe Conference & Exhibition
date_created: 2023-01-17T11:51:44Z
date_updated: 2023-01-17T11:51:48Z
department:
- _id: '672'
doi: 10.1109/DATE.2009.5090925
keyword:
- Timing
- Analytical models
- Clocks
- Performance analysis
- Scheduling
- Operating systems
- Delay
- Real time systems
- Application software
- Context modeling
language:
- iso: eng
place: Nice, France
publication: Proceedings of DATE'09
publication_identifier:
  isbn:
  - 978-1-4244-3781-8
status: public
title: Increased Accuracy through Noise Injection in Abstract RTOS Simulation
type: conference
user_id: '5786'
year: '2009'
...
---
_id: '39502'
abstract:
- lang: eng
  text: The authors present a new approach to an interactive design and analysis environment
    for visual languages. The main components, i.e., editor animator and interpreter
    are introduced. Their interactions are being investigated emphasizing the interpreter-animator
    interaction and defining an interface supporting different levels of automation.
    The interpreter performs the executions on a logical level and triggers the animator.
    The interactive animation provides a very high degree of liveness since it is
    based on the tight integration of the animator and editor. The proposed architecture
    permits the distributed implementation of a system for real-time animation. Their
    concepts are validated by the implementation of a debugging environment for the
    complete visual programming language Pictorial Janus.
author:
- first_name: M.
  full_name: Dücker, M.
  last_name: Dücker
- first_name: Georg
  full_name: Lehrenfeld, Georg
  last_name: Lehrenfeld
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: C.
  full_name: Tahedl, C.
  last_name: Tahedl
citation:
  ama: 'Dücker M, Lehrenfeld G, Müller W, Tahedl C. A Generic System for Interactive
    Real--Time Animation. In: <i> Proceedings International Conference and Workshop
    on Engineering of Computer-Based Systems</i>. ; 1997. doi:<a href="https://doi.org/10.1109/ECBS.1997.581876">10.1109/ECBS.1997.581876</a>'
  apa: Dücker, M., Lehrenfeld, G., Müller, W., &#38; Tahedl, C. (1997). A Generic
    System for Interactive Real--Time Animation. <i> Proceedings International Conference
    and Workshop on Engineering of Computer-Based Systems</i>. <a href="https://doi.org/10.1109/ECBS.1997.581876">https://doi.org/10.1109/ECBS.1997.581876</a>
  bibtex: '@inproceedings{Dücker_Lehrenfeld_Müller_Tahedl_1997, place={Monterey, CA,
    USA }, title={A Generic System for Interactive Real--Time Animation}, DOI={<a
    href="https://doi.org/10.1109/ECBS.1997.581876">10.1109/ECBS.1997.581876</a>},
    booktitle={ Proceedings International Conference and Workshop on Engineering of
    Computer-Based Systems}, author={Dücker, M. and Lehrenfeld, Georg and Müller,
    Wolfgang and Tahedl, C.}, year={1997} }'
  chicago: Dücker, M., Georg Lehrenfeld, Wolfgang Müller, and C. Tahedl. “A Generic
    System for Interactive Real--Time Animation.” In <i> Proceedings International
    Conference and Workshop on Engineering of Computer-Based Systems</i>. Monterey,
    CA, USA , 1997. <a href="https://doi.org/10.1109/ECBS.1997.581876">https://doi.org/10.1109/ECBS.1997.581876</a>.
  ieee: 'M. Dücker, G. Lehrenfeld, W. Müller, and C. Tahedl, “A Generic System for
    Interactive Real--Time Animation,” Monterey, CA, USA , 1997, doi: <a href="https://doi.org/10.1109/ECBS.1997.581876">10.1109/ECBS.1997.581876</a>.'
  mla: Dücker, M., et al. “A Generic System for Interactive Real--Time Animation.”
    <i> Proceedings International Conference and Workshop on Engineering of Computer-Based
    Systems</i>, 1997, doi:<a href="https://doi.org/10.1109/ECBS.1997.581876">10.1109/ECBS.1997.581876</a>.
  short: 'M. Dücker, G. Lehrenfeld, W. Müller, C. Tahedl, in:  Proceedings International
    Conference and Workshop on Engineering of Computer-Based Systems, Monterey, CA,
    USA , 1997.'
conference:
  location: 'Monterey, CA, USA '
date_created: 2023-01-24T11:46:23Z
date_updated: 2023-01-24T11:46:28Z
department:
- _id: '672'
doi: 10.1109/ECBS.1997.581876
keyword:
- Real time systems
- Animation
- Debugging
- Automation
- Computer languages
- Timing
- Environmental management
- Programming environments
- Visualization
- Multimedia systems
language:
- iso: eng
place: 'Monterey, CA, USA '
publication: ' Proceedings International Conference and Workshop on Engineering of
  Computer-Based Systems'
publication_identifier:
  isbn:
  - 0-8186-7889-5
status: public
title: A Generic System for Interactive Real--Time Animation
type: conference
user_id: '5786'
year: '1997'
...
---
_id: '39541'
abstract:
- lang: eng
  text: We investigate a translation of SDL diagrams into the complete visual representation
    of Pictorial Janus (PJ) programs in order to analyze the specification by visual
    debugging and animation. We additionally introduce timing concepts to PJ (Timed
    PJ) for a mapping of the SDL timing statements. The concepts transforming SDL
    interaction and process diagrams into Timed PJ are outlined by an example sketching
    the transformation of an Ethernet CSMA/CD protocol specification.
author:
- first_name: Georg
  full_name: Lehrenfeld, Georg
  last_name: Lehrenfeld
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: C.
  full_name: Tahedl, C.
  last_name: Tahedl
citation:
  ama: 'Lehrenfeld G, Müller W, Tahedl C. Transforming SDL Diagrams Into a Complete
    Visual Representation. In: <i>Proceedings of Symposium on Visual Languages</i>.
    ; 1995. doi:<a href="https://doi.org/10.1109/VL.1995.520803">10.1109/VL.1995.520803</a>'
  apa: Lehrenfeld, G., Müller, W., &#38; Tahedl, C. (1995). Transforming SDL Diagrams
    Into a Complete Visual Representation. <i>Proceedings of Symposium on Visual Languages</i>.
    <a href="https://doi.org/10.1109/VL.1995.520803">https://doi.org/10.1109/VL.1995.520803</a>
  bibtex: '@inproceedings{Lehrenfeld_Müller_Tahedl_1995, place={ Darmstadt, Germany
    }, title={Transforming SDL Diagrams Into a Complete Visual Representation}, DOI={<a
    href="https://doi.org/10.1109/VL.1995.520803">10.1109/VL.1995.520803</a>}, booktitle={Proceedings
    of Symposium on Visual Languages}, author={Lehrenfeld, Georg and Müller, Wolfgang
    and Tahedl, C.}, year={1995} }'
  chicago: Lehrenfeld, Georg, Wolfgang Müller, and C. Tahedl. “Transforming SDL Diagrams
    Into a Complete Visual Representation.” In <i>Proceedings of Symposium on Visual
    Languages</i>.  Darmstadt, Germany , 1995. <a href="https://doi.org/10.1109/VL.1995.520803">https://doi.org/10.1109/VL.1995.520803</a>.
  ieee: 'G. Lehrenfeld, W. Müller, and C. Tahedl, “Transforming SDL Diagrams Into
    a Complete Visual Representation,” 1995, doi: <a href="https://doi.org/10.1109/VL.1995.520803">10.1109/VL.1995.520803</a>.'
  mla: Lehrenfeld, Georg, et al. “Transforming SDL Diagrams Into a Complete Visual
    Representation.” <i>Proceedings of Symposium on Visual Languages</i>, 1995, doi:<a
    href="https://doi.org/10.1109/VL.1995.520803">10.1109/VL.1995.520803</a>.
  short: 'G. Lehrenfeld, W. Müller, C. Tahedl, in: Proceedings of Symposium on Visual
    Languages,  Darmstadt, Germany , 1995.'
date_created: 2023-01-24T12:07:26Z
date_updated: 2023-01-24T12:07:33Z
department:
- _id: '672'
doi: 10.1109/VL.1995.520803
keyword:
- Animation
- Timing
- Debugging
- Ethernet networks
- Multiaccess communication
- Protocols
- Computer languages
- Prototypes
- Environmental management
- Visualization
language:
- iso: eng
place: ' Darmstadt, Germany '
publication: Proceedings of Symposium on Visual Languages
publication_identifier:
  isbn:
  - 0-8186-7045-2
status: public
title: Transforming SDL Diagrams Into a Complete Visual Representation
type: conference
user_id: '5786'
year: '1995'
...
---
_id: '39538'
abstract:
- lang: eng
  text: This article discusses the application of Pictorial Janus (PJ) for the rapid
    development and analysis of protocols by animation and complete visualization.
    In order to make PJ applicable in the context of hardware description we first
    extend PJ by timing facilities (Timed PJ) and introduce an approach for integrating
    VHDL models into this visual framework preserving the simulation semantics of
    VHDL. We finally give the example of the specification and animation of a non
    interlocked protocol.
author:
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Georg
  full_name: Lehrenfeld, Georg
  last_name: Lehrenfeld
- first_name: C.
  full_name: Tahedl, C.
  last_name: Tahedl
citation:
  ama: 'Müller W, Lehrenfeld G, Tahedl C. Complete Visual Specification and Animations
    of Protocols. In: <i>Proceedings of ASP-DAC’95/CHDL’95/VLSI’95 with EDA Technofair</i>.
    ; 1995. doi:<a href="https://doi.org/10.1109/ASPDAC.1995.486383">10.1109/ASPDAC.1995.486383</a>'
  apa: Müller, W., Lehrenfeld, G., &#38; Tahedl, C. (1995). Complete Visual Specification
    and Animations of Protocols. <i>Proceedings of ASP-DAC’95/CHDL’95/VLSI’95 with
    EDA Technofair</i>. <a href="https://doi.org/10.1109/ASPDAC.1995.486383">https://doi.org/10.1109/ASPDAC.1995.486383</a>
  bibtex: '@inproceedings{Müller_Lehrenfeld_Tahedl_1995, place={Chiba, Japan }, title={Complete
    Visual Specification and Animations of Protocols}, DOI={<a href="https://doi.org/10.1109/ASPDAC.1995.486383">10.1109/ASPDAC.1995.486383</a>},
    booktitle={Proceedings of ASP-DAC’95/CHDL’95/VLSI’95 with EDA Technofair}, author={Müller,
    Wolfgang and Lehrenfeld, Georg and Tahedl, C.}, year={1995} }'
  chicago: Müller, Wolfgang, Georg Lehrenfeld, and C. Tahedl. “Complete Visual Specification
    and Animations of Protocols.” In <i>Proceedings of ASP-DAC’95/CHDL’95/VLSI’95
    with EDA Technofair</i>. Chiba, Japan , 1995. <a href="https://doi.org/10.1109/ASPDAC.1995.486383">https://doi.org/10.1109/ASPDAC.1995.486383</a>.
  ieee: 'W. Müller, G. Lehrenfeld, and C. Tahedl, “Complete Visual Specification and
    Animations of Protocols,” 1995, doi: <a href="https://doi.org/10.1109/ASPDAC.1995.486383">10.1109/ASPDAC.1995.486383</a>.'
  mla: Müller, Wolfgang, et al. “Complete Visual Specification and Animations of Protocols.”
    <i>Proceedings of ASP-DAC’95/CHDL’95/VLSI’95 with EDA Technofair</i>, 1995, doi:<a
    href="https://doi.org/10.1109/ASPDAC.1995.486383">10.1109/ASPDAC.1995.486383</a>.
  short: 'W. Müller, G. Lehrenfeld, C. Tahedl, in: Proceedings of ASP-DAC’95/CHDL’95/VLSI’95
    with EDA Technofair, Chiba, Japan , 1995.'
date_created: 2023-01-24T12:05:55Z
date_updated: 2023-01-24T12:05:59Z
department:
- _id: '672'
doi: 10.1109/ASPDAC.1995.486383
keyword:
- Animation
- Protocols
- Timing
- Computer languages
- Electronic mail
- Context modeling
- Visualization
- Control systems
- Flow graphs
- Trademarks
language:
- iso: eng
place: 'Chiba, Japan '
publication: Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair
publication_identifier:
  isbn:
  - 4-930813-67-0
status: public
title: Complete Visual Specification and Animations of Protocols
type: conference
user_id: '5786'
year: '1995'
...