[{"title":"Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime","doi":"10.1109/ReConFig.2013.6732280","date_updated":"2022-01-06T06:50:48Z","author":[{"first_name":"Jahanzeb","full_name":"Anwer, Jahanzeb","last_name":"Anwer"},{"first_name":"Sebastian","last_name":"Meisner","full_name":"Meisner, Sebastian"},{"full_name":"Platzner, Marco","id":"398","last_name":"Platzner","first_name":"Marco"}],"date_created":"2019-07-10T09:32:57Z","year":"2013","citation":{"chicago":"Anwer, Jahanzeb, Sebastian Meisner, and Marco Platzner. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.” In <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>, 1–6, 2013. <a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">https://doi.org/10.1109/ReConFig.2013.6732280</a>.","ieee":"J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on</i>, 2013, pp. 1–6.","ama":"Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In: <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>. ; 2013:1-6. doi:<a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">10.1109/ReConFig.2013.6732280</a>","mla":"Anwer, Jahanzeb, et al. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.” <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>, 2013, pp. 1–6, doi:<a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">10.1109/ReConFig.2013.6732280</a>.","short":"J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6.","bibtex":"@inproceedings{Anwer_Meisner_Platzner_2013, title={Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime}, DOI={<a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">10.1109/ReConFig.2013.6732280</a>}, booktitle={Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on}, author={Anwer, Jahanzeb and Meisner, Sebastian and Platzner, Marco}, year={2013}, pages={1–6} }","apa":"Anwer, J., Meisner, S., &#38; Platzner, M. (2013). Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on</i> (pp. 1–6). <a href=\"https://doi.org/10.1109/ReConFig.2013.6732280\">https://doi.org/10.1109/ReConFig.2013.6732280</a>"},"page":"1-6","keyword":["fault tolerant computing","field programmable gate arrays","logic design","reliability","BYU-LANL tool","DRM tool flow","FPGA based hardware designs","avionic application","device technologies","dynamic reliability management","fault-tolerant operation","hardware designs","reconfiguring reliability levels","space applications","Field programmable gate arrays","Hardware","Redundancy","Reliability engineering","Runtime","Tunneling magnetoresistance"],"language":[{"iso":"eng"}],"_id":"10620","user_id":"3118","department":[{"_id":"78"}],"status":"public","type":"conference","publication":"Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on"}]