---
_id: '37048'
abstract:
- lang: eng
  text: We introduce a structured methodology for the generation of executable test
    environments from textual requirement specifications via UML class diagrams and
    the application of the classification tree methodology for embedded systems. The
    first phase is a stepwise transformation from unstructured English text into a
    textual normal form (TNF), which is automatically translated into UML class diagrams.
    After annotations of the class diagrams and the definition of test cases by sequence
    diagrams, both are converted into classification trees. From the classification
    trees we can finally generate SystemVerilog code. The methodology is introduced
    and evaluated by the example of an Adaptive Cruise Controller.
author:
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Alexander
  full_name: Bol, Alexander
  last_name: Bol
- first_name: Alexander
  full_name: Krupp, Alexander
  last_name: Krupp
- first_name: Ola
  full_name: Lundkvist, Ola
  last_name: Lundkvist
citation:
  ama: 'Müller W, Bol A, Krupp A, Lundkvist O. Generation of Executable Testbenches
    from Natural Language Requirement Specifications for Embedded Real-Time Systems.
    In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:<a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>'
  apa: Müller, W., Bol, A., Krupp, A., &#38; Lundkvist, O. (2010). <i>Generation of
    Executable Testbenches from Natural Language Requirement Specifications for Embedded
    Real-Time Systems</i> (L. Kleinjohann &#38; B. Kleinjohann, Eds.). Springer Verlag.
    <a href="https://doi.org/10.1007/978-3-642-15234-4_9">https://doi.org/10.1007/978-3-642-15234-4_9</a>
  bibtex: '@inproceedings{Müller_Bol_Krupp_Lundkvist_2010, place={Dordrecht}, title={Generation
    of Executable Testbenches from Natural Language Requirement Specifications for
    Embedded Real-Time Systems}, DOI={<a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>},
    publisher={Springer Verlag}, author={Müller, Wolfgang and Bol, Alexander and Krupp,
    Alexander and Lundkvist, Ola}, editor={Kleinjohann, L. and Kleinjohann, B.}, year={2010}
    }'
  chicago: 'Müller, Wolfgang, Alexander Bol, Alexander Krupp, and Ola Lundkvist. “Generation
    of Executable Testbenches from Natural Language Requirement Specifications for
    Embedded Real-Time Systems.” edited by L. Kleinjohann and B. Kleinjohann. Dordrecht:
    Springer Verlag, 2010. <a href="https://doi.org/10.1007/978-3-642-15234-4_9">https://doi.org/10.1007/978-3-642-15234-4_9</a>.'
  ieee: 'W. Müller, A. Bol, A. Krupp, and O. Lundkvist, “Generation of Executable
    Testbenches from Natural Language Requirement Specifications for Embedded Real-Time
    Systems,” 2010, doi: <a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>.'
  mla: Müller, Wolfgang, et al. <i>Generation of Executable Testbenches from Natural
    Language Requirement Specifications for Embedded Real-Time Systems</i>. Edited
    by L. Kleinjohann and B. Kleinjohann, Springer Verlag, 2010, doi:<a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>.
  short: 'W. Müller, A. Bol, A. Krupp, O. Lundkvist, in: L. Kleinjohann, B. Kleinjohann
    (Eds.), Springer Verlag, Dordrecht, 2010.'
conference:
  name: IFIP Working Conference on Distributed and Parallel Embedded Systems (DIPES
    2010)
date_created: 2023-01-17T11:09:48Z
date_updated: 2023-01-17T11:09:54Z
department:
- _id: '672'
doi: 10.1007/978-3-642-15234-4_9
editor:
- first_name: L.
  full_name: Kleinjohann, L.
  last_name: Kleinjohann
- first_name: B.
  full_name: Kleinjohann, B.
  last_name: Kleinjohann
keyword:
- Natural Language     UML     SystemVerilog     Testbenches
language:
- iso: eng
place: Dordrecht
publication_identifier:
  isbn:
  - 978-3-642-15233-7
publisher: Springer Verlag
status: public
title: Generation of Executable Testbenches from Natural Language Requirement Specifications
  for Embedded Real-Time Systems
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37047'
abstract:
- lang: eng
  text: We introduce a structured methodology for the generation of executable test
    environments from textual requirement specifications via UML class diagrams and
    the application of the classification tree methodology for embedded systems. The
    first phase is a stepwise transformation from unstructured English text into a
    textual normal form (TNF), which is automatically translated into UML class diagrams.
    After annotations of the class diagrams and the definition of test cases by sequence
    diagrams, both are converted into classification trees. From the classification
    trees we can finally generate SystemVerilog code. The methodology is introduced
    and evaluated by the example of an Adaptive Cruise Controller.
author:
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Alexander
  full_name: Bol, Alexander
  last_name: Bol
- first_name: Alexander
  full_name: Krupp, Alexander
  last_name: Krupp
- first_name: Ola
  full_name: Lundkvist, Ola
  last_name: Lundkvist
citation:
  ama: 'Müller W, Bol A, Krupp A, Lundkvist O. Generation of Executable Testbenches
    from Natural Language Requirement Specifications for Embedded Real-Time Systems.
    In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:<a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>'
  apa: Müller, W., Bol, A., Krupp, A., &#38; Lundkvist, O. (2010). <i>Generation of
    Executable Testbenches from Natural Language Requirement Specifications for Embedded
    Real-Time Systems</i> (L. Kleinjohann &#38; B. Kleinjohann, Eds.). Springer Verlag.
    <a href="https://doi.org/10.1007/978-3-642-15234-4_9">https://doi.org/10.1007/978-3-642-15234-4_9</a>
  bibtex: '@inproceedings{Müller_Bol_Krupp_Lundkvist_2010, place={Dordrecht}, title={Generation
    of Executable Testbenches from Natural Language Requirement Specifications for
    Embedded Real-Time Systems}, DOI={<a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>},
    publisher={Springer Verlag}, author={Müller, Wolfgang and Bol, Alexander and Krupp,
    Alexander and Lundkvist, Ola}, editor={Kleinjohann, L. and Kleinjohann, B.}, year={2010}
    }'
  chicago: 'Müller, Wolfgang, Alexander Bol, Alexander Krupp, and Ola Lundkvist. “Generation
    of Executable Testbenches from Natural Language Requirement Specifications for
    Embedded Real-Time Systems.” edited by L. Kleinjohann and B. Kleinjohann. Dordrecht:
    Springer Verlag, 2010. <a href="https://doi.org/10.1007/978-3-642-15234-4_9">https://doi.org/10.1007/978-3-642-15234-4_9</a>.'
  ieee: 'W. Müller, A. Bol, A. Krupp, and O. Lundkvist, “Generation of Executable
    Testbenches from Natural Language Requirement Specifications for Embedded Real-Time
    Systems,” 2010, doi: <a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>.'
  mla: Müller, Wolfgang, et al. <i>Generation of Executable Testbenches from Natural
    Language Requirement Specifications for Embedded Real-Time Systems</i>. Edited
    by L. Kleinjohann and B. Kleinjohann, Springer Verlag, 2010, doi:<a href="https://doi.org/10.1007/978-3-642-15234-4_9">10.1007/978-3-642-15234-4_9</a>.
  short: 'W. Müller, A. Bol, A. Krupp, O. Lundkvist, in: L. Kleinjohann, B. Kleinjohann
    (Eds.), Springer Verlag, Dordrecht, 2010.'
conference:
  name: IFIP Working Conference on Distributed and Parallel Embedded Systems (DIPES
    2010)
date_created: 2023-01-17T11:05:55Z
date_updated: 2025-03-12T16:39:13Z
doi: 10.1007/978-3-642-15234-4_9
editor:
- first_name: L.
  full_name: Kleinjohann, L.
  last_name: Kleinjohann
- first_name: B.
  full_name: Kleinjohann, B.
  last_name: Kleinjohann
keyword:
- Natural Language     UML     SystemVerilog     Testbenches
language:
- iso: eng
place: Dordrecht
publication_identifier:
  isbn:
  - 978-3-642-15233-7
publisher: Springer Verlag
status: public
title: Generation of Executable Testbenches from Natural Language Requirement Specifications
  for Embedded Real-Time Systems
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '34563'
abstract:
- lang: eng
  text: UML has been widely accepted by the software community for several years.
    As electronic systems design can no longer be seen as an isolated hardware design
    activity, UML becomes of significant interest as a unification language for systems
    description combining both HW and SW components. This article provides a comprehensive
    view of the UML applied to System-on-Chip (SoC) and hardware-related embedded
    systems design. The modeling concepts in the UML language are first introduced,
    including major diagrams for the representation of the behavior and the structure
    of systems. The principles behind application specific UML customizations (UML
    profiles) are summarized, and several examples relevant for SoC design are given,
    such as the SysML (System Modeling Language) and the SoC Profile. Thereafter,
    various approaches associating UML with existing HW/SW design languages are presented.
    Beyond language aspects, the article addresses the question of UML-based design
    flows, and shows how UML can be applied concretely to the development of electronic-based
    systems. The current situation about tool support constitutes the last focus of
    the article. In particular, we show how UML tools can be combined with well-known
    simulation environments, such as MATLAB.
author:
- first_name: Yves
  full_name: Vanderperren, Yves
  last_name: Vanderperren
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Wim
  full_name: Dahaene, Wim
  last_name: Dahaene
citation:
  ama: Vanderperren Y, Müller W, Dahaene W. UML for Electronic Systems Design – A
    Comprehensive Overview. <i>Design Automation for Embedded Systems</i>. 2008;12:261-292.
    doi:<a href="https://doi.org/10.1007/s10617-008-9028-9">10.1007/s10617-008-9028-9</a>
  apa: Vanderperren, Y., Müller, W., &#38; Dahaene, W. (2008). UML for Electronic
    Systems Design – A Comprehensive Overview. <i>Design Automation for Embedded Systems</i>,
    <i>12</i>, 261–292. <a href="https://doi.org/10.1007/s10617-008-9028-9">https://doi.org/10.1007/s10617-008-9028-9</a>
  bibtex: '@article{Vanderperren_Müller_Dahaene_2008, title={UML for Electronic Systems
    Design – A Comprehensive Overview}, volume={12}, DOI={<a href="https://doi.org/10.1007/s10617-008-9028-9">10.1007/s10617-008-9028-9</a>},
    journal={Design Automation for Embedded Systems}, publisher={Springer-Verlag},
    author={Vanderperren, Yves and Müller, Wolfgang and Dahaene, Wim}, year={2008},
    pages={261–292} }'
  chicago: 'Vanderperren, Yves, Wolfgang Müller, and Wim Dahaene. “UML for Electronic
    Systems Design – A Comprehensive Overview.” <i>Design Automation for Embedded
    Systems</i> 12 (2008): 261–92. <a href="https://doi.org/10.1007/s10617-008-9028-9">https://doi.org/10.1007/s10617-008-9028-9</a>.'
  ieee: 'Y. Vanderperren, W. Müller, and W. Dahaene, “UML for Electronic Systems Design
    – A Comprehensive Overview,” <i>Design Automation for Embedded Systems</i>, vol.
    12, pp. 261–292, 2008, doi: <a href="https://doi.org/10.1007/s10617-008-9028-9">10.1007/s10617-008-9028-9</a>.'
  mla: Vanderperren, Yves, et al. “UML for Electronic Systems Design – A Comprehensive
    Overview.” <i>Design Automation for Embedded Systems</i>, vol. 12, Springer-Verlag,
    2008, pp. 261–92, doi:<a href="https://doi.org/10.1007/s10617-008-9028-9">10.1007/s10617-008-9028-9</a>.
  short: Y. Vanderperren, W. Müller, W. Dahaene, Design Automation for Embedded Systems
    12 (2008) 261–292.
date_created: 2022-12-19T12:18:21Z
date_updated: 2022-12-19T12:23:56Z
department:
- _id: '672'
doi: 10.1007/s10617-008-9028-9
intvolume: '        12'
keyword:
- UML     SysML     Model-based design     System specification     Modelling languages
language:
- iso: eng
page: 261-292
publication: Design Automation for Embedded Systems
publisher: Springer-Verlag
status: public
title: UML for Electronic Systems Design – A Comprehensive Overview
type: journal_article
user_id: '5786'
volume: 12
year: '2008'
...
---
_id: '39030'
abstract:
- lang: eng
  text: "StateCharts are well accepted for embedded systems\r\nspecification for various
    applications. However, for the\r\nspecification of complex systems they have several\r\nlimitations.
    In this article, we present a novel approach to\r\nefficiently execute an UML
    2.0 subset for embedded real-\r\ntime systems implementation with focus on hardware\r\ninterrupts,
    software exceptions, and timeouts. We\r\nintroduce a UML Virtual Machine, which
    directly\r\nexecutes sequence diagrams, which are embedded into\r\nhierarchically
    structured state transition diagrams.\r\nWhereas state diagrams are directly executed
    as\r\nEmbedded State Machines (ESMs), sequence diagrams\r\nare translated into
    UVM Bytecode. The final UVM\r\nexecution is performed by the interaction of the
    ESM and\r\nthe Bytecode Interpreter. Due to our completely model-\r\nbased approach,
    the UVM runtime kernel is easily\r\nadaptable and scalable to different scheduling
    and\r\nmemory management strategies."
author:
- first_name: Tim
  full_name: Schattkowsky, Tim
  last_name: Schattkowsky
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Schattkowsky T, Müller W. A UML Virtual Machine for Embedded Systems. In:
    <i>Proceedings of ISNG 05</i>. ; 2005.'
  apa: Schattkowsky, T., &#38; Müller, W. (2005). A UML Virtual Machine for Embedded
    Systems. <i>Proceedings of ISNG 05</i>.
  bibtex: '@inproceedings{Schattkowsky_Müller_2005, place={Las Vegas, NV}, title={A
    UML Virtual Machine for Embedded Systems}, booktitle={Proceedings of ISNG 05},
    author={Schattkowsky, Tim and Müller, Wolfgang}, year={2005} }'
  chicago: Schattkowsky, Tim, and Wolfgang Müller. “A UML Virtual Machine for Embedded
    Systems.” In <i>Proceedings of ISNG 05</i>. Las Vegas, NV, 2005.
  ieee: T. Schattkowsky and W. Müller, “A UML Virtual Machine for Embedded Systems,”
    2005.
  mla: Schattkowsky, Tim, and Wolfgang Müller. “A UML Virtual Machine for Embedded
    Systems.” <i>Proceedings of ISNG 05</i>, 2005.
  short: 'T. Schattkowsky, W. Müller, in: Proceedings of ISNG 05, Las Vegas, NV, 2005.'
date_created: 2023-01-24T08:12:20Z
date_updated: 2023-01-24T08:12:26Z
department:
- _id: '672'
keyword:
- UML
- Executable Models
- Hardware/Software Co-design
- Virtual Machine
- Embedded Systems
language:
- iso: eng
place: Las Vegas, NV
publication: Proceedings of ISNG 05
status: public
title: A UML Virtual Machine for Embedded Systems
type: conference
user_id: '5786'
year: '2005'
...
---
_id: '34565'
abstract:
- lang: eng
  text: "The textual Object Constraint Language (OCL) is primarily intended to specify
    restrictions over UML class diagrams, in particular class invariants, operation
    pre-, and postconditions. Based on several improvements in the definition of the
    language concepts in last years, a proposal for a new version of OCL has recently
    been published [43]. That document provides an extensive OCL semantic description
    that constitutes a tight integration into UML. However, OCL still lacks a semantic
    integration of UML Statecharts, although it can already be used to refer to states
    in OCL expressions.\r\n\r\nThis article presents an approach that closes this
    gap and introduces a formal semantics for such integration through a mathematical
    model. It also presents the definition of a temporal OCL extension by means of
    a UML Profile based on the metamodel of the latest OCL proposal. Our OCL extension
    enables modelers to specify behavioral state-oriented real-time constraints. It
    provides an intuitive understanding and readability at application level since
    common OCL syntax and concepts are preserved. A well-defined formal semantics
    is given through the mapping of temporal OCL expressions to temporal logics formulae. "
author:
- first_name: Stephan
  full_name: Flake, Stephan
  last_name: Flake
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: Flake S, Müller W. Formal Semantics of Static and Temporal State-Oriented OCL
    Constraints. <i>Journal on Software and System Modeling (SoSyM)</i>. 2003;2(3):164-186.
    doi:<a href="https://doi.org/10.1007/s10270-003-0026-x">10.1007/s10270-003-0026-x</a>
  apa: Flake, S., &#38; Müller, W. (2003). Formal Semantics of Static and Temporal
    State-Oriented OCL Constraints. <i>Journal on Software and System Modeling (SoSyM)</i>,
    <i>2</i>(3), 164–186. <a href="https://doi.org/10.1007/s10270-003-0026-x">https://doi.org/10.1007/s10270-003-0026-x</a>
  bibtex: '@article{Flake_Müller_2003, title={Formal Semantics of Static and Temporal
    State-Oriented OCL Constraints}, volume={2}, DOI={<a href="https://doi.org/10.1007/s10270-003-0026-x">10.1007/s10270-003-0026-x</a>},
    number={3}, journal={Journal on Software and System Modeling (SoSyM)}, publisher={Springer-Verlag},
    author={Flake, Stephan and Müller, Wolfgang}, year={2003}, pages={164–186} }'
  chicago: 'Flake, Stephan, and Wolfgang Müller. “Formal Semantics of Static and Temporal
    State-Oriented OCL Constraints.” <i>Journal on Software and System Modeling (SoSyM)</i>
    2, no. 3 (2003): 164–86. <a href="https://doi.org/10.1007/s10270-003-0026-x">https://doi.org/10.1007/s10270-003-0026-x</a>.'
  ieee: 'S. Flake and W. Müller, “Formal Semantics of Static and Temporal State-Oriented
    OCL Constraints,” <i>Journal on Software and System Modeling (SoSyM)</i>, vol.
    2, no. 3, pp. 164–186, 2003, doi: <a href="https://doi.org/10.1007/s10270-003-0026-x">10.1007/s10270-003-0026-x</a>.'
  mla: Flake, Stephan, and Wolfgang Müller. “Formal Semantics of Static and Temporal
    State-Oriented OCL Constraints.” <i>Journal on Software and System Modeling (SoSyM)</i>,
    vol. 2, no. 3, Springer-Verlag, 2003, pp. 164–86, doi:<a href="https://doi.org/10.1007/s10270-003-0026-x">10.1007/s10270-003-0026-x</a>.
  short: S. Flake, W. Müller, Journal on Software and System Modeling (SoSyM) 2 (2003)
    164–186.
date_created: 2022-12-19T12:26:46Z
date_updated: 2022-12-19T12:27:00Z
department:
- _id: '672'
doi: 10.1007/s10270-003-0026-x
intvolume: '         2'
issue: '3'
keyword:
- Object Constraint Language     UML Statecharts     UML Profile     Real-time constraints     Temporal
  logics
language:
- iso: eng
page: 164-186
publication: Journal on Software and System Modeling (SoSyM)
publisher: Springer-Verlag
status: public
title: Formal Semantics of Static and Temporal State-Oriented OCL Constraints
type: journal_article
user_id: '5786'
volume: 2
year: '2003'
...
---
_id: '39364'
abstract:
- lang: eng
  text: "The textual Object Constraint Language (OCL) is an of-\r\nficial part of
    the Unified Modeling Language (UML). OCL\r\nis primarily used to formulate restrictions
    over UML mod-\r\nels, in particular, invariants and operation pre- and post-\r\nconditions
    in the context of class diagrams. However, OCL\r\nis missing means to specify
    constraints over the dynamic\r\nbehavior of a UML model. We have therefore developed
    a\r\ntemporal extension of OCL that enables modelers to specify\r\nbehavioral
    state-oriented constraints. That work provides\r\nan alternative to the rather
    cryptic temporal logic formulae\r\nthat are commonly used to specify behavioral
    system prop-\r\nerties.\r\nThis article now illustrates that our OCL extension
    al-\r\nlows for specifying all kinds of properties that are regarded\r\nas relevant
    in practice. We present according temporal OCL\r\nexpressions for property specification
    patterns that have\r\nbeen identified in the area of formal specification."
author:
- first_name: Stephan
  full_name: Flake, Stephan
  last_name: Flake
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
citation:
  ama: 'Flake S, Müller W. Expressing Property Specification Patterns with OCL. In:
    <i>Proceedings of SERP’03</i>. ; 2003.'
  apa: Flake, S., &#38; Müller, W. (2003). Expressing Property Specification Patterns
    with OCL. <i>Proceedings of SERP’03</i>.
  bibtex: '@inproceedings{Flake_Müller_2003, place={Las Vegas, NV}, title={Expressing
    Property Specification Patterns with OCL}, booktitle={Proceedings of SERP’03},
    author={Flake, Stephan and Müller, Wolfgang}, year={2003} }'
  chicago: Flake, Stephan, and Wolfgang Müller. “Expressing Property Specification
    Patterns with OCL.” In <i>Proceedings of SERP’03</i>. Las Vegas, NV, 2003.
  ieee: S. Flake and W. Müller, “Expressing Property Specification Patterns with OCL,”
    2003.
  mla: Flake, Stephan, and Wolfgang Müller. “Expressing Property Specification Patterns
    with OCL.” <i>Proceedings of SERP’03</i>, 2003.
  short: 'S. Flake, W. Müller, in: Proceedings of SERP’03, Las Vegas, NV, 2003.'
date_created: 2023-01-24T09:45:49Z
date_updated: 2023-01-24T09:45:54Z
department:
- _id: '672'
keyword:
- UML
- Object Constraint Language
- Patterns
- Property Specification
language:
- iso: eng
place: Las Vegas, NV
publication: Proceedings of SERP'03
status: public
title: Expressing Property Specification Patterns with OCL
type: conference
user_id: '5786'
year: '2003'
...