---
_id: '97'
abstract:
- lang: eng
text: Bridging the gap between informal, imprecise, and vague user requirements
descriptions and precise formalized specifications is the main task of requirements
engineering. Techniques such as interviews or story telling are used when requirements
engineers try to identify a user's needs. The requirements specification process
is typically done in a dialogue between users, domain experts, and requirements
engineers. In our research, we aim at automating the specification of requirements.
The idea is to distinguish between untrained users and trained users, and to exploit
domain knowledge learned from previous runs of our system. We let untrained users
provide unstructured natural language descriptions, while we allow trained users
to provide examples of behavioral descriptions. In both cases, our goal is to
synthesize formal requirements models similar to statecharts. From requirements
specification processes with trained users, behavioral ontologies are learned
which are later used to support the requirements specification process for untrained
users. Our research method is original in combining natural language processing
and search-based techniques for the synthesis of requirements specifications.
Our work is embedded in a larger project that aims at automating the whole software
development and deployment process in envisioned future software service markets.
author:
- first_name: Lorijn
full_name: van Rooijen, Lorijn
id: '58843'
last_name: van Rooijen
- first_name: Frederik Simon
full_name: Bäumer, Frederik Simon
id: '38837'
last_name: Bäumer
- first_name: Marie Christin
full_name: Platenius, Marie Christin
last_name: Platenius
- first_name: Michaela
full_name: Geierhos, Michaela
id: '42496'
last_name: Geierhos
orcid: 0000-0002-8180-5606
- first_name: Heiko
full_name: Hamann, Heiko
last_name: Hamann
- first_name: Gregor
full_name: Engels, Gregor
id: '107'
last_name: Engels
citation:
ama: 'van Rooijen L, Bäumer FS, Platenius MC, Geierhos M, Hamann H, Engels G. From
User Demand to Software Service: Using Machine Learning to Automate the Requirements
Specification Process. In: 2017 IEEE 25th International Requirements Engineering
Conference Workshops (REW). Piscataway, NJ, USA: IEEE; 2017:379-385. doi:10.1109/REW.2017.26'
apa: 'van Rooijen, L., Bäumer, F. S., Platenius, M. C., Geierhos, M., Hamann, H.,
& Engels, G. (2017). From User Demand to Software Service: Using Machine Learning
to Automate the Requirements Specification Process. In 2017 IEEE 25th International
Requirements Engineering Conference Workshops (REW) (pp. 379–385). Piscataway,
NJ, USA: IEEE. https://doi.org/10.1109/REW.2017.26'
bibtex: '@inproceedings{van Rooijen_Bäumer_Platenius_Geierhos_Hamann_Engels_2017,
place={Piscataway, NJ, USA}, title={From User Demand to Software Service: Using
Machine Learning to Automate the Requirements Specification Process}, DOI={10.1109/REW.2017.26}, booktitle={2017
IEEE 25th International Requirements Engineering Conference Workshops (REW)},
publisher={IEEE}, author={van Rooijen, Lorijn and Bäumer, Frederik Simon and Platenius,
Marie Christin and Geierhos, Michaela and Hamann, Heiko and Engels, Gregor}, year={2017},
pages={379–385} }'
chicago: 'Rooijen, Lorijn van, Frederik Simon Bäumer, Marie Christin Platenius,
Michaela Geierhos, Heiko Hamann, and Gregor Engels. “From User Demand to Software
Service: Using Machine Learning to Automate the Requirements Specification Process.”
In 2017 IEEE 25th International Requirements Engineering Conference Workshops
(REW), 379–85. Piscataway, NJ, USA: IEEE, 2017. https://doi.org/10.1109/REW.2017.26.'
ieee: 'L. van Rooijen, F. S. Bäumer, M. C. Platenius, M. Geierhos, H. Hamann, and
G. Engels, “From User Demand to Software Service: Using Machine Learning to Automate
the Requirements Specification Process,” in 2017 IEEE 25th International Requirements
Engineering Conference Workshops (REW), Lisbon, Portugal, 2017, pp. 379–385.'
mla: 'van Rooijen, Lorijn, et al. “From User Demand to Software Service: Using Machine
Learning to Automate the Requirements Specification Process.” 2017 IEEE 25th
International Requirements Engineering Conference Workshops (REW), IEEE, 2017,
pp. 379–85, doi:10.1109/REW.2017.26.'
short: 'L. van Rooijen, F.S. Bäumer, M.C. Platenius, M. Geierhos, H. Hamann, G.
Engels, in: 2017 IEEE 25th International Requirements Engineering Conference Workshops
(REW), IEEE, Piscataway, NJ, USA, 2017, pp. 379–385.'
conference:
end_date: 2017-09-08
location: Lisbon, Portugal
name: 2017 IEEE 25th International Requirements Engineering Conference Workshops
(REW)
start_date: 2017-09-04
date_created: 2017-10-17T12:41:10Z
date_updated: 2022-01-06T07:04:18Z
ddc:
- '000'
department:
- _id: '36'
- _id: '1'
- _id: '579'
- _id: '34'
- _id: '7'
- _id: '66'
- _id: '238'
- _id: '63'
doi: 10.1109/REW.2017.26
file:
- access_level: closed
content_type: application/pdf
creator: ups
date_created: 2018-11-02T14:50:35Z
date_updated: 2018-11-02T14:50:35Z
file_id: '5285'
file_name: 08054881.pdf
file_size: 433613
relation: main_file
success: 1
file_date_updated: 2018-11-02T14:50:35Z
has_accepted_license: '1'
keyword:
- Software
- Unified modeling language
- Requirements engineering
- Ontologies
- Search problems
- Natural languages
language:
- iso: eng
page: 379-385
place: Piscataway, NJ, USA
project:
- _id: '1'
name: SFB 901
- _id: '9'
name: SFB 901 - Subprojekt B1
- _id: '3'
name: SFB 901 - Project Area B
publication: 2017 IEEE 25th International Requirements Engineering Conference Workshops
(REW)
publication_identifier:
eisbn:
- '978-1-5386-3488-2 '
isbn:
- 978-1-5386-3489-9
publication_status: published
publisher: IEEE
quality_controlled: '1'
status: public
title: 'From User Demand to Software Service: Using Machine Learning to Automate the
Requirements Specification Process'
type: conference
user_id: '57458'
year: '2017'
...
---
_id: '37007'
abstract:
- lang: eng
text: UML is widely applied for the specification and modeling of software and some
studies have demonstrated that it is applicable for HW/SW codesign. However, in
this area there is still a big gap from UML modeling to SystemC-based verification
and synthesis environments. This paper presents an efficient approach to bridge
this gap in the context of Systems-on-a-Chip (SoC) design. We propose a framework
for the seamless integration of a customized SysML entry with code generation
for HW/SW cosimulation and high-level FPGA synthesis. For this, we extended the
SysML UML profile by SystemC and synthesis capabilities. Two case studies demonstrate
the applicability of our approach.
author:
- first_name: Fabian
full_name: Mischkalla, Fabian
last_name: Mischkalla
- first_name: Da
full_name: He, Da
last_name: He
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and
Simulation of Combined HW/SW Systems. In: Proceedings of DATE’10. IEEE;
2010. doi:10.1109/DATE.2010.5456990'
apa: Mischkalla, F., He, D., & Müller, W. (2010). Closing the Gap between UML-based
Modeling and Simulation of Combined HW/SW Systems. Proceedings of DATE’10.
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE
2010), Dresden. https://doi.org/10.1109/DATE.2010.5456990
bibtex: '@inproceedings{Mischkalla_He_Müller_2010, place={Dresden}, title={Closing
the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems},
DOI={10.1109/DATE.2010.5456990},
booktitle={Proceedings of DATE’10}, publisher={IEEE}, author={Mischkalla, Fabian
and He, Da and Müller, Wolfgang}, year={2010} }'
chicago: 'Mischkalla, Fabian, Da He, and Wolfgang Müller. “Closing the Gap between
UML-Based Modeling and Simulation of Combined HW/SW Systems.” In Proceedings
of DATE’10. Dresden: IEEE, 2010. https://doi.org/10.1109/DATE.2010.5456990.'
ieee: 'F. Mischkalla, D. He, and W. Müller, “Closing the Gap between UML-based Modeling
and Simulation of Combined HW/SW Systems,” presented at the 2010 Design, Automation
& Test in Europe Conference & Exhibition (DATE 2010), Dresden, 2010, doi:
10.1109/DATE.2010.5456990.'
mla: Mischkalla, Fabian, et al. “Closing the Gap between UML-Based Modeling and
Simulation of Combined HW/SW Systems.” Proceedings of DATE’10, IEEE, 2010,
doi:10.1109/DATE.2010.5456990.
short: 'F. Mischkalla, D. He, W. Müller, in: Proceedings of DATE’10, IEEE, Dresden,
2010.'
conference:
location: Dresden
name: 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
date_created: 2023-01-17T09:12:35Z
date_updated: 2023-01-17T09:12:44Z
department:
- _id: '672'
doi: 10.1109/DATE.2010.5456990
keyword:
- Unified modeling language
- Field programmable gate arrays
- Bridges
- Helium
- Real time systems
- Operating systems
- Documentation
- Application software
- XML
- Space exploration
language:
- iso: eng
place: Dresden
publication: Proceedings of DATE’10
publication_identifier:
eisbn:
- 978-3-9810801-6-2
publisher: IEEE
status: public
title: Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW
Systems
type: conference
user_id: '5786'
year: '2010'
...
---
_id: '37067'
abstract:
- lang: eng
text: IP-XACT is a well accepted standard for the exchange of IP components at Electronic
System and Register Transfer Level. Still, the creation and manipulation of these
descriptions at the XML level can be time-consuming and error-prone. In this paper,
we show that the UML can be consistently applied as an efficient and comprehensible
frontend for IP-XACT-based IP description and integration. For this, we present
an IP-XACT UML profile that enables UML-based descriptions covering the same information
as a corresponding IP-XACT description. This enables the automated generation
of IP-XACT component and design descriptions from respective UML models. In particular,
it also allows the integration of existing IPs with UML. To illustrate our approach,
we present an application example based on the IBM PowerPC Evaluation Kit.
author:
- first_name: Tim
full_name: Schattkowsky, Tim
last_name: Schattkowsky
- first_name: Tao
full_name: Xie, Tao
last_name: Xie
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Schattkowsky T, Xie T, Müller W. A UML Frontend for IP-XACT-based IP Management.
In: Proceedings of DATE’09. IEEE; 2009. doi:10.1109/DATE.2009.5090664'
apa: Schattkowsky, T., Xie, T., & Müller, W. (2009). A UML Frontend for IP-XACT-based
IP Management. Proceedings of DATE’09. Design, Automation & Test in
Europe Conference & Exhibition. https://doi.org/10.1109/DATE.2009.5090664
bibtex: '@inproceedings{Schattkowsky_Xie_Müller_2009, place={Nice, France}, title={A
UML Frontend for IP-XACT-based IP Management}, DOI={10.1109/DATE.2009.5090664},
booktitle={Proceedings of DATE’09}, publisher={IEEE}, author={Schattkowsky, Tim
and Xie, Tao and Müller, Wolfgang}, year={2009} }'
chicago: 'Schattkowsky, Tim, Tao Xie, and Wolfgang Müller. “A UML Frontend for IP-XACT-Based
IP Management.” In Proceedings of DATE’09. Nice, France: IEEE, 2009. https://doi.org/10.1109/DATE.2009.5090664.'
ieee: 'T. Schattkowsky, T. Xie, and W. Müller, “A UML Frontend for IP-XACT-based
IP Management,” presented at the Design, Automation & Test in Europe Conference
& Exhibition, 2009, doi: 10.1109/DATE.2009.5090664.'
mla: Schattkowsky, Tim, et al. “A UML Frontend for IP-XACT-Based IP Management.”
Proceedings of DATE’09, IEEE, 2009, doi:10.1109/DATE.2009.5090664.
short: 'T. Schattkowsky, T. Xie, W. Müller, in: Proceedings of DATE’09, IEEE, Nice,
France, 2009.'
conference:
name: Design, Automation & Test in Europe Conference & Exhibition
date_created: 2023-01-17T11:54:02Z
date_updated: 2023-01-17T11:54:07Z
department:
- _id: '672'
doi: 10.1109/DATE.2009.5090664
keyword:
- Unified modeling language
- XML
- Power system modeling
- Application software
- Master-slave
- Power system management
- Acceleration
- Scattering
- Software engineering
- Software standards
language:
- iso: eng
place: Nice, France
publication: Proceedings of DATE'09
publication_identifier:
isbn:
- 978-1-4244-3781-8
publisher: IEEE
status: public
title: A UML Frontend for IP-XACT-based IP Management
type: conference
user_id: '5786'
year: '2009'
...
---
_id: '39029'
abstract:
- lang: eng
text: UML 2.0 provides a rich set of diagrams for systems documentation and specification.
Much effort has been undertaken to employ different aspects of UML for multiple
domains, mainly in the area of software systems. Considering the area of electronic
design automation, however, we currently see only very few approaches which investigate
UML for hardware design and hardware/software co-design. We present an approach
for executable UML closing the gap from system specification to its model-based
execution on reconfigurable hardware. For this purpose, we present our abstract
execution platform (AEP), which is based on a virtual machine running an executable
UML subset for embedded software and reconfigurable hardware. This subset combines
UML 2.0 classes, state-machines and sequence diagrams for a complete system specification.
We describe how these binary encoded UML specifications can be directly executed
and give the implementation of such a virtual machine on a Virtex II FPGA. Finally,
we present evaluation results comparing the AEP implementation with C code on
a C167 microcontroller.
author:
- first_name: Tim
full_name: Schattkowsky, Tim
last_name: Schattkowsky
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Achim
full_name: Rettberg, Achim
last_name: Rettberg
citation:
ama: 'Schattkowsky T, Müller W, Rettberg A. A Model-Based Approach for Executable
Specification on Reconfigurable Hardware. In: Proceedings of DATE’05. IEEE;
2005. doi:10.1109/DATE.2005.20'
apa: Schattkowsky, T., Müller, W., & Rettberg, A. (2005). A Model-Based Approach
for Executable Specification on Reconfigurable Hardware. Proceedings of DATE’05.
https://doi.org/10.1109/DATE.2005.20
bibtex: '@inproceedings{Schattkowsky_Müller_Rettberg_2005, place={Munich, Germany
}, title={A Model-Based Approach for Executable Specification on Reconfigurable
Hardware}, DOI={10.1109/DATE.2005.20},
booktitle={Proceedings of DATE’05}, publisher={IEEE}, author={Schattkowsky, Tim
and Müller, Wolfgang and Rettberg, Achim}, year={2005} }'
chicago: 'Schattkowsky, Tim, Wolfgang Müller, and Achim Rettberg. “A Model-Based
Approach for Executable Specification on Reconfigurable Hardware.” In Proceedings
of DATE’05. Munich, Germany : IEEE, 2005. https://doi.org/10.1109/DATE.2005.20.'
ieee: 'T. Schattkowsky, W. Müller, and A. Rettberg, “A Model-Based Approach for
Executable Specification on Reconfigurable Hardware,” 2005, doi: 10.1109/DATE.2005.20.'
mla: Schattkowsky, Tim, et al. “A Model-Based Approach for Executable Specification
on Reconfigurable Hardware.” Proceedings of DATE’05, IEEE, 2005, doi:10.1109/DATE.2005.20.
short: 'T. Schattkowsky, W. Müller, A. Rettberg, in: Proceedings of DATE’05, IEEE,
Munich, Germany , 2005.'
date_created: 2023-01-24T08:10:40Z
date_updated: 2023-01-24T08:10:44Z
department:
- _id: '672'
doi: 10.1109/DATE.2005.20
keyword:
- Hardware
- Unified modeling language
- Virtual machining
- Object oriented modeling
- Field programmable gate arrays
- Java
- Microcontrollers
- Embedded software
- Real time systems
- Documentation
language:
- iso: eng
place: 'Munich, Germany '
publication: Proceedings of DATE’05
publication_identifier:
isbn:
- 0-7695-2288-2
publisher: IEEE
status: public
title: A Model-Based Approach for Executable Specification on Reconfigurable Hardware
type: conference
user_id: '5786'
year: '2005'
...
---
_id: '39032'
abstract:
- lang: eng
text: Executable UML models are nowadays gaining interest in embedded systems design.
This domain is strongly devoted to the modeling of reactive behavior using StateChart
variants. In this context, the direct execution of UML state machines is an interesting
alternative to native code generation approaches since it significantly increases
portability. However, fully featured UML 2.0 State Machines may contain a broad
set of features with complex execution semantics that differ significantly from
other StateChart variants. This makes their direct execution complex and inefficient.
In this paper, we demonstrate how such state machines can be represented using
a small subset of the UML state machine features that enables efficient execution.
We describe the necessary model transformations in terms of graph transformations
and discuss the underlying semantics and implications for execution.
author:
- first_name: Tim
full_name: Schattkowsky, Tim
last_name: Schattkowsky
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Schattkowsky T, Müller W. Transformation of UML State Machines for Direct
Execution. In: Proceedings of VL/HCC 05. ; 2005. doi:10.1109/VLHCC.2005.64'
apa: Schattkowsky, T., & Müller, W. (2005). Transformation of UML State Machines
for Direct Execution. Proceedings of VL/HCC 05. https://doi.org/10.1109/VLHCC.2005.64
bibtex: '@inproceedings{Schattkowsky_Müller_2005, place={Dallas, TX, USA}, title={Transformation
of UML State Machines for Direct Execution}, DOI={10.1109/VLHCC.2005.64},
booktitle={Proceedings of VL/HCC 05}, author={Schattkowsky, Tim and Müller, Wolfgang},
year={2005} }'
chicago: Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines
for Direct Execution.” In Proceedings of VL/HCC 05. Dallas, TX, USA, 2005.
https://doi.org/10.1109/VLHCC.2005.64.
ieee: 'T. Schattkowsky and W. Müller, “Transformation of UML State Machines for
Direct Execution,” 2005, doi: 10.1109/VLHCC.2005.64.'
mla: Schattkowsky, Tim, and Wolfgang Müller. “Transformation of UML State Machines
for Direct Execution.” Proceedings of VL/HCC 05, 2005, doi:10.1109/VLHCC.2005.64.
short: 'T. Schattkowsky, W. Müller, in: Proceedings of VL/HCC 05, Dallas, TX, USA,
2005.'
date_created: 2023-01-24T08:18:10Z
date_updated: 2023-01-24T08:18:27Z
department:
- _id: '672'
doi: 10.1109/VLHCC.2005.64
keyword:
- Unified modeling language
- Software design
- Virtual machining
- Embedded system
- Programming
- Documentation
- Hardware
- Computer languages
- Operating systems
- Runtime
language:
- iso: eng
place: Dallas, TX, USA
publication: Proceedings of VL/HCC 05
publication_identifier:
isbn:
- 0-7695-2443-5
status: public
title: Transformation of UML State Machines for Direct Execution
type: conference
user_id: '5786'
year: '2005'
...
---
_id: '39061'
abstract:
- lang: eng
text: This article presents an approach, which combines theorem proving-based refinement
with model checking for state based real-time systems. Our verification flow starts
from UML state diagrams, which are translated to the formal B language and are
model checked for real-time properties. By means of the B language and a B theorem
prover, refined state diagrams are verified against their abstract representation.
The approach is presented by means of the refinement of a digital echo cancellation
unit.
author:
- first_name: Alexander
full_name: Krupp, Alexander
last_name: Krupp
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
- first_name: Ian
full_name: Oliver, Ian
last_name: Oliver
citation:
ama: 'Krupp A, Müller W, Oliver I. Formal Refinement and Model Checking of An Echo
Cancellation Unit. In: Proceedings of DATE’04 Designers’ Forum. ; 2004.
doi:10.1109/DATE.2004.1269214'
apa: Krupp, A., Müller, W., & Oliver, I. (2004). Formal Refinement and Model
Checking of An Echo Cancellation Unit. Proceedings of DATE’04 Designers’ Forum.
Proceedings Design, Automation and Test in Europe Conference and Exhibition. https://doi.org/10.1109/DATE.2004.1269214
bibtex: '@inproceedings{Krupp_Müller_Oliver_2004, place={Paris}, title={Formal Refinement
and Model Checking of An Echo Cancellation Unit}, DOI={10.1109/DATE.2004.1269214},
booktitle={Proceedings of DATE’04 Designers’ Forum}, author={Krupp, Alexander
and Müller, Wolfgang and Oliver, Ian}, year={2004} }'
chicago: Krupp, Alexander, Wolfgang Müller, and Ian Oliver. “Formal Refinement and
Model Checking of An Echo Cancellation Unit.” In Proceedings of DATE’04 Designers’
Forum. Paris, 2004. https://doi.org/10.1109/DATE.2004.1269214.
ieee: 'A. Krupp, W. Müller, and I. Oliver, “Formal Refinement and Model Checking
of An Echo Cancellation Unit,” presented at the Proceedings Design, Automation
and Test in Europe Conference and Exhibition, 2004, doi: 10.1109/DATE.2004.1269214.'
mla: Krupp, Alexander, et al. “Formal Refinement and Model Checking of An Echo Cancellation
Unit.” Proceedings of DATE’04 Designers’ Forum, 2004, doi:10.1109/DATE.2004.1269214.
short: 'A. Krupp, W. Müller, I. Oliver, in: Proceedings of DATE’04 Designers’ Forum,
Paris, 2004.'
conference:
name: Proceedings Design, Automation and Test in Europe Conference and Exhibition
date_created: 2023-01-24T08:53:26Z
date_updated: 2023-01-24T08:53:31Z
department:
- _id: '672'
doi: 10.1109/DATE.2004.1269214
keyword:
- Echo cancellers
- Logic
- Unified modeling language
- Automata
- Data structures
- Boolean functions
- Electronic design automation and methodology
- Prototypes
- Specification languages
- Constraint theory
language:
- iso: eng
place: Paris
publication: Proceedings of DATE’04 Designers' Forum
publication_identifier:
isbn:
- 0-7695-2085-5
status: public
title: Formal Refinement and Model Checking of An Echo Cancellation Unit
type: conference
user_id: '5786'
year: '2004'
...
---
_id: '39069'
abstract:
- lang: eng
text: We present the syntax and semantics of a past- and future-oriented temporal
extension of the Object Constraint Language (OCL). Our extension supports designers
to express time-bounded properties over a state-oriented UML model of a system
under development. The semantics is formally defined over the system states of
a mathematical object model. Additionally, we present a mapping to Clocked Linear
Temporal Logic (Clocked LTL) formulae, which is the basis for further application
in verification with model checking. We demonstrate the applicability of the approach
by the example of a buffer specification in the context of a production system.
author:
- first_name: Stephan
full_name: Flake, Stephan
last_name: Flake
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Flake S, Müller W. Past- and Future-Oriented Time-Bound Temporal Properties
with OCL. In: Proceedings of SEFM´04. IEEE; 2004. doi:10.1109/SEFM.2004.1347516'
apa: Flake, S., & Müller, W. (2004). Past- and Future-Oriented Time-Bound Temporal
Properties with OCL. Proceedings of SEFM´04. Proceedings of the Second
International Conference on Software Engineering and Formal Methods. https://doi.org/10.1109/SEFM.2004.1347516
bibtex: '@inproceedings{Flake_Müller_2004, place={Beijing, China}, title={Past-
and Future-Oriented Time-Bound Temporal Properties with OCL}, DOI={10.1109/SEFM.2004.1347516},
booktitle={Proceedings of SEFM´04}, publisher={IEEE}, author={Flake, Stephan and
Müller, Wolfgang}, year={2004} }'
chicago: 'Flake, Stephan, and Wolfgang Müller. “Past- and Future-Oriented Time-Bound
Temporal Properties with OCL.” In Proceedings of SEFM´04. Beijing, China:
IEEE, 2004. https://doi.org/10.1109/SEFM.2004.1347516.'
ieee: 'S. Flake and W. Müller, “Past- and Future-Oriented Time-Bound Temporal Properties
with OCL,” presented at the Proceedings of the Second International Conference
on Software Engineering and Formal Methods, 2004, doi: 10.1109/SEFM.2004.1347516.'
mla: Flake, Stephan, and Wolfgang Müller. “Past- and Future-Oriented Time-Bound
Temporal Properties with OCL.” Proceedings of SEFM´04, IEEE, 2004, doi:10.1109/SEFM.2004.1347516.
short: 'S. Flake, W. Müller, in: Proceedings of SEFM´04, IEEE, Beijing, China, 2004.'
conference:
name: ' Proceedings of the Second International Conference on Software Engineering
and Formal Methods'
date_created: 2023-01-24T09:03:36Z
date_updated: 2023-01-24T09:03:41Z
department:
- _id: '672'
doi: 10.1109/SEFM.2004.1347516
keyword:
- Unified modeling language
- Logic
- Clocks
- Boolean functions
- Application software
- Time factors
- Real time systems
- Formal verification
- Buffer storage
- Software packages
language:
- iso: eng
place: Beijing, China
publication: Proceedings of SEFM´04
publication_identifier:
isbn:
- 0-7695-2222-X
publisher: IEEE
status: public
title: Past- and Future-Oriented Time-Bound Temporal Properties with OCL
type: conference
user_id: '5786'
year: '2004'
...
---
_id: '39403'
abstract:
- lang: eng
text: The Unified Modeling Language (UML) has received wide acceptance as a standard
language in the field of software specification by means of different diagram
types. In a recent version of UML, the textual Object Constraint Language (OCL)
was introduced to support specification of constraints for UML models. But OCL
currently does not provide sufficient means to specify constraints over the dynamic
behavior of a model. This article presents an OCL extension that is consistent
with current OCL and enables modelers to specify state-related time-bounded constraints.
We consider the case study of a flexible manufacturing system and identify typical
real-time constraints. The constraints are presented in our temporal OCL extension
as well as in temporal logic formulae. For general application, we define a semantics
of our OCL extension by means of a time-bounded temporal logic based on Computational
Tree Logic (CTL).
author:
- first_name: Stephan
full_name: Flake, Stephan
last_name: Flake
- first_name: Wolfgang
full_name: Müller, Wolfgang
id: '16243'
last_name: Müller
citation:
ama: 'Flake S, Müller W. Specification of Real-Time Properties for UML Models. In:
Proceedings of HICSS-35. ; 2002. doi:10.1109/HICSS.2002.994469'
apa: Flake, S., & Müller, W. (2002). Specification of Real-Time Properties for
UML Models. Proceedings of HICSS-35. Proceedings of the 35th Annual Hawaii
International Conference on System Sciences, Big Island, HI, USA . https://doi.org/10.1109/HICSS.2002.994469
bibtex: '@inproceedings{Flake_Müller_2002, place={Big Island, HI, USA }, title={Specification
of Real-Time Properties for UML Models}, DOI={10.1109/HICSS.2002.994469},
booktitle={Proceedings of HICSS-35}, author={Flake, Stephan and Müller, Wolfgang},
year={2002} }'
chicago: Flake, Stephan, and Wolfgang Müller. “Specification of Real-Time Properties
for UML Models.” In Proceedings of HICSS-35. Big Island, HI, USA , 2002.
https://doi.org/10.1109/HICSS.2002.994469.
ieee: 'S. Flake and W. Müller, “Specification of Real-Time Properties for UML Models,”
presented at the Proceedings of the 35th Annual Hawaii International Conference
on System Sciences, Big Island, HI, USA , 2002, doi: 10.1109/HICSS.2002.994469.'
mla: Flake, Stephan, and Wolfgang Müller. “Specification of Real-Time Properties
for UML Models.” Proceedings of HICSS-35, 2002, doi:10.1109/HICSS.2002.994469.
short: 'S. Flake, W. Müller, in: Proceedings of HICSS-35, Big Island, HI, USA ,
2002.'
conference:
location: 'Big Island, HI, USA '
name: Proceedings of the 35th Annual Hawaii International Conference on System Sciences
date_created: 2023-01-24T10:22:12Z
date_updated: 2023-01-24T10:22:16Z
department:
- _id: '672'
doi: 10.1109/HICSS.2002.994469
keyword:
- Unified modeling language
- Logic
- Formal verification
- Real time systems
- Programming profession
- Vehicle dynamics
- Software standards
- Flexible manufacturing systems
- Electronics industry
- Protocols
language:
- iso: eng
place: 'Big Island, HI, USA '
publication: Proceedings of HICSS-35
publication_identifier:
isbn:
- 0-7695-1435-9
status: public
title: Specification of Real-Time Properties for UML Models
type: conference
user_id: '5786'
year: '2002'
...