A Model-Based Approach for Executable Specification on Reconfigurable Hardware - Schattkowsky, Tim; Müller, Wolfgang; Rettberg, Achim (Proceedings of DATE’05)
UML 2.0 provides a rich set of diagrams for systems documentation and specification. Much effort has been undertaken to employ different aspects of UML for multiple domains, mainly in the area of software systems. Considering the area of electronic design automation, however, we currently see only very few approaches which investigate UML for hardware design and hardware/software co-design. We present an approach for executable UML closing the gap from system specification to its model-based execution on reconfigurable hardware. For this purpose, we present our abstract execution platform (AEP), which is based on a virtual machine running an executable UML subset for embedded software and reconfigurable hardware. This subset combines UML 2.0 classes, state-machines and sequence diagrams for a complete system specification. We describe how these binary encoded UML specifications can be directly executed and give the implementation of such a virtual machine on a Virtex II FPGA. Finally, we present evaluation results comparing the AEP implementation with C code on a C167 microcontroller.
Keywords: Hardware; Unified modeling language; Virtual machining; Object oriented modeling; Field programmable gate arrays; Java; Microcontrollers; Embedded software; Real time systems; Documentation

Transformation of UML State Machines for Direct Execution - Schattkowsky, Tim; Müller, Wolfgang (Proceedings of VL/HCC 05)
Executable UML models are nowadays gaining interest in embedded systems design. This domain is strongly devoted to the modeling of reactive behavior using StateChart variants. In this context, the direct execution of UML state machines is an interesting alternative to native code generation approaches since it significantly increases portability. However, fully featured UML 2.0 State Machines may contain a broad set of features with complex execution semantics that differ significantly from other StateChart variants. This makes their direct execution complex and inefficient. In this paper, we demonstrate how such state machines can be represented using a small subset of the UML state machine features that enables efficient execution. We describe the necessary model transformations in terms of graph transformations and discuss the underlying semantics and implications for execution.
Keywords: Unified modeling language; Software design; Virtual machining; Embedded system; Programming; Documentation; Hardware; Computer languages; Operating systems; Runtime