@inproceedings{10673,
  author       = {{Ho, Nam and Ahmed, Abdullah Fathi and Kaufmann, Paul and Platzner, Marco}},
  booktitle    = {{Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS)}},
  keywords     = {{cache storage, field programmable gate arrays, multiprocessing systems, parallel architectures, reconfigurable architectures, FPGA, dynamic reconfiguration, evolvable cache mapping, many-core architecture, memory-to-cache address mapping function, microarchitectural optimization, multicore architecture, nature-inspired optimization, parallelization degrees, processor, reconfigurable cache mapping, reconfigurable computing, Field programmable gate arrays, Software, Tuning}},
  pages        = {{1--7}},
  title        = {{{Microarchitectural optimization by means of reconfigurable and evolvable cache mappings}}},
  doi          = {{10.1109/AHS.2015.7231178}},
  year         = {{2015}},
}

