Server-based execution of periodic tasks on dynamically reconfigurable hardware - Danne, Klaus; Mühlenbernd, Roland; Platzner, Marco (IET Computers Digital Techniques)
Keywords: reconfigurable architectures; resource allocation; device reconfiguration time; dynamic hardware reconfiguration; dynamically reconfigurable hardware; light-weight runtime system; merge server distribute load; periodic real-time tasks; runtime system overheads; schedulability analysis; scheduling technique; server-based execution; synthesis tool flow

Complete Visual Specification and Animations of Protocols - Müller, Wolfgang; Lehrenfeld, Georg; Tahedl, C. (Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair)
This article discusses the application of Pictorial Janus (PJ) for the rapid development and analysis of protocols by animation and complete visualization. In order to make PJ applicable in the context of hardware description we first extend PJ by timing facilities (Timed PJ) and introduce an approach for integrating VHDL models into this visual framework preserving the simulation semantics of VHDL. We finally give the example of the specification and animation of a non interlocked protocol.
Keywords: Animation; Protocols; Timing; Computer languages; Electronic mail; Context modeling; Visualization; Control systems; Flow graphs; Trademarks