TY - JOUR AU - Ahmed, Qazi Arbab AU - Wiersema, Tobias AU - Platzner, Marco ID - 52686 JF - Journal of Hardware and Systems Security KW - General Engineering KW - Energy Engineering and Power Technology SN - 2509-3428 TI - Post-configuration Activation of Hardware Trojans in FPGAs ER - TY - GEN AU - Lienen, Christian AU - Middeke, Sorel Horst AU - Platzner, Marco ID - 43048 TI - fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications ER - TY - CONF AU - Ahmed, Qazi Arbab AU - Awais, Muhammad AU - Platzner, Marco ID - 44194 T2 - The 24th International Symposium on Quality Electronic Design (ISQED'23), San Francisco, Califorina USA TI - MAAS: Hiding Trojans in Approximate Circuits ER - TY - CHAP AU - Boschmann, Alexander AU - Clausing, Lennart AU - Jentzsch, Felix AU - Ghasemzadeh Mohammadi, Hassan AU - Platzner, Marco ED - Haake, Claus-Jochen ED - Meyer auf der Heide, Friedhelm ED - Platzner, Marco ED - Wachsmuth, Henning ED - Wehrheim, Heike ID - 45899 T2 - On-The-Fly Computing -- Individualized IT-services in dynamic markets TI - Flexible Industrial Analytics on Reconfigurable Systems-On-Chip VL - 412 ER - TY - CHAP AU - Wehrheim, Heike AU - Platzner, Marco AU - Bodden, Eric AU - Schubert, Philipp AU - Pauck, Felix AU - Jakobs, Marie-Christine ED - Haake, Claus-Jochen ED - Meyer auf der Heide, Friedhelm ED - Platzner, Marco ED - Wachsmuth, Henning ED - Wehrheim, Heike ID - 45888 T2 - On-The-Fly Computing -- Individualized IT-services in dynamic markets TI - Verifying Software and Reconfigurable Hardware Services VL - 412 ER - TY - CHAP AU - Hansmeier, Tim AU - Kenter, Tobias AU - Meyer, Marius AU - Riebler, Heinrich AU - Platzner, Marco AU - Plessl, Christian ED - Haake, Claus-Jochen ED - Meyer auf der Heide, Friedhelm ED - Platzner, Marco ED - Wachsmuth, Henning ED - Wehrheim, Heike ID - 45893 T2 - On-The-Fly Computing -- Individualized IT-services in dynamic markets TI - Compute Centers I: Heterogeneous Execution Environments VL - 412 ER - TY - GEN AU - Lienen, Christian AU - Nowosad, Alexander Philipp AU - Platzner, Marco ID - 46229 TI - Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms ER - TY - CONF AU - Clausing, Lennart AU - Guetattfi, Zakarya AU - Kaufmann, Paul AU - Lienen, Christian AU - Platzner, Marco ID - 45913 T2 - Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC) TI - On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64 ER - TY - BOOK AB - In the proposal for our CRC in 2011, we formulated a vision of markets for IT services that describes an approach to the provision of such services that was novel at that time and, to a large extent, remains so today: „Our vision of on-the-fly computing is that of IT services individually and automatically configured and brought to execution from flexibly combinable services traded on markets. At the same time, we aim at organizing markets whose participants maintain a lively market of services through appropriate entrepreneurial actions.“ Over the last 12 years, we have developed methods and techniques to address problems critical to the convenient, efficient, and secure use of on-the-fly computing. Among other things, we have made the description of services more convenient by allowing natural language input, increased the quality of configured services through (natural language) interaction and more efficient configuration processes and analysis procedures, made the quality of (the products of) providers in the marketplace transparent through reputation systems, and increased the resource efficiency of execution through reconfigurable heterogeneous computing nodes and an integrated treatment of service description and configuration. We have also developed network infrastructures that have a high degree of adaptivity, scalability, efficiency, and reliability, and provide cryptographic guarantees of anonymity and security for market participants and their products and services. To demonstrate the pervasiveness of the OTF computing approach, we have implemented a proof-of-concept for OTF computing that can run typical scenarios of an OTF market. We illustrated the approach using a cutting-edge application scenario – automated machine learning (AutoML). Finally, we have been pushing our work for the perpetuation of On-The-Fly Computing beyond the SFB and sharing the expertise gained in the SFB in events with industry partners as well as transfer projects. This work required a broad spectrum of expertise. Computer scientists and economists with research interests such as computer networks and distributed algorithms, security and cryptography, software engineering and verification, configuration and machine learning, computer engineering and HPC, microeconomics and game theory, business informatics and management have successfully collaborated here. AU - Haake, Claus-Jochen AU - Meyer auf der Heide, Friedhelm AU - Platzner, Marco AU - Wachsmuth, Henning AU - Wehrheim, Heike ID - 45863 TI - On-The-Fly Computing -- Individualized IT-services in dynamic markets VL - 412 ER - TY - CONF AU - Witschen, Linus Matthias AU - Wiersema, Tobias AU - Reuter, Lucas David AU - Platzner, Marco ID - 29945 T2 - 2022 59th ACM/IEEE Design Automation Conference (DAC) TI - Search Space Characterization for Approximate Logic Synthesis ER - TY - CONF AU - Witschen, Linus Matthias AU - Wiersema, Tobias AU - Artmann, Matthias AU - Platzner, Marco ID - 29865 T2 - Design, Automation and Test in Europe (DATE) TI - MUSCAT: MUS-based Circuit Approximation Technique ER - TY - CONF AU - Hansmeier, Tim AU - Platzner, Marco ID - 30971 SN - 0302-9743 T2 - Applications of Evolutionary Computation, EvoApplications 2022, Proceedings TI - Integrating Safety Guarantees into the Learning Classifier System XCS VL - 13224 ER - TY - CONF AU - Clausing, Lennart AU - Platzner, Marco ID - 32855 T2 - 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) TI - ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support ER - TY - CONF AU - Hansmeier, Tim AU - Brede, Mathis AU - Platzner, Marco ID - 33253 T2 - GECCO '22: Proceedings of the Genetic and Evolutionary Computation Conference Companion TI - XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion ER - TY - GEN AU - Lienen, Christian AU - Platzner, Marco ID - 29541 TI - ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications ER - TY - CONF AU - Lienen, Christian AU - Platzner, Marco ID - 34007 TI - Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS ER - TY - CONF AU - Lienen, Christian AU - Platzner, Marco ID - 34005 T2 - 2022 25th Euromicro Conference on Digital System Design (DSD) TI - Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications ER - TY - CONF AU - Ahmed, Qazi Arbab AU - Platzner, Marco ID - 32342 TI - On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs ER - TY - JOUR AB - Deep neural networks (DNNs) are penetrating into a broad spectrum of applications and replacing manual algorithmic implementations, including the radio frequency communications domain with classical signal processing algorithms. However, the high throughput (gigasamples per second) and low latency requirements of this application domain pose a significant hurdle for adopting computationally demanding DNNs. In this article, we explore highly specialized DNN inference accelerator approaches on field-programmable gate arrays (FPGAs) for RadioML modulation classification. Using an automated end-to-end flow for the generation of the FPGA solution, we can easily explore a spectrum of solutions that optimize for different design targets, including accuracy, power efficiency, resources, throughput, and latency. By leveraging reduced precision arithmetic and customized streaming dataflow, we demonstrate a solution that meets the application requirements and outperforms alternative FPGA efforts by 3.5x in terms of throughput. Against modern embedded graphics processing units (GPUs), we measure >10x higher throughput and >100x lower latency under comparable accuracy and power envelopes. AU - Jentzsch, Felix AU - Umuroglu, Yaman AU - Pappalardo, Alessandro AU - Blott, Michaela AU - Platzner, Marco ID - 33990 IS - 6 JF - IEEE Micro TI - RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures VL - 42 ER - TY - JOUR AB - Robotics applications process large amounts of data in real time and require compute platforms that provide high performance and energy efficiency. FPGAs are well suited for many of these applications, but there is a reluctance in the robotics community to use hardware acceleration due to increased design complexity and a lack of consistent programming models across the software/hardware boundary. In this article, we present ReconROS, a framework that integrates the widely used robot operating system (ROS) with ReconOS, which features multithreaded programming of hardware and software threads for reconfigurable computers. This unique combination gives ROS 2 developers the flexibility to transparently accelerate parts of their robotics applications in hardware. We elaborate on the architecture and the design flow for ReconROS and report on a set of experiments that underline the feasibility and flexibility of our approach. AU - Lienen, Christian AU - Platzner, Marco ID - 29150 JF - ACM Transactions on Reconfigurable Technology and Systems SN - 1936-7406 TI - Design of Distributed Reconfigurable Robotics Systems with ReconROS ER -