@inproceedings{29945, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Reuter, Lucas David and Platzner, Marco}}, booktitle = {{2022 59th ACM/IEEE Design Automation Conference (DAC)}}, location = {{San Francisco, USA}}, title = {{{Search Space Characterization for Approximate Logic Synthesis }}}, year = {{2022}}, } @inproceedings{29865, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Artmann, Matthias and Platzner, Marco}}, booktitle = {{Design, Automation and Test in Europe (DATE)}}, location = {{Online}}, title = {{{MUSCAT: MUS-based Circuit Approximation Technique}}}, year = {{2022}}, } @phdthesis{34041, author = {{Witschen, Linus Matthias}}, title = {{{Frameworks and Methodologies for Search-based Approximate Logic Synthesis}}}, doi = {{10.17619/UNIPB/1-1649}}, year = {{2022}}, } @inproceedings{21953, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Raeisi Nafchi, Masood and Bockhorn, Arne and Platzner, Marco}}, booktitle = {{Proceedings of International Symposium on Applied Reconfigurable Computing (ARC'21)}}, editor = {{Hannig, Frank and Derrien, Steven and Diniz, Pedro and Chillet, Daniel}}, location = {{Virtual conference}}, publisher = {{Springer Lecture Notes in Computer Science}}, title = {{{Timing Optimization for Virtual FPGA Configurations}}}, doi = {{10.1007/978-3-030-79025-7_4}}, year = {{2021}}, } @article{17358, abstract = {{Approximate circuits trade-off computational accuracy against improvements in hardware area, delay, or energy consumption. IP core vendors who wish to create such circuits need to convince consumers of the resulting approximation quality. As a solution we propose proof-carrying approximate circuits: The vendor creates an approximate IP core together with a certificate that proves the approximation quality. The proof certificate is bundled with the approximate IP core and sent off to the consumer. The consumer can formally verify the approximation quality of the IP core at a fraction of the typical computational cost for formal verification. In this paper, we first make the case for proof-carrying approximate circuits and then demonstrate the feasibility of the approach by a set of synthesis experiments using an exemplary approximation framework.}}, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco}}, issn = {{1557-9999}}, journal = {{IEEE Transactions On Very Large Scale Integration Systems}}, keywords = {{Approximate circuit synthesis, approximate computing, error metrics, formal verification, proof-carrying hardware}}, number = {{9}}, pages = {{2084 -- 2088}}, publisher = {{IEEE}}, title = {{{Proof-carrying Approximate Circuits}}}, doi = {{10.1109/TVLSI.2020.3008061}}, volume = {{28}}, year = {{2020}}, } @unpublished{20748, abstract = {{On the circuit level, the design paradigm Approximate Computing seeks to trade off computational accuracy against a target metric, e.g., energy consumption. This trade-off is possible for many applications due to their inherent resiliency against inaccuracies. In the past, several automated approximation frameworks have been presented, which either utilize designated approximation techniques or libraries to replace approximable circuit parts with inaccurate versions. The frameworks invoke a search algorithm to iteratively explore the search space of performance degraded circuits, and validate their quality individually. In this paper, we propose to reverse this procedure. Rather than exploring the search space, we delineate the approximate parts of the search space which are guaranteed to lead to valid approximate circuits. Our methodology is supported by formal verification and independent of approximation techniques. Eventually, the user is provided with quality bounds of the individual approximable circuit parts. Consequently, our approach guarantees that any approximate circuit which implements these parts within the determined quality constraints satisfies the global quality constraints, superseding a subsequent quality verification. In our experimental results, we present the runtimes of our approach.}}, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco}}, booktitle = {{Fifth Workshop on Approximate Computing (AxC 2020)}}, pages = {{2}}, title = {{{Search Space Characterization for AxC Synthesis}}}, year = {{2020}}, } @article{3585, abstract = {{Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.}}, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco}}, issn = {{0026-2714}}, journal = {{Microelectronics Reliability}}, keywords = {{Approximate Computing, Framework, Pareto Front, Accuracy}}, pages = {{277--290}}, publisher = {{Elsevier}}, title = {{{CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}}}, doi = {{10.1016/j.microrel.2019.04.003}}, volume = {{99}}, year = {{2019}}, } @unpublished{16853, abstract = {{State-of-the-art frameworks for generating approximate circuits usually rely on information gained through circuit synthesis and/or verification to explore the search space and to find an optimal solution. Throughout the process, a large number of circuits may be subject to processing, leading to considerable runtimes. In this work, we propose a search which takes error bounds and pre-computed impact factors into account to reduce the number of invoked synthesis and verification processes. In our experimental results, we achieved speed-ups of up to 76x while area savings remain comparable to the reference search method, simulated annealing.}}, author = {{Witschen, Linus Matthias and Ghasemzadeh Mohammadi, Hassan and Artmann, Matthias and Platzner, Marco}}, booktitle = {{Fourth Workshop on Approximate Computing (AxC 2019)}}, keywords = {{Approximate computing, parameter selection, search space exploration, verification, circuit synthesis}}, pages = {{2}}, title = {{{Jump Search: A Fast Technique for the Synthesis of Approximate Circuits}}}, year = {{2019}}, } @inproceedings{10577, abstract = {{State-of-the-art frameworks for generating approximate circuits automatically explore the search space in an iterative process - often greedily. Synthesis and verification processes are invoked in each iteration to evaluate the found solutions and to guide the search algorithm. As a result, a large number of approximate circuits is subjected to analysis - leading to long runtimes - but only a few approximate circuits might form an acceptable solution. In this paper, we present our Jump Search (JS) method which seeks to reduce the runtime of an approximation process by reducing the number of expensive synthesis and verification steps. To reduce the runtime, JS computes impact factors for each approximation candidate in the circuit to create a selection of approximate circuits without invoking synthesis or verification processes. We denote the selection as path from which JS determines the final solution. In our experimental results, JS achieved speed-ups of up to 57x while area savings remain comparable to the reference search method, Simulated Annealing.}}, author = {{Witschen, Linus Matthias and Ghasemzadeh Mohammadi, Hassan and Artmann, Matthias and Platzner, Marco}}, booktitle = {{Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI '19}}, isbn = {{9781450362528}}, keywords = {{Approximate computing, design automation, parameter selection, circuit synthesis}}, location = {{Tysons Corner, VA, USA}}, publisher = {{ACM}}, title = {{{Jump Search: A Fast Technique for the Synthesis of Approximate Circuits}}}, doi = {{10.1145/3299874.3317998}}, year = {{2019}}, } @article{11950, abstract = {{Advances in electromyographic (EMG) sensor technology and machine learning algorithms have led to an increased research effort into high density EMG-based pattern recognition methods for prosthesis control. With the goal set on an autonomous multi-movement prosthesis capable of performing training and classification of an amputee’s EMG signals, the focus of this paper lies in the acceleration of the embedded signal processing chain. We present two Xilinx Zynq-based architectures for accelerating two inherently different high density EMG-based control algorithms. The first hardware accelerated design achieves speed-ups of up to 4.8 over the software-only solution, allowing for a processing delay lower than the sample period of 1 ms. The second system achieved a speed-up of 5.5 over the software-only version and operates at a still satisfactory low processing delay of up to 15 ms while providing a higher reliability and robustness against electrode shift and noisy channels.}}, author = {{Boschmann, Alexander and Agne, Andreas and Thombansen, Georg and Witschen, Linus Matthias and Kraus, Florian and Platzner, Marco}}, issn = {{0743-7315}}, journal = {{Journal of Parallel and Distributed Computing}}, keywords = {{High density electromyography, FPGA acceleration, Medical signal processing, Pattern recognition, Prosthetics}}, pages = {{77--89}}, publisher = {{Elsevier}}, title = {{{Zynq-based acceleration of robust high density myoelectric signal processing}}}, doi = {{10.1016/j.jpdc.2018.07.004}}, volume = {{123}}, year = {{2019}}, } @unpublished{3586, abstract = {{Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.}}, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco}}, booktitle = {{Third Workshop on Approximate Computing (AxC 2018)}}, keywords = {{Approximate Computing, Framework, Pareto Front, Accuracy}}, pages = {{6}}, title = {{{CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}}}, year = {{2018}}, } @unpublished{1165, author = {{Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco}}, booktitle = {{4th Workshop On Approximate Computing (WAPCO 2018)}}, title = {{{Making the Case for Proof-carrying Approximate Circuits}}}, year = {{2018}}, } @misc{1157, author = {{Witschen, Linus Matthias}}, publisher = {{Universität Paderborn}}, title = {{{A Framework for the Synthesis of Approximate Circuits}}}, year = {{2017}}, } @inproceedings{10630, author = {{Boschmann, Alexander and Thombansen, Georg and Witschen, Linus Matthias and Wiens, Alex and Platzner, Marco}}, booktitle = {{Design, Automation and Test in Europe (DATE)}}, title = {{{A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller}}}, doi = {{10.23919/DATE.2017.7927137}}, year = {{2017}}, } @inproceedings{15873, author = {{Boschmann, Alexander and Agne, Andreas and Witschen, Linus Matthias and Thombansen, Georg and Kraus, Florian and Platzner, Marco}}, booktitle = {{2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)}}, isbn = {{9781467394062}}, keywords = {{Electromyography, Feature extraction, Delays, Hardware Pattern recognition, Prosthetics, High definition video}}, location = {{Mexiko City, Mexiko}}, publisher = {{IEEE}}, title = {{{FPGA-based acceleration of high density myoelectric signal processing}}}, doi = {{10.1109/reconfig.2015.7393312}}, year = {{2016}}, }