[{"author":[{"last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051","first_name":"Linus Matthias"},{"id":"3118","full_name":"Wiersema, Tobias","last_name":"Wiersema","first_name":"Tobias"},{"first_name":"Lucas David","last_name":"Reuter","full_name":"Reuter, Lucas David"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"date_created":"2022-02-22T07:51:38Z","date_updated":"2022-02-22T07:51:42Z","conference":{"start_date":"2022-07-10","name":"2022 59th ACM/IEEE Design Automation Conference (DAC)","location":"San Francisco, USA","end_date":"2022-07-14"},"title":"Search Space Characterization for Approximate Logic Synthesis ","publication_status":"accepted","citation":{"bibtex":"@inproceedings{Witschen_Wiersema_Reuter_Platzner, title={Search Space Characterization for Approximate Logic Synthesis }, booktitle={2022 59th ACM/IEEE Design Automation Conference (DAC)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Reuter, Lucas David and Platzner, Marco} }","short":"L.M. Witschen, T. Wiersema, L.D. Reuter, M. Platzner, in: 2022 59th ACM/IEEE Design Automation Conference (DAC), n.d.","mla":"Witschen, Linus Matthias, et al. “Search Space Characterization for Approximate Logic Synthesis .” <i>2022 59th ACM/IEEE Design Automation Conference (DAC)</i>.","apa":"Witschen, L. M., Wiersema, T., Reuter, L. D., &#38; Platzner, M. (n.d.). Search Space Characterization for Approximate Logic Synthesis . <i>2022 59th ACM/IEEE Design Automation Conference (DAC)</i>. 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.","ama":"Witschen LM, Wiersema T, Reuter LD, Platzner M. Search Space Characterization for Approximate Logic Synthesis . In: <i>2022 59th ACM/IEEE Design Automation Conference (DAC)</i>.","chicago":"Witschen, Linus Matthias, Tobias Wiersema, Lucas David Reuter, and Marco Platzner. “Search Space Characterization for Approximate Logic Synthesis .” In <i>2022 59th ACM/IEEE Design Automation Conference (DAC)</i>, n.d.","ieee":"L. M. Witschen, T. Wiersema, L. D. Reuter, and M. Platzner, “Search Space Characterization for Approximate Logic Synthesis ,” presented at the 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA."},"year":"2022","user_id":"49051","department":[{"_id":"78"}],"project":[{"name":"SFB 901: SFB 901","_id":"1"},{"name":"SFB 901 - B: SFB 901 - Project Area B","_id":"3"},{"_id":"12","name":"SFB 901 - B4: SFB 901 - Subproject B4"}],"_id":"29945","language":[{"iso":"eng"}],"type":"conference","publication":"2022 59th ACM/IEEE Design Automation Conference (DAC)","status":"public"},{"publication_status":"accepted","citation":{"apa":"Witschen, L. M., Wiersema, T., Artmann, M., &#38; Platzner, M. (n.d.). MUSCAT: MUS-based Circuit Approximation Technique. <i>Design, Automation and Test in Europe (DATE)</i>. Design, Automation and Test in Europe (DATE), Online.","mla":"Witschen, Linus Matthias, et al. “MUSCAT: MUS-Based Circuit Approximation Technique.” <i>Design, Automation and Test in Europe (DATE)</i>.","bibtex":"@inproceedings{Witschen_Wiersema_Artmann_Platzner, title={MUSCAT: MUS-based Circuit Approximation Technique}, booktitle={Design, Automation and Test in Europe (DATE)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Artmann, Matthias and Platzner, Marco} }","short":"L.M. Witschen, T. Wiersema, M. Artmann, M. Platzner, in: Design, Automation and Test in Europe (DATE), n.d.","chicago":"Witschen, Linus Matthias, Tobias Wiersema, Matthias Artmann, and Marco Platzner. “MUSCAT: MUS-Based Circuit Approximation Technique.” In <i>Design, Automation and Test in Europe (DATE)</i>, n.d.","ieee":"L. M. Witschen, T. Wiersema, M. Artmann, and M. Platzner, “MUSCAT: MUS-based Circuit Approximation Technique,” presented at the Design, Automation and Test in Europe (DATE), Online.","ama":"Witschen LM, Wiersema T, Artmann M, Platzner M. MUSCAT: MUS-based Circuit Approximation Technique. In: <i>Design, Automation and Test in Europe (DATE)</i>."},"year":"2022","date_created":"2022-02-16T16:22:23Z","author":[{"last_name":"Witschen","id":"49051","full_name":"Witschen, Linus Matthias","first_name":"Linus Matthias"},{"first_name":"Tobias","id":"3118","full_name":"Wiersema, Tobias","last_name":"Wiersema"},{"first_name":"Matthias","full_name":"Artmann, Matthias","last_name":"Artmann"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"}],"date_updated":"2022-02-22T07:52:01Z","conference":{"location":"Online","name":"Design, Automation and Test in Europe (DATE)"},"title":"MUSCAT: MUS-based Circuit Approximation Technique","type":"conference","publication":"Design, Automation and Test in Europe (DATE)","status":"public","user_id":"49051","department":[{"_id":"78"}],"project":[{"name":"SFB 901: SFB 901","_id":"1"},{"name":"SFB 901 - B: SFB 901 - Project Area B","_id":"3"},{"name":"SFB 901 - B4: SFB 901 - Subproject B4","_id":"12"},{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"_id":"29865","language":[{"iso":"eng"}]},{"title":"Frameworks and Methodologies for Search-based Approximate Logic Synthesis","doi":"10.17619/UNIPB/1-1649","date_updated":"2023-01-19T06:41:22Z","author":[{"full_name":"Witschen, Linus Matthias","id":"49051","last_name":"Witschen","first_name":"Linus Matthias"}],"date_created":"2022-11-09T06:26:22Z","supervisor":[{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"year":"2022","citation":{"ieee":"L. M. Witschen, <i>Frameworks and Methodologies for Search-based Approximate Logic Synthesis</i>. 2022.","chicago":"Witschen, Linus Matthias. <i>Frameworks and Methodologies for Search-Based Approximate Logic Synthesis</i>, 2022. <a href=\"https://doi.org/10.17619/UNIPB/1-1649\">https://doi.org/10.17619/UNIPB/1-1649</a>.","ama":"Witschen LM. <i>Frameworks and Methodologies for Search-Based Approximate Logic Synthesis</i>.; 2022. doi:<a href=\"https://doi.org/10.17619/UNIPB/1-1649\">10.17619/UNIPB/1-1649</a>","apa":"Witschen, L. M. (2022). <i>Frameworks and Methodologies for Search-based Approximate Logic Synthesis</i>. <a href=\"https://doi.org/10.17619/UNIPB/1-1649\">https://doi.org/10.17619/UNIPB/1-1649</a>","short":"L.M. Witschen, Frameworks and Methodologies for Search-Based Approximate Logic Synthesis, 2022.","mla":"Witschen, Linus Matthias. <i>Frameworks and Methodologies for Search-Based Approximate Logic Synthesis</i>. 2022, doi:<a href=\"https://doi.org/10.17619/UNIPB/1-1649\">10.17619/UNIPB/1-1649</a>.","bibtex":"@book{Witschen_2022, title={Frameworks and Methodologies for Search-based Approximate Logic Synthesis}, DOI={<a href=\"https://doi.org/10.17619/UNIPB/1-1649\">10.17619/UNIPB/1-1649</a>}, author={Witschen, Linus Matthias}, year={2022} }"},"language":[{"iso":"eng"}],"_id":"34041","project":[{"_id":"1","name":"SFB 901: SFB 901"},{"name":"SFB 901 - B: SFB 901 - Project Area B","_id":"3"},{"_id":"12","name":"SFB 901 - B4: SFB 901 - Subproject B4"}],"department":[{"_id":"78"}],"user_id":"15504","status":"public","type":"dissertation"},{"publication_status":"accepted","citation":{"chicago":"Witschen, Linus Matthias, Tobias Wiersema, Masood Raeisi Nafchi, Arne Bockhorn, and Marco Platzner. “Timing Optimization for Virtual FPGA Configurations.” In <i>Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)</i>, edited by Frank Hannig, Steven Derrien, Pedro Diniz, and Daniel Chillet. Reconfigurable Computing: Architectures, Tools, and Applications. Springer Lecture Notes in Computer Science, n.d. <a href=\"https://doi.org/10.1007/978-3-030-79025-7_4\">https://doi.org/10.1007/978-3-030-79025-7_4</a>.","ieee":"L. M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, and M. Platzner, “Timing Optimization for Virtual FPGA Configurations,” in <i>Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)</i>, Virtual conference, doi: <a href=\"https://doi.org/10.1007/978-3-030-79025-7_4\">10.1007/978-3-030-79025-7_4</a>.","ama":"Witschen LM, Wiersema T, Raeisi Nafchi M, Bockhorn A, Platzner M. Timing Optimization for Virtual FPGA Configurations. In: Hannig F, Derrien S, Diniz P, Chillet D, eds. <i>Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)</i>. Reconfigurable Computing: Architectures, Tools, and Applications. Springer Lecture Notes in Computer Science. doi:<a href=\"https://doi.org/10.1007/978-3-030-79025-7_4\">10.1007/978-3-030-79025-7_4</a>","short":"L.M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, M. Platzner, in: F. Hannig, S. Derrien, P. Diniz, D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Springer Lecture Notes in Computer Science, n.d.","mla":"Witschen, Linus Matthias, et al. “Timing Optimization for Virtual FPGA Configurations.” <i>Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)</i>, edited by Frank Hannig et al., Springer Lecture Notes in Computer Science, doi:<a href=\"https://doi.org/10.1007/978-3-030-79025-7_4\">10.1007/978-3-030-79025-7_4</a>.","bibtex":"@inproceedings{Witschen_Wiersema_Raeisi Nafchi_Bockhorn_Platzner, series={Reconfigurable Computing: Architectures, Tools, and Applications}, title={Timing Optimization for Virtual FPGA Configurations}, DOI={<a href=\"https://doi.org/10.1007/978-3-030-79025-7_4\">10.1007/978-3-030-79025-7_4</a>}, booktitle={Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)}, publisher={Springer Lecture Notes in Computer Science}, author={Witschen, Linus Matthias and Wiersema, Tobias and Raeisi Nafchi, Masood and Bockhorn, Arne and Platzner, Marco}, editor={Hannig, Frank and Derrien, Steven and Diniz, Pedro and Chillet, Daniel}, collection={Reconfigurable Computing: Architectures, Tools, and Applications} }","apa":"Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., &#38; Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, &#38; D. Chillet (Eds.), <i>Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21)</i>. Springer Lecture Notes in Computer Science. <a href=\"https://doi.org/10.1007/978-3-030-79025-7_4\">https://doi.org/10.1007/978-3-030-79025-7_4</a>"},"year":"2021","date_created":"2021-05-04T14:18:46Z","author":[{"last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051","first_name":"Linus Matthias"},{"last_name":"Wiersema","full_name":"Wiersema, Tobias","id":"3118","first_name":"Tobias"},{"full_name":"Raeisi Nafchi, Masood","last_name":"Raeisi Nafchi","first_name":"Masood"},{"first_name":"Arne","last_name":"Bockhorn","full_name":"Bockhorn, Arne"},{"last_name":"Platzner","full_name":"Platzner, Marco","id":"398","first_name":"Marco"}],"publisher":"Springer Lecture Notes in Computer Science","date_updated":"2022-02-14T11:03:09Z","doi":"10.1007/978-3-030-79025-7_4","conference":{"start_date":"2021-06-29","name":"International Symposium on Applied Reconfigurable Computing","location":"Virtual conference","end_date":"2021-07-01"},"title":"Timing Optimization for Virtual FPGA Configurations","publication":"Proceedings of International Symposium on Applied Reconfigurable Computing (ARC'21)","type":"conference","status":"public","editor":[{"full_name":"Hannig, Frank","last_name":"Hannig","first_name":"Frank"},{"last_name":"Derrien","full_name":"Derrien, Steven","first_name":"Steven"},{"full_name":"Diniz, Pedro","last_name":"Diniz","first_name":"Pedro"},{"first_name":"Daniel","full_name":"Chillet, Daniel","last_name":"Chillet"}],"department":[{"_id":"78"}],"user_id":"3118","series_title":"Reconfigurable Computing: Architectures, Tools, and Applications","_id":"21953","project":[{"_id":"1","name":"SFB 901"},{"_id":"3","name":"SFB 901 - Project Area B"},{"_id":"12","name":"SFB 901 - Subproject B4"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"language":[{"iso":"eng"}]},{"publication_identifier":{"issn":["1063-8210"],"eissn":["1557-9999"]},"publication_status":"published","intvolume":"        28","page":"2084 - 2088","citation":{"ama":"Witschen LM, Wiersema T, Platzner M. Proof-carrying Approximate Circuits. <i>IEEE Transactions On Very Large Scale Integration Systems</i>. 2020;28(9):2084-2088. doi:<a href=\"https://doi.org/10.1109/TVLSI.2020.3008061\">10.1109/TVLSI.2020.3008061</a>","ieee":"L. M. Witschen, T. Wiersema, and M. Platzner, “Proof-carrying Approximate Circuits,” <i>IEEE Transactions On Very Large Scale Integration Systems</i>, vol. 28, no. 9, pp. 2084–2088, 2020.","chicago":"Witschen, Linus Matthias, Tobias Wiersema, and Marco Platzner. “Proof-Carrying Approximate Circuits.” <i>IEEE Transactions On Very Large Scale Integration Systems</i> 28, no. 9 (2020): 2084–88. <a href=\"https://doi.org/10.1109/TVLSI.2020.3008061\">https://doi.org/10.1109/TVLSI.2020.3008061</a>.","apa":"Witschen, L. M., Wiersema, T., &#38; Platzner, M. (2020). Proof-carrying Approximate Circuits. <i>IEEE Transactions On Very Large Scale Integration Systems</i>, <i>28</i>(9), 2084–2088. <a href=\"https://doi.org/10.1109/TVLSI.2020.3008061\">https://doi.org/10.1109/TVLSI.2020.3008061</a>","short":"L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.","bibtex":"@article{Witschen_Wiersema_Platzner_2020, title={Proof-carrying Approximate Circuits}, volume={28}, DOI={<a href=\"https://doi.org/10.1109/TVLSI.2020.3008061\">10.1109/TVLSI.2020.3008061</a>}, number={9}, journal={IEEE Transactions On Very Large Scale Integration Systems}, publisher={IEEE}, author={Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco}, year={2020}, pages={2084–2088} }","mla":"Witschen, Linus Matthias, et al. “Proof-Carrying Approximate Circuits.” <i>IEEE Transactions On Very Large Scale Integration Systems</i>, vol. 28, no. 9, IEEE, 2020, pp. 2084–88, doi:<a href=\"https://doi.org/10.1109/TVLSI.2020.3008061\">10.1109/TVLSI.2020.3008061</a>."},"volume":28,"author":[{"full_name":"Witschen, Linus Matthias","id":"49051","last_name":"Witschen","first_name":"Linus Matthias"},{"first_name":"Tobias","last_name":"Wiersema","id":"3118","full_name":"Wiersema, Tobias"},{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"}],"date_updated":"2022-01-06T06:53:09Z","doi":"10.1109/TVLSI.2020.3008061","type":"journal_article","status":"public","department":[{"_id":"78"}],"user_id":"49051","_id":"17358","project":[{"name":"SFB 901 - Subproject B4","_id":"12"},{"name":"SFB 901 - Project Area B","_id":"3"},{"_id":"1","name":"SFB 901"}],"funded_apc":"1","article_type":"original","issue":"9","quality_controlled":"1","year":"2020","date_created":"2020-07-06T11:21:30Z","publisher":"IEEE","title":"Proof-carrying Approximate Circuits","publication":"IEEE Transactions On Very Large Scale Integration Systems","abstract":[{"lang":"eng","text":"Approximate circuits trade-off computational accuracy against improvements in hardware area, delay, or energy consumption. IP core vendors who wish to create such circuits need to convince consumers of the resulting approximation quality. As a solution we propose proof-carrying approximate circuits: The vendor creates an approximate IP core together with a certificate that proves the approximation quality. The proof certificate is bundled with the approximate IP core and sent off to the consumer. The consumer can formally verify the approximation quality of the IP core at a fraction of the typical computational cost for formal verification. In this paper, we first make the case for proof-carrying approximate circuits and then demonstrate the feasibility of the approach by a set of synthesis experiments using an exemplary approximation framework."}],"language":[{"iso":"eng"}],"keyword":["Approximate circuit synthesis","approximate computing","error metrics","formal verification","proof-carrying hardware"]},{"year":"2020","citation":{"apa":"Witschen, L. M., Wiersema, T., &#38; Platzner, M. (n.d.). Search Space Characterization for AxC Synthesis. <i>Fifth Workshop on Approximate Computing (AxC 2020)</i>.","mla":"Witschen, Linus Matthias, et al. “Search Space Characterization for AxC Synthesis.” <i>Fifth Workshop on Approximate Computing (AxC 2020)</i>.","bibtex":"@article{Witschen_Wiersema_Platzner, title={Search Space Characterization for AxC Synthesis}, journal={Fifth Workshop on Approximate Computing (AxC 2020)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco} }","short":"L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).","ama":"Witschen LM, Wiersema T, Platzner M. Search Space Characterization for AxC Synthesis. <i>Fifth Workshop on Approximate Computing (AxC 2020)</i>.","chicago":"Witschen, Linus Matthias, Tobias Wiersema, and Marco Platzner. “Search Space Characterization for AxC Synthesis.” <i>Fifth Workshop on Approximate Computing (AxC 2020)</i>, n.d.","ieee":"L. M. Witschen, T. Wiersema, and M. Platzner, “Search Space Characterization for AxC Synthesis,” <i>Fifth Workshop on Approximate Computing (AxC 2020)</i>. ."},"page":"2","publication_status":"accepted","has_accepted_license":"1","title":"Search Space Characterization for AxC Synthesis","date_updated":"2022-01-06T06:54:35Z","date_created":"2020-12-15T15:13:49Z","author":[{"first_name":"Linus Matthias","last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051"},{"first_name":"Tobias","full_name":"Wiersema, Tobias","id":"3118","last_name":"Wiersema"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"}],"abstract":[{"lang":"eng","text":"On the circuit level, the design paradigm Approximate Computing seeks to trade off computational accuracy against a target metric, e.g., energy consumption. This trade-off is possible for many applications due to their inherent resiliency against inaccuracies.\r\nIn the past, several automated approximation frameworks have been presented, which either utilize designated approximation techniques or libraries to replace approximable circuit parts with inaccurate versions. The frameworks invoke a search algorithm to iteratively explore the search space of performance degraded circuits, and validate their quality individually. \r\nIn this paper, we propose to reverse this procedure. Rather than exploring the search space, we delineate the approximate parts of the search space which are guaranteed to lead to valid approximate circuits. Our methodology is supported by formal verification and independent of approximation techniques. Eventually, the user is provided with quality bounds of the individual approximable circuit parts. Consequently, our approach guarantees that any approximate circuit which implements these parts within the determined quality constraints satisfies the global quality constraints, superseding a subsequent quality verification.\r\nIn our experimental results, we present the runtimes of our approach."}],"file":[{"relation":"main_file","success":1,"content_type":"application/pdf","file_name":"witschen20_axc.pdf","access_level":"closed","file_id":"20749","file_size":250870,"date_created":"2020-12-15T15:11:06Z","creator":"witschen","date_updated":"2020-12-15T15:11:06Z"}],"status":"public","type":"preprint","publication":"Fifth Workshop on Approximate Computing (AxC 2020)","ddc":["000"],"file_date_updated":"2020-12-15T15:11:06Z","language":[{"iso":"eng"}],"project":[{"name":"SFB 901 - Subproject B4","_id":"12"},{"_id":"3","name":"SFB 901 - Project Area B"},{"_id":"1","name":"SFB 901"}],"_id":"20748","user_id":"3118","department":[{"_id":"78"}]},{"status":"public","type":"journal_article","user_id":"49051","department":[{"_id":"78"}],"project":[{"_id":"12","name":"SFB 901 - Subproject B4"},{"name":"SFB 901","_id":"1"},{"_id":"3","name":"SFB 901 - Project Area B"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"_id":"3585","citation":{"apa":"Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &#38; Platzner, M. (2019). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. <i>Microelectronics Reliability</i>, <i>99</i>, 277–290. <a href=\"https://doi.org/10.1016/j.microrel.2019.04.003\">https://doi.org/10.1016/j.microrel.2019.04.003</a>","short":"L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.","bibtex":"@article{Witschen_Wiersema_Ghasemzadeh Mohammadi_Awais_Platzner_2019, title={CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}, volume={99}, DOI={<a href=\"https://doi.org/10.1016/j.microrel.2019.04.003\">10.1016/j.microrel.2019.04.003</a>}, journal={Microelectronics Reliability}, publisher={Elsevier}, author={Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco}, year={2019}, pages={277–290} }","mla":"Witschen, Linus Matthias, et al. “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation.” <i>Microelectronics Reliability</i>, vol. 99, Elsevier, 2019, pp. 277–90, doi:<a href=\"https://doi.org/10.1016/j.microrel.2019.04.003\">10.1016/j.microrel.2019.04.003</a>.","ama":"Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. <i>Microelectronics Reliability</i>. 2019;99:277-290. doi:<a href=\"https://doi.org/10.1016/j.microrel.2019.04.003\">10.1016/j.microrel.2019.04.003</a>","ieee":"L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” <i>Microelectronics Reliability</i>, vol. 99, pp. 277–290, 2019.","chicago":"Witschen, Linus Matthias, Tobias Wiersema, Hassan Ghasemzadeh Mohammadi, Muhammad Awais, and Marco Platzner. “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation.” <i>Microelectronics Reliability</i> 99 (2019): 277–90. <a href=\"https://doi.org/10.1016/j.microrel.2019.04.003\">https://doi.org/10.1016/j.microrel.2019.04.003</a>."},"intvolume":"        99","page":"277-290","publication_status":"published","publication_identifier":{"issn":["0026-2714"]},"doi":"10.1016/j.microrel.2019.04.003","author":[{"full_name":"Witschen, Linus Matthias","id":"49051","last_name":"Witschen","first_name":"Linus Matthias"},{"last_name":"Wiersema","id":"3118","full_name":"Wiersema, Tobias","first_name":"Tobias"},{"last_name":"Ghasemzadeh Mohammadi","full_name":"Ghasemzadeh Mohammadi, Hassan","id":"61186","first_name":"Hassan"},{"id":"64665","full_name":"Awais, Muhammad","orcid":"https://orcid.org/0000-0003-4148-2969","last_name":"Awais","first_name":"Muhammad"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"}],"volume":99,"date_updated":"2022-01-06T06:59:25Z","abstract":[{"text":"Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.","lang":"eng"}],"publication":"Microelectronics Reliability","language":[{"iso":"eng"}],"keyword":["Approximate Computing","Framework","Pareto Front","Accuracy"],"year":"2019","title":"CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation","date_created":"2018-07-20T14:08:49Z","publisher":"Elsevier"},{"has_accepted_license":"1","publication_status":"accepted","page":"2","citation":{"ieee":"L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” <i>Fourth Workshop on Approximate Computing (AxC 2019)</i>. .","chicago":"Witschen, Linus Matthias, Hassan Ghasemzadeh Mohammadi, Matthias Artmann, and Marco Platzner. “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.” <i>Fourth Workshop on Approximate Computing (AxC 2019)</i>, n.d.","ama":"Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. <i>Fourth Workshop on Approximate Computing (AxC 2019)</i>.","apa":"Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &#38; Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. <i>Fourth Workshop on Approximate Computing (AxC 2019)</i>.","bibtex":"@article{Witschen_Ghasemzadeh Mohammadi_Artmann_Platzner, title={Jump Search: A Fast Technique for the Synthesis of Approximate Circuits}, journal={Fourth Workshop on Approximate Computing (AxC 2019)}, author={Witschen, Linus Matthias and Ghasemzadeh Mohammadi, Hassan and Artmann, Matthias and Platzner, Marco} }","short":"L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).","mla":"Witschen, Linus Matthias, et al. “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.” <i>Fourth Workshop on Approximate Computing (AxC 2019)</i>."},"year":"2019","author":[{"first_name":"Linus Matthias","last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051"},{"first_name":"Hassan","full_name":"Ghasemzadeh Mohammadi, Hassan","id":"61186","last_name":"Ghasemzadeh Mohammadi"},{"last_name":"Artmann","full_name":"Artmann, Matthias","first_name":"Matthias"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"}],"date_created":"2020-04-25T08:02:07Z","date_updated":"2022-01-06T06:52:57Z","title":"Jump Search: A Fast Technique for the Synthesis of Approximate Circuits","publication":"Fourth Workshop on Approximate Computing (AxC 2019)","type":"preprint","status":"public","file":[{"relation":"main_file","success":1,"content_type":"application/pdf","access_level":"closed","file_id":"16854","file_name":"AxC19_paper_3.pdf","file_size":152806,"date_created":"2020-04-25T08:00:35Z","creator":"witschen","date_updated":"2020-04-25T08:00:35Z"}],"abstract":[{"text":"State-of-the-art frameworks for generating approximate circuits usually rely on information gained through circuit synthesis and/or verification to explore the search space and to find an optimal solution. Throughout the process, a large number of circuits may be subject to processing, leading to considerable runtimes. In this work, we propose a search which takes error bounds and pre-computed impact factors into account to reduce the number of invoked synthesis and verification processes. In our experimental results, we achieved speed-ups of up to 76x while area savings remain comparable to the reference search method, simulated annealing.","lang":"eng"}],"department":[{"_id":"78"}],"user_id":"49051","_id":"16853","project":[{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"file_date_updated":"2020-04-25T08:00:35Z","language":[{"iso":"eng"}],"keyword":["Approximate computing","parameter selection","search space exploration","verification","circuit synthesis"],"ddc":["006"]},{"date_updated":"2022-01-06T06:50:45Z","author":[{"first_name":"Linus Matthias","id":"49051","full_name":"Witschen, Linus Matthias","last_name":"Witschen"},{"last_name":"Ghasemzadeh Mohammadi","id":"61186","full_name":"Ghasemzadeh Mohammadi, Hassan","first_name":"Hassan"},{"first_name":"Matthias","full_name":"Artmann, Matthias","last_name":"Artmann"},{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"}],"conference":{"end_date":"2019-05-11","location":"Tysons Corner, VA, USA","name":"ACM Great Lakes Symposium on VLSI (GLSVLSI)","start_date":"2019-05-09"},"doi":"10.1145/3299874.3317998","publication_status":"published","publication_identifier":{"isbn":["9781450362528"]},"place":"New York, NY, USA","citation":{"apa":"Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., &#38; Platzner, M. (2019). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In <i>Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19</i>. New York, NY, USA: ACM. <a href=\"https://doi.org/10.1145/3299874.3317998\">https://doi.org/10.1145/3299874.3317998</a>","mla":"Witschen, Linus Matthias, et al. “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.” <i>Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19</i>, ACM, 2019, doi:<a href=\"https://doi.org/10.1145/3299874.3317998\">10.1145/3299874.3317998</a>.","short":"L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.","bibtex":"@inproceedings{Witschen_Ghasemzadeh Mohammadi_Artmann_Platzner_2019, place={New York, NY, USA}, title={Jump Search: A Fast Technique for the Synthesis of Approximate Circuits}, DOI={<a href=\"https://doi.org/10.1145/3299874.3317998\">10.1145/3299874.3317998</a>}, booktitle={Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19}, publisher={ACM}, author={Witschen, Linus Matthias and Ghasemzadeh Mohammadi, Hassan and Artmann, Matthias and Platzner, Marco}, year={2019} }","ieee":"L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” in <i>Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19</i>, Tysons Corner, VA, USA, 2019.","chicago":"Witschen, Linus Matthias, Hassan Ghasemzadeh Mohammadi, Matthias Artmann, and Marco Platzner. “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits.” In <i>Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19</i>. New York, NY, USA: ACM, 2019. <a href=\"https://doi.org/10.1145/3299874.3317998\">https://doi.org/10.1145/3299874.3317998</a>.","ama":"Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In: <i>Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19</i>. New York, NY, USA: ACM; 2019. doi:<a href=\"https://doi.org/10.1145/3299874.3317998\">10.1145/3299874.3317998</a>"},"project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"_id":"10577","user_id":"49051","department":[{"_id":"78"}],"type":"conference","status":"public","publisher":"ACM","date_created":"2019-07-08T15:13:10Z","title":"Jump Search: A Fast Technique for the Synthesis of Approximate Circuits","year":"2019","keyword":["Approximate computing","design automation","parameter selection","circuit synthesis"],"language":[{"iso":"eng"}],"publication":"Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI '19","abstract":[{"text":"State-of-the-art frameworks for generating approximate circuits automatically explore the search space in an iterative process - often greedily. Synthesis and verification processes are invoked in each iteration to evaluate the found solutions and to guide the search algorithm. As a result, a large number of approximate circuits is subjected to analysis - leading to long runtimes - but only a few approximate circuits might form an acceptable solution.\r\n\r\nIn this paper, we present our Jump Search (JS) method which seeks to reduce the runtime of an approximation process by reducing the number of expensive synthesis and verification steps. To reduce the runtime, JS computes impact factors for each approximation candidate in the circuit to create a selection of approximate circuits without invoking synthesis or verification processes. We denote the selection as path from which JS determines the final solution. In our experimental results, JS achieved speed-ups of up to 57x while area savings remain comparable to the reference search method, Simulated Annealing.","lang":"eng"}]},{"_id":"11950","user_id":"398","department":[{"_id":"78"}],"keyword":["High density electromyography","FPGA acceleration","Medical signal processing","Pattern recognition","Prosthetics"],"language":[{"iso":"eng"}],"type":"journal_article","publication":"Journal of Parallel and Distributed Computing","abstract":[{"lang":"eng","text":"Advances in electromyographic (EMG) sensor technology and machine learning algorithms have led to an increased research effort into high density EMG-based pattern recognition methods for prosthesis control. With the goal set on an autonomous multi-movement prosthesis capable of performing training and classification of an amputee’s EMG signals, the focus of this paper lies in the acceleration of the embedded signal processing chain. We present two Xilinx Zynq-based architectures for accelerating two inherently different high density EMG-based control algorithms. The first hardware accelerated design achieves speed-ups of up to 4.8 over the software-only solution, allowing for a processing delay lower than the sample period of 1 ms. The second system achieved a speed-up of 5.5 over the software-only version and operates at a still satisfactory low processing delay of up to 15 ms while providing a higher reliability and robustness against electrode shift and noisy channels."}],"status":"public","date_updated":"2022-01-06T06:51:13Z","publisher":"Elsevier","author":[{"first_name":"Alexander","full_name":"Boschmann, Alexander","last_name":"Boschmann"},{"first_name":"Andreas","last_name":"Agne","full_name":"Agne, Andreas"},{"last_name":"Thombansen","full_name":"Thombansen, Georg","first_name":"Georg"},{"first_name":"Linus Matthias","last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051"},{"full_name":"Kraus, Florian","last_name":"Kraus","first_name":"Florian"},{"first_name":"Marco","last_name":"Platzner","id":"398","full_name":"Platzner, Marco"}],"date_created":"2019-07-12T13:13:55Z","volume":123,"title":"Zynq-based acceleration of robust high density myoelectric signal processing","doi":"10.1016/j.jpdc.2018.07.004","publication_status":"published","publication_identifier":{"issn":["0743-7315"]},"year":"2019","citation":{"apa":"Boschmann, A., Agne, A., Thombansen, G., Witschen, L. M., Kraus, F., &#38; Platzner, M. (2019). Zynq-based acceleration of robust high density myoelectric signal processing. <i>Journal of Parallel and Distributed Computing</i>, <i>123</i>, 77–89. <a href=\"https://doi.org/10.1016/j.jpdc.2018.07.004\">https://doi.org/10.1016/j.jpdc.2018.07.004</a>","bibtex":"@article{Boschmann_Agne_Thombansen_Witschen_Kraus_Platzner_2019, title={Zynq-based acceleration of robust high density myoelectric signal processing}, volume={123}, DOI={<a href=\"https://doi.org/10.1016/j.jpdc.2018.07.004\">10.1016/j.jpdc.2018.07.004</a>}, journal={Journal of Parallel and Distributed Computing}, publisher={Elsevier}, author={Boschmann, Alexander and Agne, Andreas and Thombansen, Georg and Witschen, Linus Matthias and Kraus, Florian and Platzner, Marco}, year={2019}, pages={77–89} }","short":"A. Boschmann, A. Agne, G. Thombansen, L.M. Witschen, F. Kraus, M. Platzner, Journal of Parallel and Distributed Computing 123 (2019) 77–89.","mla":"Boschmann, Alexander, et al. “Zynq-Based Acceleration of Robust High Density Myoelectric Signal Processing.” <i>Journal of Parallel and Distributed Computing</i>, vol. 123, Elsevier, 2019, pp. 77–89, doi:<a href=\"https://doi.org/10.1016/j.jpdc.2018.07.004\">10.1016/j.jpdc.2018.07.004</a>.","chicago":"Boschmann, Alexander, Andreas Agne, Georg Thombansen, Linus Matthias Witschen, Florian Kraus, and Marco Platzner. “Zynq-Based Acceleration of Robust High Density Myoelectric Signal Processing.” <i>Journal of Parallel and Distributed Computing</i> 123 (2019): 77–89. <a href=\"https://doi.org/10.1016/j.jpdc.2018.07.004\">https://doi.org/10.1016/j.jpdc.2018.07.004</a>.","ieee":"A. Boschmann, A. Agne, G. Thombansen, L. M. Witschen, F. Kraus, and M. Platzner, “Zynq-based acceleration of robust high density myoelectric signal processing,” <i>Journal of Parallel and Distributed Computing</i>, vol. 123, pp. 77–89, 2019.","ama":"Boschmann A, Agne A, Thombansen G, Witschen LM, Kraus F, Platzner M. Zynq-based acceleration of robust high density myoelectric signal processing. <i>Journal of Parallel and Distributed Computing</i>. 2019;123:77-89. doi:<a href=\"https://doi.org/10.1016/j.jpdc.2018.07.004\">10.1016/j.jpdc.2018.07.004</a>"},"intvolume":"       123","page":"77-89"},{"type":"preprint","publication":"Third Workshop on Approximate Computing (AxC 2018)","file":[{"date_created":"2018-07-20T14:13:31Z","creator":"tobias82","date_updated":"2018-07-20T14:13:31Z","access_level":"closed","file_id":"3587","file_name":"WitschenWMAP2018.pdf","file_size":285348,"content_type":"application/pdf","relation":"main_file","success":1}],"status":"public","abstract":[{"text":"Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.","lang":"eng"}],"user_id":"49051","department":[{"_id":"78"}],"project":[{"name":"SFB 901 - Subproject B4","_id":"12"},{"name":"SFB 901","_id":"1"},{"name":"SFB 901 - Project Area B","_id":"3"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"_id":"3586","language":[{"iso":"eng"}],"file_date_updated":"2018-07-20T14:13:31Z","ddc":["000"],"keyword":["Approximate Computing","Framework","Pareto Front","Accuracy"],"publication_status":"accepted","has_accepted_license":"1","citation":{"ama":"Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. <i>Third Workshop on Approximate Computing (AxC 2018)</i>.","ieee":"L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” <i>Third Workshop on Approximate Computing (AxC 2018)</i>. .","chicago":"Witschen, Linus Matthias, Tobias Wiersema, Hassan Ghasemzadeh Mohammadi, Muhammad Awais, and Marco Platzner. “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation.” <i>Third Workshop on Approximate Computing (AxC 2018)</i>, n.d.","mla":"Witschen, Linus Matthias, et al. “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation.” <i>Third Workshop on Approximate Computing (AxC 2018)</i>.","bibtex":"@article{Witschen_Wiersema_Ghasemzadeh Mohammadi_Awais_Platzner, title={CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}, journal={Third Workshop on Approximate Computing (AxC 2018)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco} }","short":"L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Third Workshop on Approximate Computing (AxC 2018) (n.d.).","apa":"Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., &#38; Platzner, M. (n.d.). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. <i>Third Workshop on Approximate Computing (AxC 2018)</i>."},"page":"6","year":"2018","date_created":"2018-07-20T14:10:46Z","author":[{"first_name":"Linus Matthias","last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051"},{"first_name":"Tobias","id":"3118","full_name":"Wiersema, Tobias","last_name":"Wiersema"},{"first_name":"Hassan","last_name":"Ghasemzadeh Mohammadi","id":"61186","full_name":"Ghasemzadeh Mohammadi, Hassan"},{"last_name":"Awais","orcid":"https://orcid.org/0000-0003-4148-2969","full_name":"Awais, Muhammad","id":"64665","first_name":"Muhammad"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"}],"date_updated":"2022-01-06T06:59:26Z","title":"CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation"},{"date_updated":"2022-01-06T06:51:06Z","date_created":"2018-02-01T14:24:54Z","author":[{"first_name":"Linus Matthias","last_name":"Witschen","full_name":"Witschen, Linus Matthias","id":"49051"},{"first_name":"Tobias","last_name":"Wiersema","id":"3118","full_name":"Wiersema, Tobias"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"title":"Making the Case for Proof-carrying Approximate Circuits","has_accepted_license":"1","year":"2018","citation":{"apa":"Witschen, L. M., Wiersema, T., &#38; Platzner, M. (2018). Making the Case for Proof-carrying Approximate Circuits. <i>4th Workshop On Approximate Computing (WAPCO 2018)</i>.","bibtex":"@article{Witschen_Wiersema_Platzner_2018, title={Making the Case for Proof-carrying Approximate Circuits}, journal={4th Workshop On Approximate Computing (WAPCO 2018)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Platzner, Marco}, year={2018} }","short":"L.M. Witschen, T. Wiersema, M. Platzner, 4th Workshop On Approximate Computing (WAPCO 2018) (2018).","mla":"Witschen, Linus Matthias, et al. “Making the Case for Proof-Carrying Approximate Circuits.” <i>4th Workshop On Approximate Computing (WAPCO 2018)</i>, 2018.","chicago":"Witschen, Linus Matthias, Tobias Wiersema, and Marco Platzner. “Making the Case for Proof-Carrying Approximate Circuits.” <i>4th Workshop On Approximate Computing (WAPCO 2018)</i>, 2018.","ieee":"L. M. Witschen, T. Wiersema, and M. Platzner, “Making the Case for Proof-carrying Approximate Circuits,” <i>4th Workshop On Approximate Computing (WAPCO 2018)</i>. 2018.","ama":"Witschen LM, Wiersema T, Platzner M. Making the Case for Proof-carrying Approximate Circuits. <i>4th Workshop On Approximate Computing (WAPCO 2018)</i>. 2018."},"project":[{"name":"SFB 901","_id":"1"},{"_id":"3","name":"SFB 901 - Project Area B"},{"_id":"12","name":"SFB 901 - Subproject B4"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"_id":"1165","user_id":"49051","department":[{"_id":"7"},{"_id":"34"},{"_id":"78"}],"ddc":["000"],"language":[{"iso":"eng"}],"file_date_updated":"2018-11-26T08:00:53Z","type":"preprint","publication":"4th Workshop On Approximate Computing (WAPCO 2018)","file":[{"file_size":287224,"file_id":"5821","file_name":"WitschenWP2018[1].pdf","access_level":"closed","date_updated":"2018-11-26T08:00:53Z","creator":"tobias82","date_created":"2018-11-26T08:00:53Z","success":1,"relation":"main_file","content_type":"application/pdf"}],"status":"public"},{"title":"A Framework for the Synthesis of Approximate Circuits","date_updated":"2022-01-06T06:51:03Z","publisher":"Universität Paderborn","author":[{"first_name":"Linus Matthias","id":"49051","full_name":"Witschen, Linus Matthias","last_name":"Witschen"}],"supervisor":[{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"},{"first_name":"Tobias","last_name":"Wiersema","id":"3118","full_name":"Wiersema, Tobias"}],"date_created":"2018-02-01T14:21:19Z","year":"2017","citation":{"ieee":"L. M. Witschen, <i>A Framework for the Synthesis of Approximate Circuits</i>. Universität Paderborn, 2017.","chicago":"Witschen, Linus Matthias. <i>A Framework for the Synthesis of Approximate Circuits</i>. Universität Paderborn, 2017.","ama":"Witschen LM. <i>A Framework for the Synthesis of Approximate Circuits</i>. Universität Paderborn; 2017.","short":"L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.","bibtex":"@book{Witschen_2017, title={A Framework for the Synthesis of Approximate Circuits}, publisher={Universität Paderborn}, author={Witschen, Linus Matthias}, year={2017} }","mla":"Witschen, Linus Matthias. <i>A Framework for the Synthesis of Approximate Circuits</i>. Universität Paderborn, 2017.","apa":"Witschen, L. M. (2017). <i>A Framework for the Synthesis of Approximate Circuits</i>. Universität Paderborn."},"language":[{"iso":"eng"}],"_id":"1157","project":[{"name":"SFB 901","_id":"1"},{"_id":"3","name":"SFB 901 - Project Area B"},{"name":"SFB 901 - Subproject B4","_id":"12"},{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"department":[{"_id":"78"},{"_id":"7"}],"user_id":"477","status":"public","type":"mastersthesis"},{"language":[{"iso":"eng"}],"user_id":"3118","department":[{"_id":"78"}],"_id":"10630","status":"public","type":"conference","publication":"Design, Automation and Test in Europe (DATE)","doi":"10.23919/DATE.2017.7927137","title":"A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller","date_created":"2019-07-10T11:02:56Z","author":[{"full_name":"Boschmann, Alexander","last_name":"Boschmann","first_name":"Alexander"},{"last_name":"Thombansen","full_name":"Thombansen, Georg","first_name":"Georg"},{"last_name":"Witschen","id":"49051","full_name":"Witschen, Linus Matthias","first_name":"Linus Matthias"},{"full_name":"Wiens, Alex","last_name":"Wiens","first_name":"Alex"},{"full_name":"Platzner, Marco","id":"398","last_name":"Platzner","first_name":"Marco"}],"date_updated":"2022-01-06T06:50:49Z","citation":{"ieee":"A. Boschmann, G. Thombansen, L. M. Witschen, A. Wiens, and M. Platzner, “A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller,” in <i>Design, Automation and Test in Europe (DATE)</i>, 2017.","chicago":"Boschmann, Alexander, Georg Thombansen, Linus Matthias Witschen, Alex Wiens, and Marco Platzner. “A Zynq-Based Dynamically Reconfigurable High Density Myoelectric Prosthesis Controller.” In <i>Design, Automation and Test in Europe (DATE)</i>, 2017. <a href=\"https://doi.org/10.23919/DATE.2017.7927137\">https://doi.org/10.23919/DATE.2017.7927137</a>.","ama":"Boschmann A, Thombansen G, Witschen LM, Wiens A, Platzner M. A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In: <i>Design, Automation and Test in Europe (DATE)</i>. ; 2017. doi:<a href=\"https://doi.org/10.23919/DATE.2017.7927137\">10.23919/DATE.2017.7927137</a>","apa":"Boschmann, A., Thombansen, G., Witschen, L. M., Wiens, A., &#38; Platzner, M. (2017). A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In <i>Design, Automation and Test in Europe (DATE)</i>. <a href=\"https://doi.org/10.23919/DATE.2017.7927137\">https://doi.org/10.23919/DATE.2017.7927137</a>","short":"A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.","mla":"Boschmann, Alexander, et al. “A Zynq-Based Dynamically Reconfigurable High Density Myoelectric Prosthesis Controller.” <i>Design, Automation and Test in Europe (DATE)</i>, 2017, doi:<a href=\"https://doi.org/10.23919/DATE.2017.7927137\">10.23919/DATE.2017.7927137</a>.","bibtex":"@inproceedings{Boschmann_Thombansen_Witschen_Wiens_Platzner_2017, title={A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller}, DOI={<a href=\"https://doi.org/10.23919/DATE.2017.7927137\">10.23919/DATE.2017.7927137</a>}, booktitle={Design, Automation and Test in Europe (DATE)}, author={Boschmann, Alexander and Thombansen, Georg and Witschen, Linus Matthias and Wiens, Alex and Platzner, Marco}, year={2017} }"},"year":"2017"},{"conference":{"location":"Mexiko City, Mexiko","name":"2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"},"doi":"10.1109/reconfig.2015.7393312","title":"FPGA-based acceleration of high density myoelectric signal processing","author":[{"full_name":"Boschmann, Alexander","last_name":"Boschmann","first_name":"Alexander"},{"last_name":"Agne","full_name":"Agne, Andreas","first_name":"Andreas"},{"first_name":"Linus Matthias","id":"49051","full_name":"Witschen, Linus Matthias","last_name":"Witschen"},{"full_name":"Thombansen, Georg","last_name":"Thombansen","first_name":"Georg"},{"full_name":"Kraus, Florian","last_name":"Kraus","first_name":"Florian"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"date_created":"2020-02-11T07:48:56Z","publisher":"IEEE","date_updated":"2022-01-06T06:52:38Z","citation":{"apa":"Boschmann, A., Agne, A., Witschen, L. M., Thombansen, G., Kraus, F., &#38; Platzner, M. (2016). FPGA-based acceleration of high density myoelectric signal processing. In <i>2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. Mexiko City, Mexiko: IEEE. <a href=\"https://doi.org/10.1109/reconfig.2015.7393312\">https://doi.org/10.1109/reconfig.2015.7393312</a>","bibtex":"@inproceedings{Boschmann_Agne_Witschen_Thombansen_Kraus_Platzner_2016, title={FPGA-based acceleration of high density myoelectric signal processing}, DOI={<a href=\"https://doi.org/10.1109/reconfig.2015.7393312\">10.1109/reconfig.2015.7393312</a>}, booktitle={2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Boschmann, Alexander and Agne, Andreas and Witschen, Linus Matthias and Thombansen, Georg and Kraus, Florian and Platzner, Marco}, year={2016} }","mla":"Boschmann, Alexander, et al. “FPGA-Based Acceleration of High Density Myoelectric Signal Processing.” <i>2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, IEEE, 2016, doi:<a href=\"https://doi.org/10.1109/reconfig.2015.7393312\">10.1109/reconfig.2015.7393312</a>.","short":"A. Boschmann, A. Agne, L.M. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.","ama":"Boschmann A, Agne A, Witschen LM, Thombansen G, Kraus F, Platzner M. FPGA-based acceleration of high density myoelectric signal processing. In: <i>2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. IEEE; 2016. doi:<a href=\"https://doi.org/10.1109/reconfig.2015.7393312\">10.1109/reconfig.2015.7393312</a>","ieee":"A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in <i>2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, Mexiko City, Mexiko, 2016.","chicago":"Boschmann, Alexander, Andreas Agne, Linus Matthias Witschen, Georg Thombansen, Florian Kraus, and Marco Platzner. “FPGA-Based Acceleration of High Density Myoelectric Signal Processing.” In <i>2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. IEEE, 2016. <a href=\"https://doi.org/10.1109/reconfig.2015.7393312\">https://doi.org/10.1109/reconfig.2015.7393312</a>."},"year":"2016","publication_status":"published","publication_identifier":{"isbn":["9781467394062"]},"language":[{"iso":"eng"}],"keyword":["Electromyography","Feature extraction","Delays","Hardware  Pattern recognition","Prosthetics","High definition video"],"user_id":"49051","department":[{"_id":"78"}],"_id":"15873","status":"public","type":"conference","publication":"2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"}]