[{"year":"2024","citation":{"bibtex":"@article{Ahmed_Wiersema_Platzner_2024, title={Post-configuration Activation of Hardware Trojans in FPGAs}, DOI={<a href=\"https://doi.org/10.1007/s41635-024-00147-5\">10.1007/s41635-024-00147-5</a>}, journal={Journal of Hardware and Systems Security}, publisher={Springer Science and Business Media LLC}, author={Ahmed, Qazi Arbab and Wiersema, Tobias and Platzner, Marco}, year={2024} }","short":"Q.A. Ahmed, T. Wiersema, M. Platzner, Journal of Hardware and Systems Security (2024).","mla":"Ahmed, Qazi Arbab, et al. “Post-Configuration Activation of Hardware Trojans in FPGAs.” <i>Journal of Hardware and Systems Security</i>, Springer Science and Business Media LLC, 2024, doi:<a href=\"https://doi.org/10.1007/s41635-024-00147-5\">10.1007/s41635-024-00147-5</a>.","apa":"Ahmed, Q. A., Wiersema, T., &#38; Platzner, M. (2024). Post-configuration Activation of Hardware Trojans in FPGAs. <i>Journal of Hardware and Systems Security</i>. <a href=\"https://doi.org/10.1007/s41635-024-00147-5\">https://doi.org/10.1007/s41635-024-00147-5</a>","ama":"Ahmed QA, Wiersema T, Platzner M. Post-configuration Activation of Hardware Trojans in FPGAs. <i>Journal of Hardware and Systems Security</i>. Published online 2024. doi:<a href=\"https://doi.org/10.1007/s41635-024-00147-5\">10.1007/s41635-024-00147-5</a>","chicago":"Ahmed, Qazi Arbab, Tobias Wiersema, and Marco Platzner. “Post-Configuration Activation of Hardware Trojans in FPGAs.” <i>Journal of Hardware and Systems Security</i>, 2024. <a href=\"https://doi.org/10.1007/s41635-024-00147-5\">https://doi.org/10.1007/s41635-024-00147-5</a>.","ieee":"Q. A. Ahmed, T. Wiersema, and M. Platzner, “Post-configuration Activation of Hardware Trojans in FPGAs,” <i>Journal of Hardware and Systems Security</i>, 2024, doi: <a href=\"https://doi.org/10.1007/s41635-024-00147-5\">10.1007/s41635-024-00147-5</a>."},"publication_identifier":{"issn":["2509-3428","2509-3436"]},"publication_status":"published","title":"Post-configuration Activation of Hardware Trojans in FPGAs","doi":"10.1007/s41635-024-00147-5","publisher":"Springer Science and Business Media LLC","date_updated":"2024-03-20T12:31:36Z","author":[{"first_name":"Qazi Arbab","last_name":"Ahmed","orcid":"0000-0002-1837-2254","id":"72764","full_name":"Ahmed, Qazi Arbab"},{"last_name":"Wiersema","full_name":"Wiersema, Tobias","id":"3118","first_name":"Tobias"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"date_created":"2024-03-20T12:24:50Z","status":"public","publication":"Journal of Hardware and Systems Security","type":"journal_article","keyword":["General Engineering","Energy Engineering and Power Technology"],"language":[{"iso":"eng"}],"_id":"52686","department":[{"_id":"78"}],"user_id":"72764"},{"type":"conference","publication":"The 24th International Symposium on Quality Electronic Design (ISQED'23), San Francisco, Califorina USA","file":[{"relation":"main_file","content_type":"application/pdf","access_level":"open_access","file_id":"44196","file_name":"s4Bp4-041.pdf","file_size":614626,"date_created":"2023-04-26T13:03:54Z","creator":"qazi","date_updated":"2023-05-10T13:52:14Z"}],"status":"public","project":[{"_id":"3","name":"SFB 901 - B: SFB 901 - Project Area B"},{"_id":"12","name":"SFB 901 - B4: SFB 901 - Subproject B4"},{"_id":"1","name":"SFB 901: SFB 901"}],"_id":"44194","user_id":"72764","department":[{"_id":"78"}],"ddc":["620"],"file_date_updated":"2023-05-10T13:52:14Z","language":[{"iso":"eng"}],"has_accepted_license":"1","year":"2023","citation":{"ama":"Ahmed QA, Awais M, Platzner M. MAAS: Hiding Trojans in Approximate Circuits. In: <i>The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA</i>. ; 2023.","ieee":"Q. A. Ahmed, M. Awais, and M. Platzner, “MAAS: Hiding Trojans in Approximate Circuits,” presented at the The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA, 2023.","chicago":"Ahmed, Qazi Arbab, Muhammad Awais, and Marco Platzner. “MAAS: Hiding Trojans in Approximate Circuits.” In <i>The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA</i>, 2023.","apa":"Ahmed, Q. A., Awais, M., &#38; Platzner, M. (2023). MAAS: Hiding Trojans in Approximate Circuits. <i>The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA</i>. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA.","short":"Q.A. Ahmed, M. Awais, M. Platzner, in: The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA, 2023.","mla":"Ahmed, Qazi Arbab, et al. “MAAS: Hiding Trojans in Approximate Circuits.” <i>The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA</i>, 2023.","bibtex":"@inproceedings{Ahmed_Awais_Platzner_2023, title={MAAS: Hiding Trojans in Approximate Circuits}, booktitle={The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA}, author={Ahmed, Qazi Arbab and Awais, Muhammad and Platzner, Marco}, year={2023} }"},"date_updated":"2023-05-10T13:52:14Z","oa":"1","date_created":"2023-04-26T13:04:56Z","author":[{"id":"72764","full_name":"Ahmed, Qazi Arbab","last_name":"Ahmed","orcid":"0000-0002-1837-2254","first_name":"Qazi Arbab"},{"first_name":"Muhammad","last_name":"Awais","full_name":"Awais, Muhammad"},{"last_name":"Platzner","id":"398","full_name":"Platzner, Marco","first_name":"Marco"}],"title":"MAAS: Hiding Trojans in Approximate Circuits","conference":{"name":"The 24th International Symposium on Quality Electronic Design (ISQED'23)","start_date":"2023-04-05","end_date":"2023-04-07","location":"San Fransico CA 94023-0607, USA"}},{"publication_status":"published","has_accepted_license":"1","citation":{"ieee":"Q. A. Ahmed, <i>Hardware Trojans in Reconfigurable Computing</i>. Paderborn:  Paderborn University, Paderborn, Germany, 2022.","chicago":"Ahmed, Qazi Arbab. <i>Hardware Trojans in Reconfigurable Computing</i>. Paderborn:  Paderborn University, Paderborn, Germany, 2022. <a href=\"https://doi.org/10.17619/UNIPB/1-1271\">https://doi.org/10.17619/UNIPB/1-1271</a>.","ama":"Ahmed QA. <i>Hardware Trojans in Reconfigurable Computing</i>.  Paderborn University, Paderborn, Germany; 2022. doi:<a href=\"https://doi.org/10.17619/UNIPB/1-1271\">10.17619/UNIPB/1-1271</a>","apa":"Ahmed, Q. A. (2022). <i>Hardware Trojans in Reconfigurable Computing</i>.  Paderborn University, Paderborn, Germany. <a href=\"https://doi.org/10.17619/UNIPB/1-1271\">https://doi.org/10.17619/UNIPB/1-1271</a>","bibtex":"@book{Ahmed_2022, place={Paderborn}, title={Hardware Trojans in Reconfigurable Computing}, DOI={<a href=\"https://doi.org/10.17619/UNIPB/1-1271\">10.17619/UNIPB/1-1271</a>}, publisher={ Paderborn University, Paderborn, Germany}, author={Ahmed, Qazi Arbab}, year={2022} }","short":"Q.A. Ahmed, Hardware Trojans in Reconfigurable Computing,  Paderborn University, Paderborn, Germany, Paderborn, 2022.","mla":"Ahmed, Qazi Arbab. <i>Hardware Trojans in Reconfigurable Computing</i>.  Paderborn University, Paderborn, Germany, 2022, doi:<a href=\"https://doi.org/10.17619/UNIPB/1-1271\">10.17619/UNIPB/1-1271</a>."},"place":"Paderborn","supervisor":[{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"author":[{"first_name":"Qazi Arbab","id":"72764","full_name":"Ahmed, Qazi Arbab","last_name":"Ahmed","orcid":"0000-0002-1837-2254"}],"date_updated":"2022-11-30T13:39:01Z","oa":"1","main_file_link":[{"open_access":"1","url":"\turn:nbn:de:hbz:466:2-40303"}],"doi":"10.17619/UNIPB/1-1271","type":"dissertation","status":"public","user_id":"477","department":[{"_id":"78"}],"project":[{"_id":"1","name":"SFB 901: SFB 901"},{"_id":"4","name":"SFB 901 - C: SFB 901 - Project Area C"},{"name":"SFB 901 - C2: SFB 901 - Subproject C2","_id":"14"}],"_id":"29769","year":"2022","date_created":"2022-02-07T14:02:36Z","publisher":" Paderborn University, Paderborn, Germany","title":"Hardware Trojans in Reconfigurable Computing","abstract":[{"lang":"eng","text":"Wettstreit zwischen der Entwicklung neuer Hardwaretrojaner und entsprechender Gegenmaßnahmen beschreiten Widersacher immer raffiniertere Wege um Schaltungsentwürfe zu infizieren und dabei selbst fortgeschrittene Test- und Verifikationsmethoden zu überlisten. Abgesehen von den konventionellen Methoden um einen Trojaner in eine Schaltung für ein Field-programmable Gate Array (FPGA) einzuschleusen, können auch die Entwurfswerkzeuge heimlich kompromittiert werden um einen Angreifer dabei zu unterstützen einen erfolgreichen Angriff durchzuführen, der zum Beispiel Fehlfunktionen oder ungewollte Informationsabflüsse bewirken kann. Diese Dissertation beschäftigt sich hauptsächlich mit den beiden Blickwinkeln auf Hardwaretrojaner in rekonfigurierbaren Systemen, einerseits der Perspektive des Verteidigers mit einer Methode zur Erkennung von Trojanern auf der Bitstromebene, und andererseits derjenigen des Angreifers mit einer neuartigen Angriffsmethode für FPGA Trojaner. Für die Verteidigung gegen den Trojaner ``Heimtückische LUT'' stellen wir die allererste erfolgreiche Gegenmaßnahme vor, die durch Verifikation mittels Proof-carrying Hardware (PCH) auf der Bitstromebene direkt vor der Konfiguration der Hardware angewendet werden kann, und präsentieren ein vollständiges Schema für den Entwurf und die Verifikation von Schaltungen für iCE40 FPGAs. Für die Gegenseite führen wir einen neuen Angriff ein, welcher bösartiges Routing im eingefügten Trojaner ausnutzt um selbst im fertigen Bitstrom in einem inaktiven Zustand zu verbleiben: Hierdurch kann dieser neuartige Angriff zur Zeit weder von herkömmlichen Test- und Verifikationsmethoden, noch von unserer vorher vorgestellten Verifikation auf der Bitstromebene entdeckt werden."},{"lang":"eng","text":"The battle of developing hardware Trojans and corresponding countermeasures has taken adversaries towards ingenious ways of compromising hardware designs by circumventing even advanced testing and verification methods. Besides conventional methods of inserting Trojans into a design by a malicious entity, the design flow for field-programmable gate arrays (FPGAs) can also be surreptitiously compromised to assist the attacker to perform a successful malfunctioning or information leakage attack. This thesis mainly focuses on the two aspects of hardware Trojans in reconfigurable systems, the defenders perspective which corresponds to the bitstream-level Trojan detection technique, and the attackers perspective which corresponds to a novel FPGA Trojan attack. From the defender's perspective, we introduce a first-ever successful pre-configuration countermeasure against the ``Malicious LUT''-hardware Trojan, by employing bitstream-level Proof-Carrying Hardware (PCH) and present the complete design-and-verification flow for iCE40 FPGAs. Likewise, from an attackers perspective, we present a novel attack that leverages malicious routing of the inserted Trojan circuit to acquire a dormant state even in the generated and transmitted bitstream. Since the Trojan is injected in a post-synthesis step and remains unconnected in the bitstream, the presented attack can currently neither be prevented by conventional testing and verification methods nor by bitstream-level verification techniques."}],"language":[{"iso":"eng"}],"ddc":["004"],"keyword":["FPGA Security","Hardware Trojans","Bitstream-level Trojans","Bitstream Verification"]},{"citation":{"apa":"Ahmed, Q. A., &#38; Platzner, M. (2022). <i>On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs</i>. IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus.","mla":"Ahmed, Qazi Arbab, and Marco Platzner. <i>On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs</i>. IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), 2022.","bibtex":"@inproceedings{Ahmed_Platzner_2022, place={Pafos, Cyprus}, title={On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs}, publisher={IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022)}, author={Ahmed, Qazi Arbab and Platzner, Marco}, year={2022} }","short":"Q.A. Ahmed, M. Platzner, in: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), Pafos, Cyprus, 2022.","chicago":"Ahmed, Qazi Arbab, and Marco Platzner. “On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs.” Pafos, Cyprus: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), 2022.","ieee":"Q. A. Ahmed and M. Platzner, “On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs,” presented at the IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus, 2022.","ama":"Ahmed QA, Platzner M. On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022); 2022."},"year":"2022","place":"Pafos, Cyprus","conference":{"end_date":"July 6, 2022","location":"Pafos, Cyprus","name":"IEEE Computer Society Annual Symposium on VLSI Aliathon Resort,","start_date":" July 4, 2022"},"title":"On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs","author":[{"last_name":"Ahmed","orcid":"0000-0002-1837-2254","full_name":"Ahmed, Qazi Arbab","id":"72764","first_name":"Qazi Arbab"},{"last_name":"Platzner","full_name":"Platzner, Marco","id":"398","first_name":"Marco"}],"date_created":"2022-07-12T19:56:48Z","publisher":"IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022)","date_updated":"2023-04-19T15:04:30Z","status":"public","type":"conference","language":[{"iso":"eng"}],"user_id":"72764","department":[{"_id":"78"}],"project":[{"name":"SFB 901: SFB 901","_id":"1"},{"_id":"3","name":"SFB 901 - B: SFB 901 - Project Area B"},{"_id":"12","name":"SFB 901 - B4: SFB 901 - Subproject B4"}],"_id":"32342"},{"date_created":"2021-12-30T00:02:24Z","author":[{"first_name":"Qazi Arbab","orcid":"0000-0002-1837-2254","last_name":"Ahmed","id":"72764","full_name":"Ahmed, Qazi Arbab"}],"date_updated":"2023-04-19T15:03:45Z","doi":"10.1109/vlsi-soc53125.2021.9606974","title":"Hardware Trojans in Reconfigurable Computing","publication_status":"published","citation":{"short":"Q.A. Ahmed, in: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021.","bibtex":"@inproceedings{Ahmed_2021, title={Hardware Trojans in Reconfigurable Computing}, DOI={<a href=\"https://doi.org/10.1109/vlsi-soc53125.2021.9606974\">10.1109/vlsi-soc53125.2021.9606974</a>}, booktitle={2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)}, author={Ahmed, Qazi Arbab}, year={2021} }","mla":"Ahmed, Qazi Arbab. “Hardware Trojans in Reconfigurable Computing.” <i>2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)</i>, 2021, doi:<a href=\"https://doi.org/10.1109/vlsi-soc53125.2021.9606974\">10.1109/vlsi-soc53125.2021.9606974</a>.","apa":"Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. <i>2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)</i>. <a href=\"https://doi.org/10.1109/vlsi-soc53125.2021.9606974\">https://doi.org/10.1109/vlsi-soc53125.2021.9606974</a>","ama":"Ahmed QA. Hardware Trojans in Reconfigurable Computing. In: <i>2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)</i>. ; 2021. doi:<a href=\"https://doi.org/10.1109/vlsi-soc53125.2021.9606974\">10.1109/vlsi-soc53125.2021.9606974</a>","chicago":"Ahmed, Qazi Arbab. “Hardware Trojans in Reconfigurable Computing.” In <i>2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)</i>, 2021. <a href=\"https://doi.org/10.1109/vlsi-soc53125.2021.9606974\">https://doi.org/10.1109/vlsi-soc53125.2021.9606974</a>.","ieee":"Q. A. Ahmed, “Hardware Trojans in Reconfigurable Computing,” 2021, doi: <a href=\"https://doi.org/10.1109/vlsi-soc53125.2021.9606974\">10.1109/vlsi-soc53125.2021.9606974</a>."},"year":"2021","department":[{"_id":"78"}],"user_id":"72764","_id":"29138","project":[{"_id":"3","name":"SFB 901 - B: SFB 901 - Project Area B"},{"name":"SFB 901 - B4: SFB 901 - Subproject B4","_id":"12"},{"name":"SFB 901: SFB 901","_id":"1"}],"language":[{"iso":"eng"}],"publication":"2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)","type":"conference","status":"public"},{"title":"Malicious Routing: Circumventing Bitstream-level Verification for FPGAs","publisher":"2021 Design, Automation and Test in Europe Conference (DATE)","date_created":"2020-12-07T14:03:00Z","year":"2021","ddc":["006"],"language":[{"iso":"eng"}],"abstract":[{"text":"The battle of developing hardware Trojans and corresponding countermeasures has taken adversaries towards ingenious ways of compromising hardware designs by circumventing even advanced testing and verification methods. Besides conventional methods of inserting Trojans into a design by a malicious entity, the design flow for field-programmable gate arrays (FPGAs) can also be surreptitiously compromised to assist the attacker to perform a successful malfunctioning or information leakage attack. The advanced stealthy malicious look-up-table (LUT) attack activates a Trojan only when generating the FPGA bitstream and can thus not be detected by register transfer and gate level testing and verification. However, also this attack was recently revealed by a bitstream-level proof-carrying hardware (PCH) approach. In this paper, we present a novel attack that leverages malicious routing of the inserted Trojan circuit to acquire a dormant state even in the generated and transmitted bitstream. The Trojan's payload is connected to primary inputs/outputs of the FPGA via a programmable interconnect point (PIP). The Trojan is detached from inputs/outputs during place-and-route and re-connected only when the FPGA is being programmed, thus activating the Trojan circuit without any need for a trigger logic. Since the Trojan is injected in a post-synthesis step and remains unconnected in the bitstream, the presented attack can currently neither be prevented by conventional testing and verification methods nor by recent bitstream-level verification techniques.","lang":"eng"}],"file":[{"date_updated":"2023-05-11T09:16:15Z","date_created":"2023-05-11T09:16:15Z","creator":"qazi","file_size":394011,"access_level":"closed","file_name":"1812.pdf","file_id":"44752","content_type":"application/pdf","success":1,"relation":"main_file"}],"publication":"2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)","main_file_link":[{"open_access":"1"}],"doi":"10.23919/DATE51398.2021.9474026","conference":{"end_date":"2021-02-05","location":"Alpexpo | Grenoble, France","name":"Design, Automation and Test in Europe Conference (DATE'21)","start_date":"2021-02-01"},"date_updated":"2023-05-11T09:16:34Z","oa":"1","author":[{"first_name":"Qazi Arbab","id":"72764","full_name":"Ahmed, Qazi Arbab","orcid":"0000-0002-1837-2254","last_name":"Ahmed"},{"full_name":"Wiersema, Tobias","id":"3118","last_name":"Wiersema","first_name":"Tobias"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"place":"Alpexpo | Grenoble, France","citation":{"apa":"Ahmed, Q. A., Wiersema, T., &#38; Platzner, M. (2021). Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. <i>2021 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>. Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France. <a href=\"https://doi.org/10.23919/DATE51398.2021.9474026\">https://doi.org/10.23919/DATE51398.2021.9474026</a>","short":"Q.A. Ahmed, T. Wiersema, M. Platzner, in: 2021 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE), 2021 Design, Automation and Test in Europe Conference (DATE), Alpexpo | Grenoble, France, 2021.","mla":"Ahmed, Qazi Arbab, et al. “Malicious Routing: Circumventing Bitstream-Level Verification for FPGAs.” <i>2021 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>, 2021 Design, Automation and Test in Europe Conference (DATE), 2021, doi:<a href=\"https://doi.org/10.23919/DATE51398.2021.9474026\">10.23919/DATE51398.2021.9474026</a>.","bibtex":"@inproceedings{Ahmed_Wiersema_Platzner_2021, place={Alpexpo | Grenoble, France}, title={Malicious Routing: Circumventing Bitstream-level Verification for FPGAs}, DOI={<a href=\"https://doi.org/10.23919/DATE51398.2021.9474026\">10.23919/DATE51398.2021.9474026</a>}, booktitle={2021 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)}, publisher={2021 Design, Automation and Test in Europe Conference (DATE)}, author={Ahmed, Qazi Arbab and Wiersema, Tobias and Platzner, Marco}, year={2021} }","ama":"Ahmed QA, Wiersema T, Platzner M. Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. In: <i>2021 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>. 2021 Design, Automation and Test in Europe Conference (DATE); 2021. doi:<a href=\"https://doi.org/10.23919/DATE51398.2021.9474026\">10.23919/DATE51398.2021.9474026</a>","ieee":"Q. A. Ahmed, T. Wiersema, and M. Platzner, “Malicious Routing: Circumventing Bitstream-level Verification for FPGAs,” presented at the Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France, 2021, doi: <a href=\"https://doi.org/10.23919/DATE51398.2021.9474026\">10.23919/DATE51398.2021.9474026</a>.","chicago":"Ahmed, Qazi Arbab, Tobias Wiersema, and Marco Platzner. “Malicious Routing: Circumventing Bitstream-Level Verification for FPGAs.” In <i>2021 Design, Automation &#38; Test in Europe Conference &#38; Exhibition (DATE)</i>. Alpexpo | Grenoble, France: 2021 Design, Automation and Test in Europe Conference (DATE), 2021. <a href=\"https://doi.org/10.23919/DATE51398.2021.9474026\">https://doi.org/10.23919/DATE51398.2021.9474026</a>."},"publication_status":"published","publication_identifier":{"eisbn":["978-3-9819263-5-4"]},"has_accepted_license":"1","file_date_updated":"2023-05-11T09:16:15Z","project":[{"name":"SFB 901 - Subproject B4","_id":"12"},{"name":"SFB 901 - Project Area B","_id":"3"},{"_id":"1","name":"SFB 901"}],"_id":"20681","user_id":"72764","department":[{"_id":"78"}],"status":"public","type":"conference"},{"year":"2019","title":"Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan","date_created":"2019-05-22T07:36:05Z","publisher":"Springer International Publishing","file":[{"success":1,"relation":"main_file","content_type":"application/pdf","file_size":661354,"file_id":"44749","file_name":"978-3-030-17227-5_10.pdf","access_level":"closed","date_updated":"2023-05-11T09:12:33Z","date_created":"2023-05-11T09:12:33Z","creator":"qazi"}],"abstract":[{"lang":"eng","text":"Reconfigurable hardware has received considerable attention as a platform that enables dynamic hardware updates and thus is able to adapt new configurations at runtime. However, due to their dynamic nature, e.g., field-programmable gate arrays (FPGA) are subject to a constant possibility of attacks, since each new configuration might be compromised. Trojans for reconfigurable hardware that evade state-of-the-art detection techniques and even formal verification, are thus a large threat to these devices. One such stealthy hardware Trojan, that is inserted and activated in two stages by compromised electronic design automation (EDA) tools, has recently been presented and shown to evade all forms of classical pre-configuration detection techniques. This paper presents a successful pre-configuration countermeasure against this ``Malicious Look-up-table (LUT)''-hardware Trojan, by employing bitstream-level Proof-Carrying Hardware (PCH). We show that the method is able to alert innocent module creators to infected EDA tools, and to prohibit malicious ones to sell infected modules to unsuspecting customers."}],"publication":"Applied Reconfigurable Computing","language":[{"iso":"eng"}],"ddc":["000"],"citation":{"apa":"Ahmed, Q. A., Wiersema, T., &#38; Platzner, M. (2019). Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In C. Hochberger, B. Nelson, A. Koch, R. Woods, &#38; P. Diniz (Eds.), <i>Applied Reconfigurable Computing</i> (Vol. 11444, pp. 127–136). Springer International Publishing. <a href=\"https://doi.org/10.1007/978-3-030-17227-5_10\">https://doi.org/10.1007/978-3-030-17227-5_10</a>","short":"Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.","mla":"Ahmed, Qazi Arbab, et al. “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan.” <i>Applied Reconfigurable Computing</i>, edited by Christian Hochberger et al., vol. 11444, Springer International Publishing, 2019, pp. 127–36, doi:<a href=\"https://doi.org/10.1007/978-3-030-17227-5_10\">10.1007/978-3-030-17227-5_10</a>.","bibtex":"@inproceedings{Ahmed_Wiersema_Platzner_2019, place={Cham}, series={Lecture Notes in Computer Science}, title={Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan}, volume={11444}, DOI={<a href=\"https://doi.org/10.1007/978-3-030-17227-5_10\">10.1007/978-3-030-17227-5_10</a>}, booktitle={Applied Reconfigurable Computing}, publisher={Springer International Publishing}, author={Ahmed, Qazi Arbab and Wiersema, Tobias and Platzner, Marco}, editor={Hochberger, Christian and Nelson, Brent and Koch, Andreas and Woods, Roger and Diniz, Pedro}, year={2019}, pages={127–136}, collection={Lecture Notes in Computer Science} }","ieee":"Q. A. Ahmed, T. Wiersema, and M. Platzner, “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan,” in <i>Applied Reconfigurable Computing</i>, Darmstadt, Germany, 2019, vol. 11444, pp. 127–136, doi: <a href=\"https://doi.org/10.1007/978-3-030-17227-5_10\">10.1007/978-3-030-17227-5_10</a>.","chicago":"Ahmed, Qazi Arbab, Tobias Wiersema, and Marco Platzner. “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan.” In <i>Applied Reconfigurable Computing</i>, edited by Christian Hochberger, Brent Nelson, Andreas Koch, Roger Woods, and Pedro Diniz, 11444:127–36. Lecture Notes in Computer Science. Cham: Springer International Publishing, 2019. <a href=\"https://doi.org/10.1007/978-3-030-17227-5_10\">https://doi.org/10.1007/978-3-030-17227-5_10</a>.","ama":"Ahmed QA, Wiersema T, Platzner M. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In: Hochberger C, Nelson B, Koch A, Woods R, Diniz P, eds. <i>Applied Reconfigurable Computing</i>. Vol 11444. Lecture Notes in Computer Science. Springer International Publishing; 2019:127-136. doi:<a href=\"https://doi.org/10.1007/978-3-030-17227-5_10\">10.1007/978-3-030-17227-5_10</a>"},"intvolume":"     11444","page":"127-136","place":"Cham","publication_status":"published","publication_identifier":{"isbn":["978-3-030-17227-5"]},"has_accepted_license":"1","main_file_link":[{"open_access":"1"}],"conference":{"end_date":"2019-04-11","location":"Darmstadt, Germany","name":"15th International Symposium on Applied Reconfigurable Computing (ARC 2019)","start_date":"2019-04-09"},"doi":"10.1007/978-3-030-17227-5_10","author":[{"id":"72764","full_name":"Ahmed, Qazi Arbab","last_name":"Ahmed","orcid":"0000-0002-1837-2254","first_name":"Qazi Arbab"},{"last_name":"Wiersema","full_name":"Wiersema, Tobias","id":"3118","first_name":"Tobias"},{"first_name":"Marco","id":"398","full_name":"Platzner, Marco","last_name":"Platzner"}],"volume":11444,"oa":"1","date_updated":"2023-05-15T08:13:37Z","status":"public","editor":[{"first_name":"Christian","full_name":"Hochberger, Christian","last_name":"Hochberger"},{"last_name":"Nelson","full_name":"Nelson, Brent","first_name":"Brent"},{"first_name":"Andreas","full_name":"Koch, Andreas","last_name":"Koch"},{"first_name":"Roger","last_name":"Woods","full_name":"Woods, Roger"},{"full_name":"Diniz, Pedro","last_name":"Diniz","first_name":"Pedro"}],"type":"conference","file_date_updated":"2023-05-11T09:12:33Z","series_title":"Lecture Notes in Computer Science","user_id":"72764","department":[{"_id":"78"}],"project":[{"name":"SFB 901 - Subproject B4","_id":"12"},{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Project Area B","_id":"3"}],"_id":"9913"}]