---
_id: '29540'
abstract:
- lang: eng
  text: "Autonomous mobile robots are becoming increasingly more capable and widespread.
    Reliable Obstacle avoidance is an integral part of autonomous navigation. This
    involves real time interpretation and processing of a complex environment. Strict
    time and energy constraints of a mobile autonomous system make efficient computation
    extremely desirable. The benefits of employing Hardware/Software co-designed applications
    are obvious and significant. Hardware accelerators are used for efficient processing
    of the algorithms by exploiting parallelism. FPGAs are a class of hardware accelerators,
    which\r\ncan contain hundreds of small execution units, and can be used for Hardware/Software
    co-designed application. However, there is a reluctance when it comes to adoption
    of these devices in well established application domains, such as Robotics, due
    to a steep learning curve needed for FPGA application design. ReconROS has successfully
    bridged the gap between robotic and FPGA application development, by providing
    an intuitive, common development platform for robotic application development
    for FPGA. It does so by integrating Robotics Operating System(ROS) which is an
    industry and academia standard for robotics application development, with ReconOS,
    an operating system for re-configurable hardware. In this thesis an obstacle avoidance
    system is designed and implemented for an autonomous vehicle using ReconROS. The
    objectives of the thesis is to demonstrate and explore ReconROS integration within
    the ROS ecosystem and explore the design process within ReconROS framework, and
    to demonstrate the effectiveness of Hardware Acceleration in Robotics, by analysing
    the resulting architectures for Latency and Power Consumption."
author:
- first_name: Muhammad Aamir
  full_name: Sheikh, Muhammad Aamir
  last_name: Sheikh
citation:
  ama: Sheikh MA. <i>Design and Implementation of a ReconROS-Based Obstacle Avoidance
    System</i>. Paderborn University; 2021.
  apa: Sheikh, M. A. (2021). <i>Design and Implementation of a ReconROS-based Obstacle
    Avoidance System</i>. Paderborn University.
  bibtex: '@book{Sheikh_2021, title={Design and Implementation of a ReconROS-based
    Obstacle Avoidance System}, publisher={Paderborn University}, author={Sheikh,
    Muhammad Aamir}, year={2021} }'
  chicago: Sheikh, Muhammad Aamir. <i>Design and Implementation of a ReconROS-Based
    Obstacle Avoidance System</i>. Paderborn University, 2021.
  ieee: M. A. Sheikh, <i>Design and Implementation of a ReconROS-based Obstacle Avoidance
    System</i>. Paderborn University, 2021.
  mla: Sheikh, Muhammad Aamir. <i>Design and Implementation of a ReconROS-Based Obstacle
    Avoidance System</i>. Paderborn University, 2021.
  short: M.A. Sheikh, Design and Implementation of a ReconROS-Based Obstacle Avoidance
    System, Paderborn University, 2021.
date_created: 2022-01-26T08:50:52Z
date_updated: 2022-01-28T08:30:46Z
department:
- _id: '78'
language:
- iso: eng
publisher: Paderborn University
status: public
supervisor:
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
- first_name: Christian
  full_name: Lienen, Christian
  id: '60323'
  last_name: Lienen
title: Design and Implementation of a ReconROS-based Obstacle Avoidance System
type: mastersthesis
user_id: '60323'
year: '2021'
...
---
_id: '21432'
abstract:
- lang: eng
  text: "Robots are becoming increasingly autonomous and more capable. Because of
    a limited portable energy budget by e.g. batteries, and more demanding algorithms,
    an efficient computation is of interest. Field Programmable Gate Arrays (FPGAs)
    for example can provide fast and efficient processing and the Robot Operating
    System (ROS) is a popular\r\nmiddleware used for robotic applications. The novel
    ReconROS combines version 2 of the Robot Operating System with ReconOS, a framework
    for integrating reconfigurable hardware. It provides a unified interface between
    software and hardware. ReconROS is evaluated in this thesis by implementing a
    Sobel filter as the video processing application, running on a Zynq-7000 series
    System on Chip. Timing measurements were taken of execution and transfer times
    and were compared to theoretical values. Designing the hardware implementation
    is done by C code using High Level Synthesis and with the interface and functionality
    provided by ReconROS. An important aspect is the publish/subscribe mechanism of
    ROS. The Operating System interface functions for publishing and subscribing are
    reasonably fast at below 10 ms for a 1 MB color VGA image. The main memory interface
    performs well at higher data sizes, crossing 100 MB/s at 20 kB and increasing
    to a maximum of around 150 MB/s. Furthermore, the hardware implementation introduces
    consistency to the execution times and performs twice as fast as the software
    implementation."
author:
- first_name: Luca-Sebastian
  full_name: Henke, Luca-Sebastian
  last_name: Henke
citation:
  ama: Henke L-S. <i>Evaluation of a ReconOS-ROS Combination Based on a Video Processing
    Application</i>.; 2020.
  apa: Henke, L.-S. (2020). <i>Evaluation of a ReconOS-ROS Combination based on a
    Video Processing Application</i>.
  bibtex: '@book{Henke_2020, title={Evaluation of a ReconOS-ROS Combination based
    on a Video Processing Application}, author={Henke, Luca-Sebastian}, year={2020}
    }'
  chicago: Henke, Luca-Sebastian. <i>Evaluation of a ReconOS-ROS Combination Based
    on a Video Processing Application</i>, 2020.
  ieee: L.-S. Henke, <i>Evaluation of a ReconOS-ROS Combination based on a Video Processing
    Application</i>. 2020.
  mla: Henke, Luca-Sebastian. <i>Evaluation of a ReconOS-ROS Combination Based on
    a Video Processing Application</i>. 2020.
  short: L.-S. Henke, Evaluation of a ReconOS-ROS Combination Based on a Video Processing
    Application, 2020.
date_created: 2021-03-10T07:07:01Z
date_updated: 2022-01-06T06:54:59Z
department:
- _id: '78'
language:
- iso: eng
status: public
supervisor:
- first_name: Christian
  full_name: Lienen, Christian
  id: '60323'
  last_name: Lienen
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
title: Evaluation of a ReconOS-ROS Combination based on a Video Processing Application
type: bachelorsthesis
user_id: '60323'
year: '2020'
...
---
_id: '21433'
abstract:
- lang: eng
  text: "Modern machine learning (ML) techniques continue to move into the embedded
    system space because traditional centralized compute resources do not suit certain
    application domains, for example in mobile or real-time environments. Google’s
    TensorFlow Lite (TFLite) framework supports this shift from cloud to edge computing
    and makes ML inference accessible on resource-constrained devices. While it offers
    the possibility to partially delegate computation to hardware accelerators, there
    is no such “delegate” available to utilize the promising characteristics of reconfigurable
    hardware.\r\nThis thesis incorporates modern platform FPGAs into TFLite by implementing
    a modular delegate framework, which allows accelerators within the programmable
    logic to take over the execution of neural network layers. To facilitate the necessary
    hardware/software codesign, the FPGA delegate is based on the operating system
    for reconfigurable\r\ncomputing (ReconOS), whose partial reconfiguration support
    enables the instantiation of model-tailored accelerator architectures. In the
    hardware back-end, a streaming-based prototype accelerator for the MobileNet model
    family showcases the working order of the platform, but falls short of the desired
    performance. Thus, it indicates the need for further exploration of alternative
    accelerator designs, which the delegate could automatically synthesize to meet
    a model’s demands."
author:
- first_name: Felix P.
  full_name: Jentzsch, Felix P.
  last_name: Jentzsch
citation:
  ama: Jentzsch FP. <i>Design and Implementation of a ReconOS-Based TensorFlow Lite
    Delegate Architecture</i>.; 2020.
  apa: Jentzsch, F. P. (2020). <i>Design and Implementation of a ReconOS-based TensorFlow
    Lite Delegate Architecture</i>.
  bibtex: '@book{Jentzsch_2020, title={Design and Implementation of a ReconOS-based
    TensorFlow Lite Delegate Architecture}, author={Jentzsch, Felix P.}, year={2020}
    }'
  chicago: Jentzsch, Felix P. <i>Design and Implementation of a ReconOS-Based TensorFlow
    Lite Delegate Architecture</i>, 2020.
  ieee: F. P. Jentzsch, <i>Design and Implementation of a ReconOS-based TensorFlow
    Lite Delegate Architecture</i>. 2020.
  mla: Jentzsch, Felix P. <i>Design and Implementation of a ReconOS-Based TensorFlow
    Lite Delegate Architecture</i>. 2020.
  short: F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite
    Delegate Architecture, 2020.
date_created: 2021-03-10T07:09:14Z
date_updated: 2023-07-09T17:12:52Z
department:
- _id: '78'
language:
- iso: eng
project:
- _id: '1'
  grant_number: '160364472'
  name: 'SFB 901: SFB 901: On-The-Fly Computing - Individualisierte IT-Dienstleistungen
    in dynamischen Märkten '
- _id: '82'
  name: 'SFB 901 - T: SFB 901 - Project Area T'
- _id: '83'
  name: 'SFB 901 - T1: SFB 901 -Subproject T1'
status: public
supervisor:
- first_name: Christian
  full_name: Lienen, Christian
  id: '60323'
  last_name: Lienen
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
- first_name: Christian
  full_name: Plessl, Christian
  id: '16153'
  last_name: Plessl
  orcid: 0000-0001-5728-9982
title: Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
type: mastersthesis
user_id: '398'
year: '2020'
...