@misc{19543, author = {{Eke, Norbert Otto}}, booktitle = {{Germanistik}}, number = {{H. 1/2}}, pages = {{515}}, title = {{{Margret Dietrich: Zur Humanisierung des Lebens. Theater und Kunst. Ausgewählte Vorträge. Hrsg. V. Elisabeth Großegger, Andrea Sommer-Mathis und Dorothea Weber. Wien: Verlag der Österreichischen Akademie der Wissenschaften, 2000}}}, volume = {{43}}, year = {{2002}}, } @inbook{19702, author = {{Büker, Petra}}, booktitle = {{Grundzüge der Literaturdidaktik}}, editor = {{Bogdal, Klaus-Michael and Korte, Hermann}}, pages = {{120--133}}, publisher = {{dtv}}, title = {{{Literaturunterricht in der Primar- und Orientierungsstufe}}}, year = {{2002}}, } @inproceedings{19727, author = {{Bonorden, Olaf and Meyer auf der Heide, Friedhelm and Wanka, Rolf}}, booktitle = {{Int. Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA)}}, pages = {{2202--2208}}, title = {{{Composition of Efficient Nested BSP Algorithms: Minimum Spanning Tree Computation as an Instructive Example}}}, year = {{2002}}, } @inproceedings{19850, author = {{Wanka, Rolf}}, booktitle = {{Proc. Workshop on Graph-Theoretic Concepts in Computer Science (WG)}}, isbn = {{9783540003311}}, issn = {{0302-9743}}, pages = {{413--420}}, title = {{{Any Load-Balancing Regimen for Evolving Tree Computations on Circulant Graphs Is Asymptotically Optimal}}}, doi = {{10.1007/3-540-36379-3_36}}, year = {{2002}}, } @inproceedings{19873, abstract = {{We present a new and easy to use framework for navigating through scenes of arbitrary complexity and topology. In the preprocessing, images for discrete viewpoints and viewing directions are rendered and stored on an external volume. During navigation each image can be displayed within a very short time by loading it from the volume. For acceleration, our prefetching strategy loads possibly needed images for the next few frames if the viewer takes a break. The measurements show that we achieve interactive frame rates, whereby the difference between the minimal and maximal display time is very small. Our system works well with scenes modelled by polygons, but also digital photos can easily be used for describing a 3D scene.}}, author = {{Klein, Jan and Krokowski, Jens and Cuntz, Nicolas}}, booktitle = {{Proc. of 4. GI-Informatiktage}}, pages = {{224--229}}, title = {{{Realtime Navigation in Highly Complex 3D-Scenes Using JPEG Compression}}}, year = {{2002}}, } @inproceedings{19926, abstract = {{Juli 2002}}, author = {{Büker, Petra}}, title = {{{Fremdverstehensförderung im Rahmen interkulturellen literarischen Lernens- zwei Fallstudien zur Rezeptionsforschung in der Grundschule. Kolloquiumsvortrag im Fach Germanistik der Universität Essen}}}, year = {{2002}}, } @inproceedings{2423, abstract = {{Wearable computers are embedded into the mobile environment of the human body. A design challenge for wearable systems is to combine the high performance required for tasks such as video decoding with low energy consumption required to maximize battery runtimes and the flexibility demanded by the dynamics of the environment and the applications. In this paper, we demonstrate that reconfigurable hardware technology is able to answer this challenge. We present the concept and the prototype implementation of an autonomous wearable unit with reconfigurable modules (WURM). We discuss two experiments that show the uses of reconfigurable hardware in WURM: ASICs-on-demand and adaptive interfaces. Finally, we develop and evaluate task placement techniques used in the operating system layer of WURM.}}, author = {{Plessl, Christian and Enzler, Rolf and Walder, Herbert and Beutel, Jan and Platzner, Marco and Thiele, Lothar}}, booktitle = {{Proc. Int. Symp. on Wearable Computers (ISWC)}}, isbn = {{0-7695-1816-8}}, keywords = {{wearable computing}}, pages = {{215--222}}, publisher = {{IEEE Computer Society}}, title = {{{Reconfigurable Hardware in Wearable Computing Nodes}}}, doi = {{10.1109/ISWC.2002.1167250}}, year = {{2002}}, } @inproceedings{2424, abstract = {{ Recent generations of high-density and high-speed FPGAs provide a sufficient capacity for implementing complete configurable systems on a chip (CSoCs). Hybrid CPUs that combine standard CPU cores with reconfigurable coprocessors are an important subclass of CSoCs. With partially reconfigurable FPGAs, coprocessors can be loaded on demand while the CPU remains running. However, the lack of high-level design tools for partial reconfiguration makes practical implementations a challenging task. In this paper, we introduce a design flow to implement hybrid processors on Xilinx Virtex. The design flow is based on two techniques, virtual sockets and feed-through components, and can efficiently generate partial configurations from industry-quality cores. We discuss the design flow and present a fully operational audio streaming prototype to demonstrate its feasibility. }}, author = {{Dyer, Matthias and Plessl, Christian and Platzner, Marco}}, booktitle = {{Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}}, keywords = {{partial reconfiguration}}, pages = {{292--301}}, publisher = {{Springer}}, title = {{{Partially Reconfigurable Cores for Xilinx Virtex}}}, doi = {{10.1007/3-540-46117-5}}, volume = {{2438}}, year = {{2002}}, } @inproceedings{2425, abstract = {{ We present instance-specific custom computing machines for the set covering problem. Four accelerator architectures are developed that implement branch \& bound in 3-valued logic and many of the deduction techniques found in software solvers. We use set covering benchmarks from two-level logic minimization and Steiner triple systems to derive and discuss experimental results. The resulting raw speedups are in the order of four magnitudes on average. Finally, we propose a hybrid solver architecture that combines the raw speed of instance-specific reconfigurable hardware with flexible bounding schemes implemented in software. }}, author = {{Plessl, Christian and Platzner, Marco}}, booktitle = {{Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM)}}, pages = {{163--172}}, publisher = {{IEEE Computer Society}}, title = {{{Custom Computing Machines for the Set Covering Problem}}}, doi = {{10.1109/FPGA.2002.1106671}}, year = {{2002}}, } @inproceedings{2426, author = {{P. Miller, Barton and Labarta, Jesús and Schintke, Florian and Simon, Jens}}, booktitle = {{Proc. European Conf. on Parallel Processing (Euro-Par)}}, isbn = {{978-3-540-45706-0}}, pages = {{131}}, publisher = {{Springer}}, title = {{{Performance Evaluation, Analysis and Optimization}}}, doi = {{10.1007/3-540-45706-2_15}}, volume = {{2400}}, year = {{2002}}, }