TY - GEN AU - Schremmer, Alexander ID - 658 TI - Function Specification Inference Using Craig Interpolation ER - TY - GEN AU - Liske, Gennadij ID - 659 TI - Fault attacks in pairing-based cryptography ER - TY - GEN AU - Peuster, Manuel ID - 660 TI - Defining and Deploying Complex Applicances in Multi-Site Cloud Environments ER - TY - GEN AU - Arifulina, Svetlana ID - 661 TI - Coverage Criteria for Testing DMM Specifications ER - TY - CONF AB - We present Corona, a deterministic self-stabilizing algorithm for skip list construction in structured overlay networks. Corona operates in the low-atomicity message-passing asynchronous system model. Corona requires constant process memory space for its operation and, therefore, scales well. We prove the general necessary conditions limiting the initial states from which a self-stabilizing structured overlay network in message-passing system can be constructed. The conditions require that initial state information has to form a weakly connected graph and it should only contain identiers that are present in the system. We formally describe Corona and rigorously prove that it stabilizes from an arbitrary initial state subject to the necessary conditions. We extend Corona to construct a skip graph. AU - Nesterenko, Mikhail AU - Mohd, Rizal AU - Scheideler, Christian ID - 662 T2 - Proceedings of the 13th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS) TI - Corona: A Stabilizing Deterministic Message-Passing Skip List ER - TY - GEN AU - Swierkot, Kamil ID - 663 TI - Complexity Classes for Local Computation ER - TY - CONF AB - Web Computing is a variant of parallel computing where the idle times of PCs donated by worldwide distributed users are employed to execute parallel programs. The PUB-Web library developed by us supports this kind of usage of computing resources. A major problem for the efficient execution of such parallel programs is load balancing. In the Web Computing context, this problem becomes more difficult because of the dynamic behavior of the underlying "parallel computer": the set of available processors (donated PCs) as well as their availability (idle times) change over time in an unpredictable fashion.In this paper, we experimentally evaluate and compare load balancing algorithms in this scenario, namely a variant of the well-established Work Stealing algorithm and strategies based on a heterogeneous version of distributed hash-tables (DHHTs) introduced recently. In order to run a meaningful experimental evaluation, we employ, in addition to our Web Computing library PUB-Web, realistic data sets for the job input streams and for the dynamics of the availability of the resources.Our experimental evaluations suggest that Work Stealing is the better strategy if the number of processes ready to run matches the number of available processors. But a suitable variant of DHHTs outperforms Work Stealing if there are significantly more processes ready to run than available processors. AU - Gehweiler, Joachim AU - Kling, Peter AU - Meyer auf der Heide, Friedhelm ID - 664 T2 - Proceedings of the 9th International Conference on Parallel Processing and Applied Mathematics (PPAM) TI - An Experimental Comparison of Load Balancing Strategies in a Web Computing Environment ER - TY - GEN AU - Wette, Philip ID - 665 TI - Adaptives Loadbalancing für strukturierte Peer-to-Peer-Netzwerke am Beispiel von Chord ER - TY - CONF AB - Reconfigurable systems on chip are increasingly deployed in security and safety critical contexts. When downloading and configuring new hardware functions, we want to make sure that modules adhere to certain security specifications and do not, for example, contain hardware Trojans. As a possible approach to achieving hardware security we propose and demonstrate the concept of proof-carrying hardware, a concept inspired by previous work on proof-carrying code techniques in the software domain. In this paper, we discuss the hardware trust and threat models behind proof-carrying hardware and then present our experimental setup. We detail the employed open-source tool chain for the runtime verification of combinational equivalence and our bitstream format for an abstract FPGA architecture that allows us to experimentally validate the feasibility of our approach. AU - Drzevitzky, Stephanie AU - Platzner, Marco ID - 666 T2 - Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) TI - Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach ER - TY - GEN ED - Meyer auf der Heide, Friedhelm ED - Rajaraman, Rajmohan ID - 667 TI - 23rd Annual ACM Symposium on Parallelism in Algorithms and Architectures ER -