[{"place":"Berlin","user_id":"14932","title":"Autonom tötende Maschinen","publisher":"trafo Verlag","author":[{"last_name":"Weber","id":"31494","first_name":"Jutta","full_name":"Weber, Jutta"}],"department":[{"_id":"411"}],"publication":"Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft","status":"public","date_created":"2023-01-16T09:46:03Z","editor":[{"last_name":"Bung","first_name":"Jochen","full_name":"Bung, Jochen"},{"last_name":"Gruber","full_name":"Gruber, Malte","first_name":"Malte"},{"first_name":"Sascha","full_name":"Ziemann, Sascha","last_name":"Ziemann"}],"volume":12,"_id":"36891","date_updated":"2023-01-16T09:46:30Z","intvolume":" 12","series_title":"Beiträge zur Rechts-, Gesellschafts- und Kulturkritik","language":[{"iso":"ger"}],"year":"2014","citation":{"bibtex":"@inbook{Weber_2014, place={Berlin}, series={Beiträge zur Rechts-, Gesellschafts- und Kulturkritik}, title={Autonom tötende Maschinen}, volume={12}, booktitle={Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft}, publisher={trafo Verlag}, author={Weber, Jutta}, editor={Bung, Jochen and Gruber, Malte and Ziemann, Sascha}, year={2014}, pages={267–289}, collection={Beiträge zur Rechts-, Gesellschafts- und Kulturkritik} }","mla":"Weber, Jutta. “Autonom tötende Maschinen.” Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft, edited by Jochen Bung et al., vol. 12, trafo Verlag, 2014, pp. 267–89.","chicago":"Weber, Jutta. “Autonom tötende Maschinen.” In Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft, edited by Jochen Bung, Malte Gruber, and Sascha Ziemann, 12:267–89. Beiträge zur Rechts-, Gesellschafts- und Kulturkritik. Berlin: trafo Verlag, 2014.","apa":"Weber, J. (2014). Autonom tötende Maschinen. In J. Bung, M. Gruber, & S. Ziemann (Eds.), Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft (Vol. 12, pp. 267–289). trafo Verlag.","ama":"Weber J. Autonom tötende Maschinen. In: Bung J, Gruber M, Ziemann S, eds. Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft. Vol 12. Beiträge zur Rechts-, Gesellschafts- und Kulturkritik. trafo Verlag; 2014:267-289.","ieee":"J. Weber, “Autonom tötende Maschinen,” in Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft, vol. 12, J. Bung, M. Gruber, and S. Ziemann, Eds. Berlin: trafo Verlag, 2014, pp. 267–289.","short":"J. Weber, in: J. Bung, M. Gruber, S. Ziemann (Eds.), Autonome Automaten. Künstliche Körper und artifizielle Agenten in der technisierten Gesellschaft, trafo Verlag, Berlin, 2014, pp. 267–289."},"type":"book_chapter","page":"267-289"},{"date_updated":"2023-01-16T11:29:24Z","_id":"25120","conference":{"location":"Greece, Sep. 2014, IEEE"},"language":[{"iso":"eng"}],"type":"conference","citation":{"ieee":"F. Mischkalla and W. Müller, “Architectural Low-Power Design Using Transaction-Based System Simulation,” Greece, Sep. 2014, IEEE, 2014.","short":"F. Mischkalla, W. Müller, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, 2014.","bibtex":"@inproceedings{Mischkalla_Müller_2014, title={Architectural Low-Power Design Using Transaction-Based System Simulation}, booktitle={Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)}, publisher={IEEE}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2014} }","mla":"Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design Using Transaction-Based System Simulation.” Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), IEEE, 2014.","chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Architectural Low-Power Design Using Transaction-Based System Simulation.” In Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE, 2014.","ama":"Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014.","apa":"Mischkalla, F., & Müller, W. (2014). Architectural Low-Power Design Using Transaction-Based System Simulation. Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)."},"year":"2014","user_id":"5786","title":"Architectural Low-Power Design Using Transaction-Based System Simulation","author":[{"first_name":"Fabian","full_name":"Mischkalla, Fabian","last_name":"Mischkalla"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","last_name":"Müller","id":"16243"}],"publisher":"IEEE","department":[{"_id":"58"}],"publication":"Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)","status":"public","date_created":"2021-09-29T12:06:12Z"},{"_id":"25146","date_updated":"2023-01-16T11:36:02Z","language":[{"iso":"eng"}],"type":"conference","citation":{"short":"M. tech. M.M. Joy, W. Müller, F.-J. Rammig, in: 12th IEEE International Conference on Embedded Computing, 2014.","ieee":"M. tech. M. M. Joy, W. Müller, and F.-J. Rammig, “Source code annotated memory leak detection for soft real time embedded systems with resource constraints,” 2014.","apa":"Joy, M. tech. M. M., Müller, W., & Rammig, F.-J. (2014). Source code annotated memory leak detection for soft real time embedded systems with resource constraints. 12th IEEE International Conference on Embedded Computing.","ama":"Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection for soft real time embedded systems with resource constraints. In: 12th IEEE International Conference on Embedded Computing. ; 2014.","chicago":"Joy, M. tech. Mabel Mary, Wolfgang Müller, and Franz-Josef Rammig. “Source Code Annotated Memory Leak Detection for Soft Real Time Embedded Systems with Resource Constraints.” In 12th IEEE International Conference on Embedded Computing, 2014.","mla":"Joy, M. tech. Mabel Mary, et al. “Source Code Annotated Memory Leak Detection for Soft Real Time Embedded Systems with Resource Constraints.” 12th IEEE International Conference on Embedded Computing, 2014.","bibtex":"@inproceedings{Joy_Müller_Rammig_2014, title={Source code annotated memory leak detection for soft real time embedded systems with resource constraints}, booktitle={12th IEEE International conference on Embedded Computing}, author={Joy, M. tech. Mabel Mary and Müller, Wolfgang and Rammig, Franz-Josef}, year={2014} }"},"year":"2014","user_id":"5786","title":"Source code annotated memory leak detection for soft real time embedded systems with resource constraints","status":"public","date_created":"2021-09-30T07:18:43Z","author":[{"full_name":"Joy, M. tech. Mabel Mary","first_name":"M. tech. Mabel Mary","last_name":"Joy"},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"},{"last_name":"Rammig","full_name":"Rammig, Franz-Josef","first_name":"Franz-Josef"}],"publication":"12th IEEE International conference on Embedded Computing","department":[{"_id":"58"}]},{"_id":"25144","date_updated":"2023-01-16T11:28:39Z","language":[{"iso":"eng"}],"citation":{"short":"F. Mischkalla, W. Müller, in: PATMOS 2014, Palma de Mallorca, Spain, 2014.","ieee":"F. Mischkalla and W. Müller, “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation,” 2014.","ama":"Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. In: PATMOS 2014. ; 2014.","apa":"Mischkalla, F., & Müller, W. (2014). Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. PATMOS 2014.","chicago":"Mischkalla, Fabian, and Wolfgang Müller. “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation.” In PATMOS 2014. Palma de Mallorca, Spain, 2014.","mla":"Mischkalla, Fabian, and Wolfgang Müller. “Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation.” PATMOS 2014, 2014.","bibtex":"@inproceedings{Mischkalla_Müller_2014, place={Palma de Mallorca, Spain}, title={Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation}, booktitle={PATMOS 2014}, author={Mischkalla, Fabian and Müller, Wolfgang}, year={2014} }"},"type":"conference","year":"2014","place":"Palma de Mallorca, Spain","user_id":"5786","title":"Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation","author":[{"full_name":"Mischkalla, Fabian","first_name":"Fabian","last_name":"Mischkalla"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","last_name":"Müller","id":"16243"}],"department":[{"_id":"58"}],"publication":"PATMOS 2014","status":"public","date_created":"2021-09-30T07:13:17Z"},{"title":"Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems","user_id":"5786","abstract":[{"lang":"eng","text":"This paper presents an advanced eight levels spanning SystemC based virtual platform methodology and framework - referred to as HeroeS 3 - providing smooth application to platform mapping and continuous co-refinement of a virtual prototype with its physical environment model. For heterogeneity support, various SystemC extensions are combined covering continuous/discrete models of computation and different communication abstractions, such as analog mixed-signal models, abstract RTOS/HAL/middleware models, TLM bus models, and QEMU wrappers. We enable dependability assessment by Fault Effect Modeling (FEM) at the virtual prototype in order to avoid risking physical injury or damage. Also, simulation results are deterministic and can be evaluated interactively or offline. We apply FEM to both the physical environment model and the different abstractions of the virtual prototype. Currently, we focus on sensor failures and application control flow errors."}],"place":"Berlin","date_created":"2023-01-16T11:57:08Z","status":"public","keyword":["Computational modeling","Finite element analysis","Prototypes","Abstracts","Software","Fault tolerance","Fault tolerant systems"],"department":[{"_id":"58"}],"publisher":"IEEE","author":[{"last_name":"Becker","full_name":"Becker, Markus","first_name":"Markus"},{"full_name":"Kuznik, Christoph","first_name":"Christoph","last_name":"Kuznik"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","last_name":"Müller","id":"16243"}],"doi":"10.1109/ICCPS.2014.6843726","conference":{"location":"Berlin","name":"ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS)"},"date_updated":"2023-01-16T11:57:22Z","_id":"36918","citation":{"ieee":"M. Becker, C. Kuznik, and W. Müller, “Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems,” presented at the ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin, 2014, doi: 10.1109/ICCPS.2014.6843726.","short":"M. Becker, C. Kuznik, W. Müller, in: IEEE, Berlin, 2014.","bibtex":"@inproceedings{Becker_Kuznik_Müller_2014, place={Berlin}, title={Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems}, DOI={10.1109/ICCPS.2014.6843726}, publisher={IEEE}, author={Becker, Markus and Kuznik, Christoph and Müller, Wolfgang}, year={2014} }","mla":"Becker, Markus, et al. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. IEEE, 2014, doi:10.1109/ICCPS.2014.6843726.","ama":"Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:10.1109/ICCPS.2014.6843726","apa":"Becker, M., Kuznik, C., & Müller, W. (2014). Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS), Berlin. https://doi.org/10.1109/ICCPS.2014.6843726","chicago":"Becker, Markus, Christoph Kuznik, and Wolfgang Müller. “Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems.” Berlin: IEEE, 2014. https://doi.org/10.1109/ICCPS.2014.6843726."},"type":"conference","year":"2014","language":[{"iso":"eng"}]},{"year":"2014","type":"conference","citation":{"bibtex":"@inproceedings{Kuznik_Müller_Defo_2014, place={San Francisco, USA}, title={An Assisted Single Source Verification Metric Model Code Generation Methodology}, author={Kuznik, Christoph and Müller, Wolfgang and Defo, Gilles Bertrand}, year={2014} }","mla":"Kuznik, Christoph, et al. An Assisted Single Source Verification Metric Model Code Generation Methodology. 2014.","ama":"Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric Model Code Generation Methodology. In: ; 2014.","apa":"Kuznik, C., Müller, W., & Defo, G. B. (2014). An Assisted Single Source Verification Metric Model Code Generation Methodology. Proceedings of the Electronic System Level Synthesis Conference (ESLSyn).","chicago":"Kuznik, Christoph, Wolfgang Müller, and Gilles Bertrand Defo. “An Assisted Single Source Verification Metric Model Code Generation Methodology.” San Francisco, USA, 2014.","ieee":"C. Kuznik, W. Müller, and G. B. Defo, “An Assisted Single Source Verification Metric Model Code Generation Methodology,” presented at the Proceedings of the Electronic System Level Synthesis Conference (ESLSyn), 2014.","short":"C. Kuznik, W. Müller, G.B. Defo, in: San Francisco, USA, 2014."},"language":[{"iso":"eng"}],"conference":{"name":"Proceedings of the Electronic System Level Synthesis Conference (ESLSyn)"},"_id":"36917","date_updated":"2023-01-16T11:44:06Z","keyword":["System Design","Verification"],"department":[{"_id":"58"}],"author":[{"first_name":"Christoph","full_name":"Kuznik, Christoph","last_name":"Kuznik"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","last_name":"Müller","id":"16243"},{"last_name":"Defo","first_name":"Gilles Bertrand","full_name":"Defo, Gilles Bertrand"}],"date_created":"2023-01-16T11:43:50Z","status":"public","abstract":[{"lang":"eng","text":"The ever-increasing complexity of heterogeneous electronic systems demand for intensified abstraction and automation efforts to improve design, verification and validation productivity, especially in earlier phases of system engineering. Within the verification activity various metrics can be applied to determine functional correctness or the overall progress. Here, a supporting verification methodology defining high-level verification planning down to the actual metric code development is essential. Moreover, an advanced assistance for the designer, such as a tooling infrastructure to automatize and accelerate the metric code implementation, is needed to minimize the influence of errorprone manual coding. In this article we present a single-source verification metric code-generation methodology for improved coverage automation. We determine (i) a suitable metric model for model-based capture of verification metrics as well as (ii) an assisted model-based processing and generation flow of the verification environment and metric skeletons. We apply our method to a SystemC case-study, in doing so, targeting metric code implementation productivity and consistency enhancement."}],"place":"San Francisco, USA","title":"An Assisted Single Source Verification Metric Model Code Generation Methodology","user_id":"5786"},{"abstract":[{"lang":"eng","text":"Zur Sicherstellung hoher Zuverlässigkeits- und Fehlertoleranzwerte von Schaltungen und ganzen Systemen finden vermehrt Test- und Verifikationsmethoden Anwendung die einen virtuellen Prototypen (VP) des Systems bereits frühzeitig im Entwurfsablauf einem Stresstest unterziehen. Hierbei werden speziell für die Domäne relevante Fehlerinjektoren verwendet (Digital, Mixed-Signal, Mechanik) die anhand von Fehlermodellen geeignete Testfälle erzeugen und in das System über Stimuli bzw. direkt injizieren. Jede effektive Anwendung einer Methode bedingt jedoch auch das Vorhandensein einer zugrundeliegenden Methodik. In diesem Beitrag wird die System Verification Methodology (SVM) vorgestellt werden, eine universell einsetzbare und erweiterbare Infrastruktur zur Beschreibung von Testumgebungen auf Basis der SystemC Sprache und Simulationskernels."}],"title":"Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM","user_id":"5786","author":[{"last_name":"Kuznik","first_name":"Christoph","full_name":"Kuznik, Christoph"},{"last_name":"Müller","id":"16243","first_name":"Wolfgang","full_name":"Müller, Wolfgang"}],"publication":"26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen","department":[{"_id":"58"}],"status":"public","date_created":"2021-09-30T10:26:58Z","_id":"25166","date_updated":"2023-01-16T11:46:54Z","type":"conference","citation":{"ama":"Kuznik C, Müller W. Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. In: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. ; 2014.","apa":"Kuznik, C., & Müller, W. (2014). Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen.","chicago":"Kuznik, Christoph, and Wolfgang Müller. “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM.” In 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2014.","bibtex":"@inproceedings{Kuznik_Müller_2014, title={Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM}, booktitle={26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen}, author={Kuznik, Christoph and Müller, Wolfgang}, year={2014} }","mla":"Kuznik, Christoph, and Wolfgang Müller. “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM.” 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2014.","short":"C. Kuznik, W. Müller, in: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2014.","ieee":"C. Kuznik and W. Müller, “Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM,” 2014."},"year":"2014","language":[{"iso":"ger"}]},{"title":"Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung","user_id":"5786","status":"public","date_created":"2021-09-30T10:11:13Z","author":[{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"full_name":"Defo, Bertrand Gilles","first_name":"Bertrand Gilles","last_name":"Defo"},{"first_name":"Wolfgang","full_name":"Müller, Wolfgang","last_name":"Müller","id":"16243"}],"department":[{"_id":"58"}],"publication":"17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) ","_id":"25163","date_updated":"2023-01-16T11:45:51Z","year":"2014","citation":{"ieee":"C. Kuznik, B. G. Defo, and W. Müller, “Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung,” 2014.","short":"C. Kuznik, B.G. Defo, W. Müller, in: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) , 2014.","bibtex":"@inproceedings{Kuznik_Defo_Müller_2014, title={Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung}, booktitle={17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) }, author={Kuznik, Christoph and Defo, Bertrand Gilles and Müller, Wolfgang}, year={2014} }","mla":"Kuznik, Christoph, et al. “Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung.” 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) , 2014.","chicago":"Kuznik, Christoph, Bertrand Gilles Defo, and Wolfgang Müller. “Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung.” In 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) , 2014.","ama":"Kuznik C, Defo BG, Müller W. Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung. In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) . ; 2014.","apa":"Kuznik, C., Defo, B. G., & Müller, W. (2014). Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung. 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) ."},"type":"conference","language":[{"iso":"ger"}]},{"status":"public","date_created":"2021-09-30T08:05:38Z","author":[{"last_name":"Kuznik","full_name":"Kuznik, Christoph","first_name":"Christoph"},{"full_name":"Defo, Bertrand Gilles","first_name":"Bertrand Gilles","last_name":"Defo"},{"full_name":"Müller, Wolfgang","first_name":"Wolfgang","id":"16243","last_name":"Müller"}],"publication":"Electronic System Level Synthesis Conference (ESLSyn)","department":[{"_id":"58"}],"title":"An Assisted Single Source Verification Metric Model Code Generation Methodology","user_id":"5786","type":"journal_article","year":"2014","citation":{"chicago":"Kuznik, Christoph, Bertrand Gilles Defo, and Wolfgang Müller. “An Assisted Single Source Verification Metric Model Code Generation Methodology.” Electronic System Level Synthesis Conference (ESLSyn), 2014.","ama":"Kuznik C, Defo BG, Müller W. An Assisted Single Source Verification Metric Model Code Generation Methodology. Electronic System Level Synthesis Conference (ESLSyn). Published online 2014.","apa":"Kuznik, C., Defo, B. G., & Müller, W. (2014). An Assisted Single Source Verification Metric Model Code Generation Methodology. Electronic System Level Synthesis Conference (ESLSyn).","mla":"Kuznik, Christoph, et al. “An Assisted Single Source Verification Metric Model Code Generation Methodology.” Electronic System Level Synthesis Conference (ESLSyn), 2014.","bibtex":"@article{Kuznik_Defo_Müller_2014, title={An Assisted Single Source Verification Metric Model Code Generation Methodology}, journal={Electronic System Level Synthesis Conference (ESLSyn)}, author={Kuznik, Christoph and Defo, Bertrand Gilles and Müller, Wolfgang}, year={2014} }","short":"C. Kuznik, B.G. Defo, W. Müller, Electronic System Level Synthesis Conference (ESLSyn) (2014).","ieee":"C. Kuznik, B. G. Defo, and W. Müller, “An Assisted Single Source Verification Metric Model Code Generation Methodology,” Electronic System Level Synthesis Conference (ESLSyn), 2014."},"language":[{"iso":"eng"}],"_id":"25151","date_updated":"2023-01-16T11:44:46Z"},{"department":[{"_id":"635"},{"_id":"186"},{"_id":"551"}],"author":[{"last_name":"Florou","first_name":"Annita","full_name":"Florou, Annita"},{"first_name":"Urska","full_name":"Kosi, Urska","last_name":"Kosi","id":"54068"}],"date_created":"2023-01-17T13:20:21Z","status":"public","extern":"1","user_id":"88603","title":"Does mandatory IFRS adoption facilitate debt financing? ","language":[{"iso":"eng"}],"type":"conference","year":"2014","citation":{"bibtex":"@inproceedings{Florou_Kosi_2014, title={Does mandatory IFRS adoption facilitate debt financing? }, author={Florou, Annita and Kosi, Urska}, year={2014} }","mla":"Florou, Annita, and Urska Kosi. Does Mandatory IFRS Adoption Facilitate Debt Financing? . 2014.","ama":"Florou A, Kosi U. Does mandatory IFRS adoption facilitate debt financing? . In: ; 2014.","apa":"Florou, A., & Kosi, U. (2014). Does mandatory IFRS adoption facilitate debt financing? . DART Research Seminar, Graz, Austria.","chicago":"Florou, Annita, and Urska Kosi. “Does Mandatory IFRS Adoption Facilitate Debt Financing? ,” 2014.","ieee":"A. Florou and U. Kosi, “Does mandatory IFRS adoption facilitate debt financing? ,” presented at the DART Research Seminar, Graz, Austria, 2014.","short":"A. Florou, U. Kosi, in: 2014."},"conference":{"location":"Graz, Austria","name":"DART Research Seminar","start_date":"2014-03-03"},"_id":"37107","date_updated":"2023-01-17T13:36:58Z"}]