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Conf. on Evolvable Systems (ICES)","date_created":"2019-07-10T11:23:00Z","department":[{"_id":"78"}],"keyword":["Linux","cache storage","embedded systems","granular computing","multiprocessing systems","reconfigurable architectures","Leon3 SPARe processor","custom logic events","evolvable-self-adaptable processor cache","fine granular profiling","integer unit events","measurement infrastructure","microarchitectural events","multicore embedded system","perf_event standard Linux performance measurement interface","processor properties","run-time reconfigurable memory-to-cache address mapping engine","run-time reconfigurable multicore infrastructure","split-level caching","Field programmable gate arrays","Frequency locked loops","Irrigation","Phasor measurement units","Registers","Weaving"],"type":"conference"},{"author":[{"first_name":"Fabian","last_name":"König","full_name":"König, Fabian"}],"year":"2014","status":"public","title":"EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese","date_updated":"2022-01-06T06:50:49Z","language":[{"iso":"eng"}],"_id":"10679","publisher":"Paderborn University","user_id":"3118","supervisor":[{"full_name":"Boschmann, Alexander","first_name":"Alexander","last_name":"Boschmann"}],"citation":{"ieee":"F. König, <i>EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese</i>. Paderborn University, 2014.","apa":"König, F. (2014). <i>EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese</i>. Paderborn University.","short":"F. König, EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese, Paderborn University, 2014.","chicago":"König, Fabian. <i>EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese</i>. Paderborn University, 2014.","mla":"König, Fabian. <i>EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese</i>. Paderborn University, 2014.","bibtex":"@book{König_2014, title={EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese}, publisher={Paderborn University}, author={König, Fabian}, year={2014} }","ama":"König F. <i>EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese</i>. Paderborn University; 2014."},"date_created":"2019-07-10T11:23:20Z","department":[{"_id":"78"}],"type":"bachelorsthesis"},{"citation":{"mla":"Koch, Benjamin. <i>Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University, 2014.","apa":"Koch, B. (2014). <i>Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University.","ieee":"B. Koch, <i>Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University, 2014.","ama":"Koch B. <i>Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University; 2014.","short":"B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.","chicago":"Koch, Benjamin. <i>Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University, 2014.","bibtex":"@book{Koch_2014, title={Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA}, publisher={Paderborn University}, author={Koch, Benjamin}, year={2014} }"},"supervisor":[{"id":"398","full_name":"Platzner, Marco","first_name":"Marco","last_name":"Platzner"}],"date_created":"2019-07-10T11:38:27Z","department":[{"_id":"78"}],"type":"mastersthesis","author":[{"full_name":"Koch, Benjamin","first_name":"Benjamin","last_name":"Koch"}],"year":"2014","status":"public","title":"Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA","date_updated":"2022-01-06T06:50:50Z","language":[{"iso":"eng"}],"_id":"10701","publisher":"Paderborn University","user_id":"3118"},{"citation":{"bibtex":"@book{Mittendorf_2014, title={Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs}, publisher={Paderborn University}, author={Mittendorf, Robert}, year={2014} }","ama":"Mittendorf R. <i>Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs</i>. Paderborn University; 2014.","mla":"Mittendorf, Robert. <i>Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs</i>. Paderborn University, 2014.","short":"R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs, Paderborn University, 2014.","chicago":"Mittendorf, Robert. <i>Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs</i>. Paderborn University, 2014.","ieee":"R. Mittendorf, <i>Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs</i>. Paderborn University, 2014.","apa":"Mittendorf, R. (2014). <i>Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs</i>. Paderborn University."},"date_created":"2019-07-10T11:48:26Z","department":[{"_id":"78"}],"type":"mastersthesis","author":[{"first_name":"Robert","last_name":"Mittendorf","full_name":"Mittendorf, Robert"}],"year":"2014","status":"public","title":"Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs","date_updated":"2022-01-06T06:50:50Z","_id":"10715","language":[{"iso":"eng"}],"publisher":"Paderborn University","user_id":"3118"},{"date_updated":"2022-01-06T06:50:50Z","status":"public","title":"The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores","year":"2014","author":[{"full_name":"Rüthing, Christoph","first_name":"Christoph","last_name":"Rüthing"}],"user_id":"3118","language":[{"iso":"eng"}],"_id":"10732","publisher":"Paderborn University","citation":{"mla":"Rüthing, Christoph. <i>The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores</i>. Paderborn University, 2014.","ama":"Rüthing C. <i>The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores</i>. Paderborn University; 2014.","bibtex":"@book{Rüthing_2014, title={The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores}, publisher={Paderborn University}, author={Rüthing, Christoph}, year={2014} }","apa":"Rüthing, C. (2014). <i>The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores</i>. Paderborn University.","ieee":"C. Rüthing, <i>The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores</i>. Paderborn University, 2014.","short":"C. Rüthing, The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores, Paderborn University, 2014.","chicago":"Rüthing, Christoph. <i>The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores</i>. Paderborn University, 2014."},"type":"bachelorsthesis","department":[{"_id":"78"}],"date_created":"2019-07-10T11:58:05Z"},{"department":[{"_id":"78"}],"type":"dissertation","place":"Berlin","date_created":"2019-07-10T11:58:06Z","abstract":[{"lang":"eng","text":"Monte-Carlo Tree Search (MCTS) is a class of simulation-based search algorithms. It brought about great success in the past few years regarding the evaluation of deterministic two-player games such as the Asian board game Go.\r\n\r\nIn this thesis, we present a parallelization of the most popular MCTS variant for large HPC compute clusters that efficiently shares a single game tree representation in a distributed memory environment and scales up to 128 compute nodes and 2048 cores. It is hereby one of the most powerful MCTS parallelizations to date.\r\n\r\nIn order to measure the impact of our parallelization on the search quality and remain comparable to the most advanced MCTS implementations to date, we implemented it in a state-of-the-art Go engine Gomorra, making it competitive with the strongest Go programs in the world.\r\n\r\nWe further present an empirical comparison of different Bayesian ranking systems when being used for predicting expert moves for the game of Go and introduce a novel technique for automated detection and analysis of evaluation uncertainties that show up during MCTS searches."}],"supervisor":[{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"}],"citation":{"bibtex":"@book{Schäfers_2014, place={Berlin}, title={Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go}, publisher={Logos Verlag Berlin GmbH}, author={Schäfers, Lars}, year={2014} }","ama":"Schäfers L. <i>Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go</i>. Berlin: Logos Verlag Berlin GmbH; 2014.","mla":"Schäfers, Lars. <i>Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go</i>. Logos Verlag Berlin GmbH, 2014.","chicago":"Schäfers, Lars. <i>Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go</i>. Berlin: Logos Verlag Berlin GmbH, 2014.","short":"L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014.","ieee":"L. Schäfers, <i>Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go</i>. Berlin: Logos Verlag Berlin GmbH, 2014.","apa":"Schäfers, L. (2014). <i>Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go</i>. Berlin: Logos Verlag Berlin GmbH."},"user_id":"3118","language":[{"iso":"eng"}],"_id":"10733","publisher":"Logos Verlag Berlin GmbH","page":"133","date_updated":"2022-01-06T06:50:50Z","publication_status":"published","publication_identifier":{"isbn":["978-3-8325-3748-7"]},"author":[{"last_name":"Schäfers","first_name":"Lars","full_name":"Schäfers, Lars"}],"title":"Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go","status":"public","year":"2014"},{"user_id":"3118","_id":"10738","date_updated":"2022-01-06T06:50:50Z","year":"2014","status":"public","title":"Optimizing the Generator Start-up Sequence After a Power System Blackout","author":[{"first_name":"Cong","last_name":"Shen","full_name":"Shen, Cong"},{"first_name":"Paul","last_name":"Kaufmann","full_name":"Kaufmann, Paul"},{"last_name":"Braun","first_name":"Martin","full_name":"Braun, Martin"}],"type":"conference","department":[{"_id":"78"}],"date_created":"2019-07-10T11:59:36Z","publication":"IEEE Power and Energy Society General Meeting (IEEE GM)","citation":{"short":"C. Shen, P. Kaufmann, M. Braun, in: IEEE Power and Energy Society General Meeting (IEEE GM), 2014.","chicago":"Shen, Cong, Paul Kaufmann, and Martin Braun. “Optimizing the Generator Start-up Sequence After a Power System Blackout.” In <i>IEEE Power and Energy Society General Meeting (IEEE GM)</i>, 2014.","apa":"Shen, C., Kaufmann, P., &#38; Braun, M. (2014). Optimizing the Generator Start-up Sequence After a Power System Blackout. In <i>IEEE Power and Energy Society General Meeting (IEEE GM)</i>.","ieee":"C. Shen, P. Kaufmann, and M. Braun, “Optimizing the Generator Start-up Sequence After a Power System Blackout,” in <i>IEEE Power and Energy Society General Meeting (IEEE GM)</i>, 2014.","ama":"Shen C, Kaufmann P, Braun M. Optimizing the Generator Start-up Sequence After a Power System Blackout. In: <i>IEEE Power and Energy Society General Meeting (IEEE GM)</i>. ; 2014.","bibtex":"@inproceedings{Shen_Kaufmann_Braun_2014, title={Optimizing the Generator Start-up Sequence After a Power System Blackout}, booktitle={IEEE Power and Energy Society General Meeting (IEEE GM)}, author={Shen, Cong and Kaufmann, Paul and Braun, Martin}, year={2014} }","mla":"Shen, Cong, et al. “Optimizing the Generator Start-up Sequence After a Power System Blackout.” <i>IEEE Power and Energy Society General Meeting (IEEE GM)</i>, 2014."}},{"publisher":"IEEE","_id":"10739","user_id":"3118","author":[{"last_name":"Shen","first_name":"Cong","full_name":"Shen, Cong"},{"full_name":"Kaufmann, Paul","last_name":"Kaufmann","first_name":"Paul"},{"first_name":"Martin","last_name":"Braun","full_name":"Braun, Martin"}],"year":"2014","status":"public","title":"A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm","date_updated":"2022-01-06T06:50:50Z","date_created":"2019-07-10T11:59:37Z","department":[{"_id":"78"}],"type":"conference","citation":{"mla":"Shen, Cong, et al. “A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm.” <i>Power Systems Computation Conference (PSCC)</i>, IEEE, 2014.","ama":"Shen C, Kaufmann P, Braun M. A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm. In: <i>Power Systems Computation Conference (PSCC)</i>. IEEE; 2014.","bibtex":"@inproceedings{Shen_Kaufmann_Braun_2014, title={A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm}, booktitle={Power Systems Computation Conference (PSCC)}, publisher={IEEE}, author={Shen, Cong and Kaufmann, Paul and Braun, Martin}, year={2014} }","apa":"Shen, C., Kaufmann, P., &#38; Braun, M. (2014). A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm. In <i>Power Systems Computation Conference (PSCC)</i>. IEEE.","ieee":"C. Shen, P. Kaufmann, and M. Braun, “A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm,” in <i>Power Systems Computation Conference (PSCC)</i>, 2014.","short":"C. Shen, P. Kaufmann, M. Braun, in: Power Systems Computation Conference (PSCC), IEEE, 2014.","chicago":"Shen, Cong, Paul Kaufmann, and Martin Braun. “A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm.” In <i>Power Systems Computation Conference (PSCC)</i>. IEEE, 2014."},"publication":"Power Systems Computation Conference (PSCC)"},{"title":"Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA","status":"public","year":"2014","author":[{"full_name":"Surmund, Sebastian","last_name":"Surmund","first_name":"Sebastian"}],"date_updated":"2022-01-06T06:50:50Z","_id":"10744","publisher":"Paderborn University","language":[{"iso":"eng"}],"user_id":"3118","citation":{"bibtex":"@book{Surmund_2014, title={Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA}, publisher={Paderborn University}, author={Surmund, Sebastian}, year={2014} }","ama":"Surmund S. <i>Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University; 2014.","mla":"Surmund, Sebastian. <i>Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University, 2014.","short":"S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.","chicago":"Surmund, Sebastian. <i>Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University, 2014.","ieee":"S. Surmund, <i>Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University, 2014.","apa":"Surmund, S. (2014). <i>Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA</i>. Paderborn University."},"supervisor":[{"id":"398","last_name":"Platzner","first_name":"Marco","full_name":"Platzner, Marco"}],"date_created":"2019-07-10T12:00:45Z","type":"mastersthesis","department":[{"_id":"78"}]}]