[{"department":[{"_id":"66"}],"user_id":"11319","_id":"6967","language":[{"iso":"eng"}],"publication":"Software & Systems Modeling","type":"journal_article","status":"public","author":[{"first_name":"Mahdi","full_name":"Derakhshanmanesh, Mahdi","last_name":"Derakhshanmanesh"},{"first_name":"Jürgen","full_name":"Ebert, Jürgen","last_name":"Ebert"},{"first_name":"Marvin","full_name":"Grieger, Marvin","last_name":"Grieger"},{"full_name":"Engels, Gregor","id":"107","last_name":"Engels","first_name":"Gregor"}],"date_created":"2019-01-24T09:08:46Z","date_updated":"2022-01-06T07:03:24Z","title":"Model-integrating development of software systems: a flexible component-based approach","page":"1-30","citation":{"ama":"Derakhshanmanesh M, Ebert J, Grieger M, Engels G. Model-integrating development of software systems: a flexible component-based approach. <i>Software &#38; Systems Modeling</i>. 2018:1-30.","chicago":"Derakhshanmanesh, Mahdi, Jürgen Ebert, Marvin Grieger, and Gregor Engels. “Model-Integrating Development of Software Systems: A Flexible Component-Based Approach.” <i>Software &#38; Systems Modeling</i>, 2018, 1–30.","ieee":"M. Derakhshanmanesh, J. Ebert, M. Grieger, and G. Engels, “Model-integrating development of software systems: a flexible component-based approach,” <i>Software &#38; Systems Modeling</i>, pp. 1–30, 2018.","mla":"Derakhshanmanesh, Mahdi, et al. “Model-Integrating Development of Software Systems: A Flexible Component-Based Approach.” <i>Software &#38; Systems Modeling</i>, 2018, pp. 1–30.","bibtex":"@article{Derakhshanmanesh_Ebert_Grieger_Engels_2018, title={Model-integrating development of software systems: a flexible component-based approach}, journal={Software &#38; Systems Modeling}, author={Derakhshanmanesh, Mahdi and Ebert, Jürgen and Grieger, Marvin and Engels, Gregor}, year={2018}, pages={1–30} }","short":"M. Derakhshanmanesh, J. Ebert, M. Grieger, G. Engels, Software &#38; Systems Modeling (2018) 1–30.","apa":"Derakhshanmanesh, M., Ebert, J., Grieger, M., &#38; Engels, G. (2018). Model-integrating development of software systems: a flexible component-based approach. <i>Software &#38; Systems Modeling</i>, 1–30."},"year":"2018"},{"year":"2018","citation":{"short":"S.B. Schneider, S. Dräxler, H. Karl, in: IEEE Global Communications Conference (GLOBECOM 2018), IEEE, 2018.","bibtex":"@inproceedings{Schneider_Dräxler_Karl_2018, title={Trade-offs in Dynamic Resource Allocation in Network Function Virtualization}, booktitle={IEEE Global Communications Conference (GLOBECOM 2018)}, publisher={IEEE}, author={Schneider, Stefan Balthasar and Dräxler, Sevil and Karl, Holger}, year={2018} }","mla":"Schneider, Stefan Balthasar, et al. “Trade-Offs in Dynamic Resource Allocation in Network Function Virtualization.” <i>IEEE Global Communications Conference (GLOBECOM 2018)</i>, IEEE, 2018.","apa":"Schneider, S. B., Dräxler, S., &#38; Karl, H. (2018). Trade-offs in Dynamic Resource Allocation in Network Function Virtualization. In <i>IEEE Global Communications Conference (GLOBECOM 2018)</i>. Abu Dhabi, UAE: IEEE.","chicago":"Schneider, Stefan Balthasar, Sevil Dräxler, and Holger Karl. “Trade-Offs in Dynamic Resource Allocation in Network Function Virtualization.” In <i>IEEE Global Communications Conference (GLOBECOM 2018)</i>. IEEE, 2018.","ieee":"S. B. Schneider, S. Dräxler, and H. Karl, “Trade-offs in Dynamic Resource Allocation in Network Function Virtualization,” in <i>IEEE Global Communications Conference (GLOBECOM 2018)</i>, Abu Dhabi, UAE, 2018.","ama":"Schneider SB, Dräxler S, Karl H. Trade-offs in Dynamic Resource Allocation in Network Function Virtualization. In: <i>IEEE Global Communications Conference (GLOBECOM 2018)</i>. IEEE; 2018."},"has_accepted_license":"1","title":"Trade-offs in Dynamic Resource Allocation in Network Function Virtualization","conference":{"location":"Abu Dhabi, UAE","name":"IEEE Global Communications Conference (GLOBECOM 2018)"},"date_updated":"2022-01-06T07:03:24Z","publisher":"IEEE","oa":"1","date_created":"2019-01-24T13:53:22Z","author":[{"first_name":"Stefan Balthasar","id":"35343","full_name":"Schneider, Stefan Balthasar","orcid":"0000-0001-8210-4011","last_name":"Schneider"},{"id":"31764","full_name":"Dräxler, Sevil","last_name":"Dräxler","first_name":"Sevil"},{"full_name":"Karl, Holger","id":"126","last_name":"Karl","first_name":"Holger"}],"abstract":[{"lang":"eng","text":"Dynamic allocation of resources is a key feature in network function virtualization (NFV), enabling flexible adjustment of slices and contained network services to ever-changing service demands. \r\nConsidering resource allocation across the entire network, many authors have proposed approaches to optimize the placement and chaining of virtual network function (VNF) instances and the allocation of resources to these VNF instances. In doing so, various optimization objectives are conceivable, e.g., minimizing certain required resources or the end-to-end delay of the placed services.\r\n\r\nIn this paper, we investigate the relationship between four typical optimization objectives when coordinating the placement and resource allocation of chained VNF instances. We observe an interesting trade-off between minimizing the overhead of starting/stopping VNF instances and all other objectives when adapting to changed service demands."}],"status":"public","file":[{"relation":"main_file","content_type":"application/pdf","access_level":"open_access","file_name":"preprint_ris.pdf","file_id":"6971","file_size":422196,"creator":"stschn","date_created":"2019-01-24T13:53:16Z","date_updated":"2019-01-24T13:53:16Z"}],"publication":"IEEE Global Communications Conference (GLOBECOM 2018)","type":"conference","ddc":["040"],"language":[{"iso":"eng"}],"file_date_updated":"2019-01-24T13:53:16Z","_id":"6970","project":[{"name":"5G Development and validation platform for global industry-specific network services and Apps","_id":"28","grant_number":"761493"},{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Project Area C","_id":"4"},{"_id":"16","name":"SFB 901 - Subproject C4"}],"department":[{"_id":"75"}],"user_id":"35343"},{"publication":"IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)","file":[{"file_size":468396,"file_name":"preprint_ris.pdf","file_id":"6973","access_level":"open_access","date_updated":"2019-01-24T14:25:23Z","date_created":"2019-01-24T14:10:08Z","creator":"stschn","relation":"main_file","content_type":"application/pdf"}],"abstract":[{"lang":"eng","text":"In recent years, a variety of different approaches\r\nhave been proposed to tackle the problem of scaling and placing\r\nnetwork services, consisting of interconnected virtual network\r\nfunctions (VNFs). This paper presents a placement abstraction\r\nlayer (PAL) that provides a clear and simple northbound interface\r\nfor using such algorithms while hiding their internal\r\nfunctionality and implementation. Through its southbound interface,\r\nPAL can connect to different back ends that evaluate\r\nthe calculated placements, e.g., using simulations, emulations, or\r\ntestbed approaches. As an example for such evaluation back ends,\r\nwe introduce a novel placement emulation framework (PEF)\r\nthat allows executing calculated placements using real, containerbased\r\nVNFs on real-world network topologies. In a case study,\r\nwe show how PAL and PEF facilitate reusing and evaluating\r\nplacement algorithms as well as validating their underlying\r\nmodels and performance claims."}],"language":[{"iso":"eng"}],"ddc":["040"],"year":"2018","date_created":"2019-01-24T14:10:17Z","publisher":"IEEE","title":"A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms","type":"conference","status":"public","department":[{"_id":"75"}],"user_id":"35343","_id":"6972","project":[{"grant_number":"761493","name":"5G Development and validation platform for global industry-specific network services and Apps","_id":"28"},{"name":"SFB 901","_id":"1"},{"name":"SFB 901 - Project Area C","_id":"4"},{"name":"SFB 901 - Subproject C4","_id":"16"}],"file_date_updated":"2019-01-24T14:25:23Z","has_accepted_license":"1","citation":{"ama":"Schneider SB, Peuster M, Karl H. A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms. In: <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>. IEEE; 2018. doi:<a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725795\">10.1109/NFV-SDN.2018.8725795</a>","ieee":"S. B. Schneider, M. Peuster, and H. Karl, “A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms,” in <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>, Verona, Italy, 2018.","chicago":"Schneider, Stefan Balthasar, Manuel Peuster, and Holger Karl. “A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms.” In <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>. IEEE, 2018. <a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725795\">https://doi.org/10.1109/NFV-SDN.2018.8725795</a>.","apa":"Schneider, S. B., Peuster, M., &#38; Karl, H. (2018). A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms. In <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>. Verona, Italy: IEEE. <a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725795\">https://doi.org/10.1109/NFV-SDN.2018.8725795</a>","bibtex":"@inproceedings{Schneider_Peuster_Karl_2018, title={A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms}, DOI={<a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725795\">10.1109/NFV-SDN.2018.8725795</a>}, booktitle={IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)}, publisher={IEEE}, author={Schneider, Stefan Balthasar and Peuster, Manuel and Karl, Holger}, year={2018} }","mla":"Schneider, Stefan Balthasar, et al. “A Generic Emulation Framework for Reusing and Evaluating VNF Placement Algorithms.” <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>, IEEE, 2018, doi:<a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725795\">10.1109/NFV-SDN.2018.8725795</a>.","short":"S.B. Schneider, M. Peuster, H. Karl, in: IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018), IEEE, 2018."},"author":[{"orcid":"0000-0001-8210-4011","last_name":"Schneider","full_name":"Schneider, Stefan Balthasar","id":"35343","first_name":"Stefan Balthasar"},{"first_name":"Manuel","last_name":"Peuster","id":"13271","full_name":"Peuster, Manuel"},{"first_name":"Holger","last_name":"Karl","full_name":"Karl, Holger","id":"126"}],"oa":"1","date_updated":"2022-01-06T07:03:24Z","conference":{"location":"Verona, Italy","name":"IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)"},"doi":"10.1109/NFV-SDN.2018.8725795","main_file_link":[{"url":"https://ieeexplore.ieee.org/abstract/document/8725795"}]},{"status":"public","type":"conference","file_date_updated":"2019-01-24T14:26:23Z","user_id":"35343","department":[{"_id":"75"}],"project":[{"grant_number":"761493","name":"5G Development and validation platform for global industry-specific network services and Apps","_id":"28"},{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Project Area C","_id":"4"},{"name":"SFB 901 - Subproject C4","_id":"16"}],"_id":"6974","citation":{"bibtex":"@inproceedings{Schneider_Peuster_Tavernier_Karl_2018, title={A Fully Integrated Multi-Platform NFV SDK}, DOI={<a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725794\">10.1109/NFV-SDN.2018.8725794</a>}, booktitle={IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)}, publisher={IEEE}, author={Schneider, Stefan Balthasar and Peuster, Manuel and Tavernier, Wouter and Karl, Holger}, year={2018} }","short":"S.B. Schneider, M. Peuster, W. Tavernier, H. Karl, in: IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018), IEEE, 2018.","mla":"Schneider, Stefan Balthasar, et al. “A Fully Integrated Multi-Platform NFV SDK.” <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>, IEEE, 2018, doi:<a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725794\">10.1109/NFV-SDN.2018.8725794</a>.","apa":"Schneider, S. B., Peuster, M., Tavernier, W., &#38; Karl, H. (2018). A Fully Integrated Multi-Platform NFV SDK. In <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>. Verona, Italy: IEEE. <a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725794\">https://doi.org/10.1109/NFV-SDN.2018.8725794</a>","ieee":"S. B. Schneider, M. Peuster, W. Tavernier, and H. Karl, “A Fully Integrated Multi-Platform NFV SDK,” in <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>, Verona, Italy, 2018.","chicago":"Schneider, Stefan Balthasar, Manuel Peuster, Wouter Tavernier, and Holger Karl. “A Fully Integrated Multi-Platform NFV SDK.” In <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>. IEEE, 2018. <a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725794\">https://doi.org/10.1109/NFV-SDN.2018.8725794</a>.","ama":"Schneider SB, Peuster M, Tavernier W, Karl H. A Fully Integrated Multi-Platform NFV SDK. In: <i>IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)</i>. IEEE; 2018. doi:<a href=\"https://doi.org/10.1109/NFV-SDN.2018.8725794\">10.1109/NFV-SDN.2018.8725794</a>"},"has_accepted_license":"1","main_file_link":[{"url":"https://ieeexplore.ieee.org/abstract/document/8725794"}],"doi":"10.1109/NFV-SDN.2018.8725794","conference":{"name":"IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)","location":"Verona, Italy"},"author":[{"orcid":"0000-0001-8210-4011","last_name":"Schneider","full_name":"Schneider, Stefan Balthasar","id":"35343","first_name":"Stefan Balthasar"},{"full_name":"Peuster, Manuel","id":"13271","last_name":"Peuster","first_name":"Manuel"},{"last_name":"Tavernier","full_name":"Tavernier, Wouter","first_name":"Wouter"},{"full_name":"Karl, Holger","id":"126","last_name":"Karl","first_name":"Holger"}],"oa":"1","date_updated":"2022-01-06T07:03:25Z","file":[{"access_level":"open_access","file_id":"6975","file_name":"Pre-print.pdf","file_size":475022,"date_created":"2019-01-24T14:17:29Z","creator":"stschn","date_updated":"2019-01-24T14:26:23Z","relation":"main_file","content_type":"application/pdf"}],"abstract":[{"text":"A key challenge of network function virtualization\r\n(NFV) is the complexity of developing and deploying new\r\nnetwork services. Currently, development requires many manual\r\nsteps that are time-consuming and error-prone (e.g., for creating\r\nservice descriptors). Furthermore, existing management and\r\norchestration (MANO) platforms only offer limited support of\r\nstandardized descriptor models or package formats, limiting the\r\nre-usability of network services.\r\n\r\nTo this end, we introduce a fully integrated, open-source\r\nNFV service development kit (SDK) with multi-MANO platform\r\nsupport. Our SDK simplifies many NFV service development\r\nsteps by offering initial generation of descriptors, advanced\r\nproject management, as well as fully automated packaging and\r\nsubmission for on-boarding. To achieve multi-platform support,\r\nwe present a package format that extends ETSI’s VNF package\r\nformat. In this demonstration, we present the end-to-end workflow\r\nto develop an NFV service that is then packaged for multiple\r\nplatforms, i.e., 5GTANGO and OSM.","lang":"eng"}],"publication":"IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN 2018)","language":[{"iso":"eng"}],"ddc":["040"],"year":"2018","title":"A Fully Integrated Multi-Platform NFV SDK","date_created":"2019-01-24T14:17:58Z","publisher":"IEEE"},{"doi":"10.1109/lca.2018.2828402","title":"Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution","date_created":"2020-04-06T11:49:12Z","author":[{"first_name":"Zhaoshi","last_name":"Li","full_name":"Li, Zhaoshi"},{"full_name":"Liu, Leibo","last_name":"Liu","first_name":"Leibo"},{"last_name":"Deng","full_name":"Deng, Yangdong","first_name":"Yangdong"},{"first_name":"Shouyi","last_name":"Yin","full_name":"Yin, Shouyi"},{"last_name":"Wei","full_name":"Wei, Shaojun","first_name":"Shaojun"}],"date_updated":"2022-01-06T06:52:50Z","page":"147-150","citation":{"short":"Z. Li, L. Liu, Y. Deng, S. Yin, S. Wei, IEEE Computer Architecture Letters (2018) 147–150.","mla":"Li, Zhaoshi, et al. “Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution.” <i>IEEE Computer Architecture Letters</i>, 2018, pp. 147–50, doi:<a href=\"https://doi.org/10.1109/lca.2018.2828402\">10.1109/lca.2018.2828402</a>.","bibtex":"@article{Li_Liu_Deng_Yin_Wei_2018, title={Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution}, DOI={<a href=\"https://doi.org/10.1109/lca.2018.2828402\">10.1109/lca.2018.2828402</a>}, journal={IEEE Computer Architecture Letters}, author={Li, Zhaoshi and Liu, Leibo and Deng, Yangdong and Yin, Shouyi and Wei, Shaojun}, year={2018}, pages={147–150} }","apa":"Li, Z., Liu, L., Deng, Y., Yin, S., &#38; Wei, S. (2018). Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution. <i>IEEE Computer Architecture Letters</i>, 147–150. <a href=\"https://doi.org/10.1109/lca.2018.2828402\">https://doi.org/10.1109/lca.2018.2828402</a>","chicago":"Li, Zhaoshi, Leibo Liu, Yangdong Deng, Shouyi Yin, and Shaojun Wei. “Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution.” <i>IEEE Computer Architecture Letters</i>, 2018, 147–50. <a href=\"https://doi.org/10.1109/lca.2018.2828402\">https://doi.org/10.1109/lca.2018.2828402</a>.","ieee":"Z. Li, L. Liu, Y. Deng, S. Yin, and S. Wei, “Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution,” <i>IEEE Computer Architecture Letters</i>, pp. 147–150, 2018.","ama":"Li Z, Liu L, Deng Y, Yin S, Wei S. Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution. <i>IEEE Computer Architecture Letters</i>. 2018:147-150. doi:<a href=\"https://doi.org/10.1109/lca.2018.2828402\">10.1109/lca.2018.2828402</a>"},"year":"2018","publication_identifier":{"issn":["1556-6056","1556-6064","2473-2575"]},"publication_status":"published","language":[{"iso":"eng"}],"keyword":["pc2-harp-ressources"],"user_id":"61189","_id":"16416","status":"public","abstract":[{"lang":"eng","text":"The advent of FPGA-based hybrid architecture offers the opportunity of customizing memory subsystems to enhance the overall system performance. However, it is not straightforward to design efficient FPGA circuits for emerging FPGAs applications such as in-memory database and graph analytics, which heavily depend on concurrent data structures (CDS'). Highly dynamic behaviors of CDS' have to be orchestrated by synchronization primitives for correct execution. These primitives induce overwhelming memory traffic for synchronizations on FPGAs. This paper proposes a novel method for systematically exploring and exploiting memory-level parallelism (MLP) of CDS by transactional execution on FPGAs. Inspired by the idea that semantics of transactions can be implemented in a more efficient and scalable manner on FPGAs than on CPUs, we propose a transaction-based reconfigurable runtime system for capturing MLP of CDS'. Experiments on linked-list and skip-list show our approach achieves 5.18x and 1.55x throughput improvement on average than lock-based FPGA implementations and optimized CDS algorithms on a state-of-the-art multi-core CPU respectively."}],"publication":"IEEE Computer Architecture Letters","type":"journal_article"},{"_id":"16421","user_id":"61189","keyword":["pc2-harp-ressources"],"language":[{"iso":"eng"}],"type":"conference","publication":"2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)","abstract":[{"text":"The sheer amount of computing resources required to run modern cloud workloads has put a lot of pressure on the design of power efficient cluster nodes. To address this problem, Intel (HARP) and Microsoft (Catapult) have proposed CPU-FPGA integrated architectures that can deliver efficient power-performance executions. Unfortunately, the integration of FPGA acceleration modules to software is a challenging endeavor that does not have a seamless programming model. This paper proposes HardCloud (www.hardcloud.org), an extension of the OpenMP 4.X standard that eases the task of offloading FPGA modules to cluster accelerators.","lang":"eng"}],"status":"public","date_updated":"2022-01-06T06:52:50Z","date_created":"2020-04-06T12:02:37Z","author":[{"first_name":"Ciro","last_name":"Ceissler","full_name":"Ceissler, Ciro"},{"first_name":"Ramon","full_name":"Nepomuceno, Ramon","last_name":"Nepomuceno"},{"first_name":"Marcio","full_name":"Pereira, Marcio","last_name":"Pereira"},{"first_name":"Guido","last_name":"Araujo","full_name":"Araujo, Guido"}],"title":"Automatic Offloading of Cluster Accelerators","doi":"10.1109/fccm.2018.00058","publication_status":"published","publication_identifier":{"isbn":["9781538655221"]},"year":"2018","citation":{"short":"C. Ceissler, R. Nepomuceno, M. Pereira, G. Araujo, in: 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2018.","mla":"Ceissler, Ciro, et al. “Automatic Offloading of Cluster Accelerators.” <i>2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)</i>, 2018, doi:<a href=\"https://doi.org/10.1109/fccm.2018.00058\">10.1109/fccm.2018.00058</a>.","bibtex":"@inproceedings{Ceissler_Nepomuceno_Pereira_Araujo_2018, title={Automatic Offloading of Cluster Accelerators}, DOI={<a href=\"https://doi.org/10.1109/fccm.2018.00058\">10.1109/fccm.2018.00058</a>}, booktitle={2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)}, author={Ceissler, Ciro and Nepomuceno, Ramon and Pereira, Marcio and Araujo, Guido}, year={2018} }","apa":"Ceissler, C., Nepomuceno, R., Pereira, M., &#38; Araujo, G. (2018). Automatic Offloading of Cluster Accelerators. In <i>2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)</i>. <a href=\"https://doi.org/10.1109/fccm.2018.00058\">https://doi.org/10.1109/fccm.2018.00058</a>","ama":"Ceissler C, Nepomuceno R, Pereira M, Araujo G. Automatic Offloading of Cluster Accelerators. In: <i>2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)</i>. ; 2018. doi:<a href=\"https://doi.org/10.1109/fccm.2018.00058\">10.1109/fccm.2018.00058</a>","ieee":"C. Ceissler, R. Nepomuceno, M. Pereira, and G. Araujo, “Automatic Offloading of Cluster Accelerators,” in <i>2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)</i>, 2018.","chicago":"Ceissler, Ciro, Ramon Nepomuceno, Marcio Pereira, and Guido Araujo. “Automatic Offloading of Cluster Accelerators.” In <i>2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)</i>, 2018. <a href=\"https://doi.org/10.1109/fccm.2018.00058\">https://doi.org/10.1109/fccm.2018.00058</a>."}},{"publication":"FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers","type":"conference","abstract":[{"text":"In recent years, OpenCL has been increasingly adopted as it enables software programmers to harness the performance and power efficiency of FPGAs. Despite simplifying the FPGA programming challenge, achieving high performance and energy efficiency with OpenCL is still a difficult task. In order to further contribute to the advance of the OpenCL usage for FPGAs, we utilize a realistic application scenario as our case study: the AutoDock molecular docking software. While OpenCL has proven its effectiveness in accelerating molecular docking on GPUs, for FPGA-based AutoDock accelerators it struggles with difficult design patterns. Besides complex multiple-producers to single-consumer datapaths, these include time-intensive loops with variable runtimes. Therefore, this work presents the design and optimization steps for implementing AutoDock in OpenCL targeting an Arria-10 FPGA, as well as a corresponding execution runtime and energy-efficiency evaluation. Applying these techniques improved the performance of the initial OpenCL implementation for FPGAs by three orders of magnitude, with the final version of the code now yielding speed-ups of up to ~2.7x, and energy-efficiency gains of up to ~1.8x over the original serial AutoDock version executing on a current-generation CPU.","lang":"eng"}],"status":"public","_id":"16425","user_id":"61189","keyword":["pc2-harp-ressources"],"language":[{"iso":"eng"}],"year":"2018","page":"1-10","citation":{"short":"L. Solis-Vasquez, A. Koch, in: FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers, 2018, pp. 1–10.","bibtex":"@inproceedings{Solis-Vasquez_Koch_2018, title={A Case Study in Using OpenCL on FPGAs: Creating an Open-Source Accelerator of the AutoDock Molecular Docking Software}, booktitle={FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers}, author={Solis-Vasquez, Leonardo and Koch, Andreas}, year={2018}, pages={1–10} }","mla":"Solis-Vasquez, Leonardo, and Andreas Koch. “A Case Study in Using OpenCL on FPGAs: Creating an Open-Source Accelerator of the AutoDock Molecular Docking Software.” <i>FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers</i>, 2018, pp. 1–10.","apa":"Solis-Vasquez, L., &#38; Koch, A. (2018). A Case Study in Using OpenCL on FPGAs: Creating an Open-Source Accelerator of the AutoDock Molecular Docking Software. In <i>FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers</i> (pp. 1–10).","ama":"Solis-Vasquez L, Koch A. A Case Study in Using OpenCL on FPGAs: Creating an Open-Source Accelerator of the AutoDock Molecular Docking Software. In: <i>FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers</i>. ; 2018:1-10.","ieee":"L. Solis-Vasquez and A. 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