[{"citation":{"ama":"Mehlich F. <i>An Evaluation of XCS on the OpenAI Gym</i>. Paderborn University; 2023.","chicago":"Mehlich, Florian. <i>An Evaluation of XCS on the OpenAI Gym</i>. Paderborn: Paderborn University, 2023.","ieee":"F. Mehlich, <i>An Evaluation of XCS on the OpenAI Gym</i>. Paderborn: Paderborn University, 2023.","apa":"Mehlich, F. (2023). <i>An Evaluation of XCS on the OpenAI Gym</i>. Paderborn University.","short":"F. Mehlich, An Evaluation of XCS on the OpenAI Gym, Paderborn University, Paderborn, 2023.","mla":"Mehlich, Florian. <i>An Evaluation of XCS on the OpenAI Gym</i>. Paderborn University, 2023.","bibtex":"@book{Mehlich_2023, place={Paderborn}, title={An Evaluation of XCS on the OpenAI Gym}, publisher={Paderborn University}, author={Mehlich, Florian}, year={2023} }"},"year":"2023","place":"Paderborn","author":[{"full_name":"Mehlich, Florian","last_name":"Mehlich","first_name":"Florian"}],"supervisor":[{"first_name":"Marco","last_name":"Platzner","id":"398","full_name":"Platzner, Marco"},{"first_name":"Tim","full_name":"Hansmeier, Tim","id":"49992","last_name":"Hansmeier","orcid":"0000-0003-1377-3339"}],"date_created":"2023-03-07T12:22:57Z","date_updated":"2024-05-15T13:14:54Z","publisher":"Paderborn University","title":"An Evaluation of XCS on the OpenAI Gym","type":"bachelorsthesis","status":"public","user_id":"398","department":[{"_id":"78"}],"project":[{"name":"SFB 901 - C2: SFB 901 - Subproject C2","_id":"14","grant_number":"160364472"},{"_id":"4","name":"SFB 901 - C: SFB 901 - Project Area C"},{"_id":"1","name":"SFB 901: SFB 901","grant_number":"160364472"}],"_id":"42839","language":[{"iso":"eng"}],"extern":"1"},{"title":"A Comparison of Algorithms for the Generation of Layouts based on Reconfigurable Slots on FPGAs","publisher":"Paderborn University","date_updated":"2024-05-15T13:21:03Z","author":[{"first_name":"Yashwanth ","last_name":"Tadakamalla","full_name":"Tadakamalla, Yashwanth "}],"supervisor":[{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco"}],"date_created":"2024-05-06T09:20:17Z","year":"2023","citation":{"apa":"Tadakamalla, Y. (2023). <i>A Comparison of Algorithms for the Generation of Layouts based on Reconfigurable Slots on FPGAs</i>. Paderborn University.","short":"Y. Tadakamalla, A Comparison of Algorithms for the Generation of Layouts Based on Reconfigurable Slots on FPGAs, Paderborn University, 2023.","mla":"Tadakamalla, Yashwanth. <i>A Comparison of Algorithms for the Generation of Layouts Based on Reconfigurable Slots on FPGAs</i>. Paderborn University, 2023.","bibtex":"@book{Tadakamalla_2023, title={A Comparison of Algorithms for the Generation of Layouts based on Reconfigurable Slots on FPGAs}, publisher={Paderborn University}, author={Tadakamalla, Yashwanth }, year={2023} }","ama":"Tadakamalla Y. <i>A Comparison of Algorithms for the Generation of Layouts Based on Reconfigurable Slots on FPGAs</i>. Paderborn University; 2023.","ieee":"Y. Tadakamalla, <i>A Comparison of Algorithms for the Generation of Layouts based on Reconfigurable Slots on FPGAs</i>. Paderborn University, 2023.","chicago":"Tadakamalla, Yashwanth . <i>A Comparison of Algorithms for the Generation of Layouts Based on Reconfigurable Slots on FPGAs</i>. Paderborn University, 2023."},"language":[{"iso":"eng"}],"_id":"53930","department":[{"_id":"78"}],"user_id":"398","status":"public","type":"mastersthesis"},{"status":"public","type":"mastersthesis","language":[{"iso":"eng"}],"department":[{"_id":"78"}],"user_id":"398","_id":"54295","citation":{"apa":"Middeke, S. H. (2023). <i>Design and Realization of Optimized Intra-FPGA ROS 2 Communication</i>. Paderborn University.","bibtex":"@book{Middeke_2023, title={Design and Realization of Optimized Intra-FPGA ROS 2 Communication}, publisher={Paderborn University}, author={Middeke, Sorel Horst}, year={2023} }","mla":"Middeke, Sorel Horst. <i>Design and Realization of Optimized Intra-FPGA ROS 2 Communication</i>. Paderborn University, 2023.","short":"S.H. Middeke, Design and Realization of Optimized Intra-FPGA ROS 2 Communication, Paderborn University, 2023.","chicago":"Middeke, Sorel Horst. <i>Design and Realization of Optimized Intra-FPGA ROS 2 Communication</i>. Paderborn University, 2023.","ieee":"S. H. Middeke, <i>Design and Realization of Optimized Intra-FPGA ROS 2 Communication</i>. Paderborn University, 2023.","ama":"Middeke SH. <i>Design and Realization of Optimized Intra-FPGA ROS 2 Communication</i>. Paderborn University; 2023."},"year":"2023","title":"Design and Realization of Optimized Intra-FPGA ROS 2 Communication","supervisor":[{"first_name":"Christian ","full_name":"Lienen , Christian ","last_name":"Lienen "}],"author":[{"first_name":"Sorel Horst","full_name":"Middeke, Sorel Horst","last_name":"Middeke"}],"date_created":"2024-05-15T13:13:23Z","publisher":"Paderborn University","date_updated":"2024-05-15T13:13:38Z"},{"title":"A Hardware/Software Co-designed ORB-SLAM2 Algorithm for FPGA","date_created":"2024-05-15T13:11:45Z","author":[{"last_name":"Thiele","full_name":"Thiele, Simon","first_name":"Simon"}],"supervisor":[{"first_name":"Christian ","last_name":"Lienen","full_name":"Lienen, Christian "}],"date_updated":"2024-05-15T13:12:03Z","publisher":"Paderborn University","citation":{"ama":"Thiele S. <i>A Hardware/Software Co-Designed ORB-SLAM2 Algorithm for FPGA</i>. Paderborn University; 2023.","ieee":"S. Thiele, <i>A Hardware/Software Co-designed ORB-SLAM2 Algorithm for FPGA</i>. Paderborn University, 2023.","chicago":"Thiele, Simon. <i>A Hardware/Software Co-Designed ORB-SLAM2 Algorithm for FPGA</i>. Paderborn University, 2023.","apa":"Thiele, S. (2023). <i>A Hardware/Software Co-designed ORB-SLAM2 Algorithm for FPGA</i>. Paderborn University.","short":"S. Thiele, A Hardware/Software Co-Designed ORB-SLAM2 Algorithm for FPGA, Paderborn University, 2023.","mla":"Thiele, Simon. <i>A Hardware/Software Co-Designed ORB-SLAM2 Algorithm for FPGA</i>. Paderborn University, 2023.","bibtex":"@book{Thiele_2023, title={A Hardware/Software Co-designed ORB-SLAM2 Algorithm for FPGA}, publisher={Paderborn University}, author={Thiele, Simon}, year={2023} }"},"year":"2023","language":[{"iso":"eng"}],"department":[{"_id":"78"}],"user_id":"398","_id":"54294","status":"public","type":"mastersthesis"},{"citation":{"ieee":"A. Abooof, <i>Implementation and Evaluation of a ReconROS-based Obstacle Avoidance Architecture for Autonomous Robots</i>. Paderborn University, 2023.","chicago":"Abooof, Alhussain. <i>Implementation and Evaluation of a ReconROS-Based Obstacle Avoidance Architecture for Autonomous Robots</i>. Paderborn University, 2023.","ama":"Abooof A. <i>Implementation and Evaluation of a ReconROS-Based Obstacle Avoidance Architecture for Autonomous Robots</i>. Paderborn University; 2023.","apa":"Abooof, A. (2023). <i>Implementation and Evaluation of a ReconROS-based Obstacle Avoidance Architecture for Autonomous Robots</i>. Paderborn University.","short":"A. Abooof, Implementation and Evaluation of a ReconROS-Based Obstacle Avoidance Architecture for Autonomous Robots, Paderborn University, 2023.","mla":"Abooof, Alhussain. <i>Implementation and Evaluation of a ReconROS-Based Obstacle Avoidance Architecture for Autonomous Robots</i>. Paderborn University, 2023.","bibtex":"@book{Abooof_2023, title={Implementation and Evaluation of a ReconROS-based Obstacle Avoidance Architecture for Autonomous Robots}, publisher={Paderborn University}, author={Abooof, Alhussain}, year={2023} }"},"year":"2023","author":[{"full_name":"Abooof, Alhussain","last_name":"Abooof","first_name":"Alhussain"}],"date_created":"2024-05-15T13:18:15Z","publisher":"Paderborn University","date_updated":"2024-05-15T13:19:09Z","title":"Implementation and Evaluation of a ReconROS-based Obstacle Avoidance Architecture for Autonomous Robots","type":"mastersthesis","status":"public","user_id":"398","department":[{"_id":"78"}],"_id":"54297","language":[{"iso":"eng"}]},{"title":"Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-based System-on-Chip","author":[{"first_name":"Aniruddh P","last_name":"Rao","full_name":"Rao, Aniruddh P"}],"date_created":"2024-05-15T13:15:52Z","publisher":"Paderborn University","date_updated":"2024-05-15T13:15:57Z","citation":{"chicago":"Rao, Aniruddh P. <i>Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-Based System-on-Chip</i>. Paderborn University, 2023.","ieee":"A. P. Rao, <i>Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-based System-on-Chip</i>. Paderborn University, 2023.","ama":"Rao AP. <i>Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-Based System-on-Chip</i>. Paderborn University; 2023.","apa":"Rao, A. P. (2023). <i>Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-based System-on-Chip</i>. Paderborn University.","short":"A.P. Rao, Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-Based System-on-Chip, Paderborn University, 2023.","bibtex":"@book{Rao_2023, title={Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-based System-on-Chip}, publisher={Paderborn University}, author={Rao, Aniruddh P}, year={2023} }","mla":"Rao, Aniruddh P. <i>Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-Based System-on-Chip</i>. Paderborn University, 2023."},"year":"2023","language":[{"iso":"eng"}],"user_id":"398","department":[{"_id":"78"}],"_id":"54296","status":"public","type":"mastersthesis"},{"type":"bachelorsthesis","status":"public","_id":"45762","project":[{"_id":"52","name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"department":[{"_id":"78"}],"user_id":"398","language":[{"iso":"ger"}],"year":"2023","citation":{"bibtex":"@book{Simon-Mertens_2023, title={Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation}, publisher={Paderborn University}, author={Simon-Mertens, Florian}, year={2023} }","mla":"Simon-Mertens, Florian. <i>Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation</i>. Paderborn University, 2023.","short":"F. Simon-Mertens, Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation, Paderborn University, 2023.","apa":"Simon-Mertens, F. (2023). <i>Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation</i>. Paderborn University.","chicago":"Simon-Mertens, Florian. <i>Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation</i>. Paderborn University, 2023.","ieee":"F. Simon-Mertens, <i>Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation</i>. Paderborn University, 2023.","ama":"Simon-Mertens F. <i>Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation</i>. Paderborn University; 2023."},"publisher":"Paderborn University","date_updated":"2024-05-15T13:29:13Z","supervisor":[{"id":"55631","full_name":"Jentzsch, Felix","orcid":"0000-0003-4987-5708","last_name":"Jentzsch","first_name":"Felix"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"},{"last_name":"Kenter","id":"3145","full_name":"Kenter, Tobias","first_name":"Tobias"}],"date_created":"2023-06-23T10:41:54Z","author":[{"first_name":"Florian","full_name":"Simon-Mertens, Florian","last_name":"Simon-Mertens"}],"title":"Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation"},{"language":[{"iso":"eng"}],"department":[{"_id":"78"}],"user_id":"398","_id":"54243","status":"public","type":"bachelorsthesis","title":"Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on Platform FPGAs","author":[{"first_name":"Marvin Osaretin","full_name":"Oviasogie, Marvin Osaretin","last_name":"Oviasogie"}],"supervisor":[{"first_name":"Felix","full_name":"Jentzsch, Felix","id":"55631","orcid":"0000-0003-4987-5708","last_name":"Jentzsch"},{"id":"398","full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco"}],"date_created":"2024-05-13T13:58:31Z","date_updated":"2024-05-15T13:30:41Z","publisher":"Paderborn University","citation":{"bibtex":"@book{Oviasogie_2023, title={Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on Platform FPGAs}, publisher={Paderborn University}, author={Oviasogie, Marvin Osaretin}, year={2023} }","short":"M.O. Oviasogie, Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs, Paderborn University, 2023.","mla":"Oviasogie, Marvin Osaretin. <i>Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs</i>. Paderborn University, 2023.","apa":"Oviasogie, M. O. (2023). <i>Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on Platform FPGAs</i>. Paderborn University.","ama":"Oviasogie MO. <i>Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs</i>. Paderborn University; 2023.","chicago":"Oviasogie, Marvin Osaretin. <i>Demonstrator for Dataflow-Based DNN Acceleration for Vision Applications on Platform FPGAs</i>. Paderborn University, 2023.","ieee":"M. O. Oviasogie, <i>Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on Platform FPGAs</i>. Paderborn University, 2023."},"year":"2023"},{"type":"bachelorsthesis","status":"public","user_id":"398","department":[{"_id":"78"}],"_id":"54241","language":[{"iso":"eng"}],"citation":{"bibtex":"@book{Reuter_2023, title={Development of a Power Analysis Framework for Embedded FPGA Accelerators}, publisher={Paderborn University}, author={Reuter, Lucas David}, year={2023} }","mla":"Reuter, Lucas David. <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University, 2023.","short":"L.D. Reuter, Development of a Power Analysis Framework for Embedded FPGA Accelerators, Paderborn University, 2023.","apa":"Reuter, L. D. (2023). <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University.","chicago":"Reuter, Lucas David. <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University, 2023.","ieee":"L. D. Reuter, <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University, 2023.","ama":"Reuter LD. <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University; 2023."},"year":"2023","supervisor":[{"first_name":"Felix","orcid":"0000-0003-4987-5708","last_name":"Jentzsch","id":"55631","full_name":"Jentzsch, Felix"},{"first_name":"Marco","last_name":"Platzner","id":"398","full_name":"Platzner, Marco"}],"date_created":"2024-05-13T13:56:45Z","author":[{"full_name":"Reuter, Lucas David","last_name":"Reuter","first_name":"Lucas David"}],"publisher":"Paderborn University","date_updated":"2024-05-15T13:30:54Z","title":"Development of a Power Analysis Framework for Embedded FPGA Accelerators"},{"year":"2023","citation":{"apa":"Hamm, R. (2023). <i>Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen</i>. Paderborn University.","short":"R. Hamm, Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen, Paderborn University, 2023.","mla":"Hamm, Robin. <i>Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen</i>. Paderborn University, 2023.","bibtex":"@book{Hamm_2023, title={Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen}, publisher={Paderborn University}, author={Hamm, Robin}, year={2023} }","ama":"Hamm R. <i>Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen</i>. Paderborn University; 2023.","ieee":"R. Hamm, <i>Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen</i>. Paderborn University, 2023.","chicago":"Hamm, Robin. <i>Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen</i>. Paderborn University, 2023."},"title":"Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen","publisher":"Paderborn University","date_updated":"2024-05-15T13:29:49Z","date_created":"2024-05-13T14:01:01Z","author":[{"first_name":"Robin","full_name":"Hamm, Robin","last_name":"Hamm"}],"supervisor":[{"first_name":"Lennart","full_name":"Clausing, Lennart","id":"74287","orcid":"0000-0003-3789-6034","last_name":"Clausing"},{"full_name":"Platzner, Marco","id":"398","last_name":"Platzner","first_name":"Marco"}],"status":"public","type":"bachelorsthesis","language":[{"iso":"ger"}],"_id":"54246","department":[{"_id":"78"}],"user_id":"398"},{"type":"bachelorsthesis","status":"public","_id":"52480","department":[{"_id":"78"}],"user_id":"398","language":[{"iso":"eng"}],"year":"2023","citation":{"apa":"Klassen, A. (2023). <i>Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices</i>. Paderborn University.","short":"A. Klassen, Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices, Paderborn University, 2023.","mla":"Klassen, Alexander. <i>Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices</i>. Paderborn University, 2023.","bibtex":"@book{Klassen_2023, title={Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices}, publisher={Paderborn University}, author={Klassen, Alexander}, year={2023} }","ama":"Klassen A. <i>Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices</i>. Paderborn University; 2023.","ieee":"A. Klassen, <i>Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices</i>. Paderborn University, 2023.","chicago":"Klassen, Alexander. <i>Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices</i>. Paderborn University, 2023."},"publisher":"Paderborn University","date_updated":"2024-05-15T13:28:54Z","supervisor":[{"first_name":"Lennart","full_name":"Clausing, Lennart","id":"74287","orcid":"0000-0003-3789-6034","last_name":"Clausing"}],"author":[{"full_name":"Klassen, Alexander","last_name":"Klassen","first_name":"Alexander"}],"date_created":"2024-03-11T16:06:00Z","title":"Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices"},{"language":[{"iso":"eng"}],"user_id":"398","department":[{"_id":"78"}],"_id":"54298","status":"public","type":"bachelorsthesis","title":"Ein Simulator für Schedulability-Experimente mit periodischen Tasks auf FPGAs","date_created":"2024-05-15T13:24:34Z","supervisor":[{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner"}],"author":[{"first_name":"Jorian","full_name":"Tsague Dingo, Jorian","last_name":"Tsague Dingo"}],"publisher":"Paderborn University","date_updated":"2024-05-15T13:24:38Z","citation":{"bibtex":"@book{Tsague Dingo_2023, title={Ein Simulator für Schedulability-Experimente mit periodischen Tasks auf FPGAs}, publisher={Paderborn University}, author={Tsague Dingo, Jorian}, year={2023} }","mla":"Tsague Dingo, Jorian. <i>Ein Simulator Für Schedulability-Experimente Mit Periodischen Tasks Auf FPGAs</i>. Paderborn University, 2023.","short":"J. Tsague Dingo, Ein Simulator Für Schedulability-Experimente Mit Periodischen Tasks Auf FPGAs, Paderborn University, 2023.","apa":"Tsague Dingo, J. (2023). <i>Ein Simulator für Schedulability-Experimente mit periodischen Tasks auf FPGAs</i>. Paderborn University.","ama":"Tsague Dingo J. <i>Ein Simulator Für Schedulability-Experimente Mit Periodischen Tasks Auf FPGAs</i>. Paderborn University; 2023.","ieee":"J. Tsague Dingo, <i>Ein Simulator für Schedulability-Experimente mit periodischen Tasks auf FPGAs</i>. Paderborn University, 2023.","chicago":"Tsague Dingo, Jorian. <i>Ein Simulator Für Schedulability-Experimente Mit Periodischen Tasks Auf FPGAs</i>. Paderborn University, 2023."},"year":"2023"},{"type":"mastersthesis","status":"public","_id":"54299","user_id":"398","department":[{"_id":"78"}],"language":[{"iso":"eng"}],"year":"2023","citation":{"bibtex":"@book{Brede_2023, title={Evaluation of Classifier Migration Between Multiple XCS Populations}, publisher={Paderborn University}, author={Brede, Mathis}, year={2023} }","mla":"Brede, Mathis. <i>Evaluation of Classifier Migration Between Multiple XCS Populations</i>. Paderborn University, 2023.","short":"M. Brede, Evaluation of Classifier Migration Between Multiple XCS Populations, Paderborn University, 2023.","apa":"Brede, M. (2023). <i>Evaluation of Classifier Migration Between Multiple XCS Populations</i>. Paderborn University.","ieee":"M. Brede, <i>Evaluation of Classifier Migration Between Multiple XCS Populations</i>. Paderborn University, 2023.","chicago":"Brede, Mathis. <i>Evaluation of Classifier Migration Between Multiple XCS Populations</i>. Paderborn University, 2023.","ama":"Brede M. <i>Evaluation of Classifier Migration Between Multiple XCS Populations</i>. Paderborn University; 2023."},"publisher":"Paderborn University","date_updated":"2024-05-15T13:26:23Z","date_created":"2024-05-15T13:26:17Z","supervisor":[{"full_name":"Hansmeier, Tim ","last_name":"Hansmeier","first_name":"Tim "}],"author":[{"full_name":"Brede, Mathis","last_name":"Brede","first_name":"Mathis"}],"title":"Evaluation of Classifier Migration Between Multiple XCS Populations"},{"author":[{"first_name":"Alexander","last_name":"Nowosad","full_name":"Nowosad, Alexander"}],"date_created":"2024-05-15T13:27:19Z","publisher":"Paderborn University","date_updated":"2024-05-15T13:27:26Z","title":"Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor","citation":{"ama":"Nowosad A. <i>Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor</i>. Paderborn University; 2023.","ieee":"A. Nowosad, <i>Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor</i>. Paderborn University, 2023.","chicago":"Nowosad, Alexander. <i>Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor</i>. Paderborn University, 2023.","apa":"Nowosad, A. (2023). <i>Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor</i>. Paderborn University.","mla":"Nowosad, Alexander. <i>Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor</i>. Paderborn University, 2023.","bibtex":"@book{Nowosad_2023, title={Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor}, publisher={Paderborn University}, author={Nowosad, Alexander}, year={2023} }","short":"A. Nowosad, Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor, Paderborn University, 2023."},"year":"2023","user_id":"398","department":[{"_id":"78"}],"_id":"54300","language":[{"iso":"eng"}],"type":"mastersthesis","status":"public"},{"language":[{"iso":"eng"}],"_id":"54244","user_id":"398","department":[{"_id":"78"}],"status":"public","type":"mastersthesis","title":"Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform","date_updated":"2024-05-15T13:31:46Z","publisher":"Paderborn University","author":[{"first_name":"Salem","last_name":"AlAidroos","full_name":"AlAidroos, Salem"}],"date_created":"2024-05-13T13:59:16Z","supervisor":[{"full_name":"Jentzsch, Felix","id":"55631","last_name":"Jentzsch","orcid":"0000-0003-4987-5708","first_name":"Felix"},{"last_name":"Platzner","full_name":"Platzner, Marco","id":"398","first_name":"Marco"}],"year":"2023","citation":{"ieee":"S. AlAidroos, <i>Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform</i>. Paderborn University, 2023.","chicago":"AlAidroos, Salem. <i>Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform</i>. Paderborn University, 2023.","ama":"AlAidroos S. <i>Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform</i>. Paderborn University; 2023.","short":"S. AlAidroos, Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform, Paderborn University, 2023.","bibtex":"@book{AlAidroos_2023, title={Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform}, publisher={Paderborn University}, author={AlAidroos, Salem}, year={2023} }","mla":"AlAidroos, Salem. <i>Design and Implementation of a RadioML Demonstrator Based on an RFSoC Platform</i>. Paderborn University, 2023.","apa":"AlAidroos, S. (2023). <i>Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform</i>. Paderborn University."}},{"year":"2023","citation":{"ama":"Evers G. <i>Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation</i>. Paderborn University; 2023.","chicago":"Evers, Gerrit. <i>Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation</i>. Paderborn University, 2023.","ieee":"G. Evers, <i>Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation</i>. Paderborn University, 2023.","mla":"Evers, Gerrit. <i>Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation</i>. Paderborn University, 2023.","short":"G. Evers, Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation, Paderborn University, 2023.","bibtex":"@book{Evers_2023, title={Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation}, publisher={Paderborn University}, author={Evers, Gerrit}, year={2023} }","apa":"Evers, G. (2023). <i>Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation</i>. Paderborn University."},"date_updated":"2024-05-15T13:31:08Z","publisher":"Paderborn University","supervisor":[{"first_name":"Lennart","orcid":"0000-0003-3789-6034","last_name":"Clausing","full_name":"Clausing, Lennart","id":"74287"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"}],"author":[{"full_name":"Evers, Gerrit","last_name":"Evers","first_name":"Gerrit"}],"date_created":"2024-05-13T13:59:09Z","title":"Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation","type":"bachelorsthesis","status":"public","_id":"54242","department":[{"_id":"78"}],"user_id":"398","language":[{"iso":"ger"}]},{"date_updated":"2024-05-15T13:32:14Z","publisher":"Paderborn University","author":[{"full_name":"Raeisi Nafchi, Masood","last_name":"Raeisi Nafchi","first_name":"Masood"}],"supervisor":[{"full_name":"Clausing, Lennart","id":"74287","orcid":"0000-0003-3789-6034","last_name":"Clausing","first_name":"Lennart"}],"date_created":"2023-07-18T08:55:14Z","title":"Reconfigurable Random Forest Implementation on FPGA","year":"2023","citation":{"apa":"Raeisi Nafchi, M. (2023). <i>Reconfigurable Random Forest Implementation on FPGA</i>. Paderborn University.","mla":"Raeisi Nafchi, Masood. <i>Reconfigurable Random Forest Implementation on FPGA</i>. Paderborn University, 2023.","short":"M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA, Paderborn University, 2023.","bibtex":"@book{Raeisi Nafchi_2023, title={Reconfigurable Random Forest Implementation on FPGA}, publisher={Paderborn University}, author={Raeisi Nafchi, Masood}, year={2023} }","ama":"Raeisi Nafchi M. <i>Reconfigurable Random Forest Implementation on FPGA</i>. Paderborn University; 2023.","ieee":"M. Raeisi Nafchi, <i>Reconfigurable Random Forest Implementation on FPGA</i>. Paderborn University, 2023.","chicago":"Raeisi Nafchi, Masood. <i>Reconfigurable Random Forest Implementation on FPGA</i>. Paderborn University, 2023."},"_id":"46075","user_id":"398","department":[{"_id":"78"}],"language":[{"iso":"eng"}],"type":"mastersthesis","status":"public"},{"user_id":"71291","department":[{"_id":"52"}],"_id":"54352","language":[{"iso":"eng"}],"type":"conference","publication":"PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management ","status":"public","date_created":"2024-05-19T13:38:09Z","author":[{"first_name":"Daniel","last_name":"Urbaneck","full_name":"Urbaneck, Daniel","id":"60223"},{"orcid":"0000-0002-8480-7295","last_name":"Böcker","id":"66","full_name":"Böcker, Joachim","first_name":"Joachim"},{"first_name":"Frank","id":"71291","full_name":"Schafmeister, Frank","last_name":"Schafmeister"}],"date_updated":"2024-05-19T14:03:40Z","conference":{"location":"Nuremberg"},"title":"Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 kW Automotive DC-DC Stage","publication_status":"published","publication_identifier":{"isbn":["978-3-8007-6091-6"]},"citation":{"chicago":"Urbaneck, Daniel, Joachim Böcker, and Frank Schafmeister. “Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 KW Automotive DC-DC Stage.” In <i>PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management </i>. Nuremberg, 2023.","ieee":"D. Urbaneck, J. Böcker, and F. Schafmeister, “Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 kW Automotive DC-DC Stage,” Nuremberg, 2023.","ama":"Urbaneck D, Böcker J, Schafmeister F. Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 kW Automotive DC-DC Stage. In: <i>PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management </i>. ; 2023.","short":"D. Urbaneck, J. Böcker, F. Schafmeister, in: PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management , Nuremberg, 2023.","mla":"Urbaneck, Daniel, et al. “Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 KW Automotive DC-DC Stage.” <i>PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management </i>, 2023.","bibtex":"@inproceedings{Urbaneck_Böcker_Schafmeister_2023, place={Nuremberg}, title={Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 kW Automotive DC-DC Stage}, booktitle={PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management }, author={Urbaneck, Daniel and Böcker, Joachim and Schafmeister, Frank}, year={2023} }","apa":"Urbaneck, D., Böcker, J., &#38; Schafmeister, F. (2023). Advanced Synchronous Rectification for an IGBT-Based ZCS LLC Converter with High Output Currents for a 2 kW Automotive DC-DC Stage. <i>PCIM Europe 2023; IEEE International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management </i>."},"place":"Nuremberg","year":"2023"},{"author":[{"first_name":"Volker","last_name":"Peckhaus","full_name":"Peckhaus, Volker","id":"391"}],"date_created":"2023-12-23T12:08:34Z","user_id":"391","date_updated":"2024-05-19T14:52:53Z","publication_date":"2023-10-02","_id":"50068","main_file_link":[{"url":"https://mathscinet.ams.org/mathscinet/article?mr=4436125"}],"language":[{"iso":"eng"}],"title":"von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6)","type":"review","publication":"Mathematical Reviews, MR4436125","citation":{"ieee":"V. Peckhaus, “von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6),” <i>Mathematical Reviews, MR4436125</i>. 2023.","chicago":"Peckhaus, Volker. “Von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6).” <i>Mathematical Reviews, MR4436125</i>, 2023.","ama":"Peckhaus V. von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6). <i>Mathematical Reviews, MR4436125</i>. Published online 2023.","mla":"Peckhaus, Volker. “Von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6).” <i>Mathematical Reviews, MR4436125</i>, 2023.","short":"V. Peckhaus, Mathematical Reviews, MR4436125 (2023).","bibtex":"@article{Peckhaus_2023, title={von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6)}, journal={Mathematical Reviews, MR4436125}, author={Peckhaus, Volker}, year={2023} }","apa":"Peckhaus, V. (2023). von Plato, Jan, Chapters from Gödel’s Unfinished Books on Foundational Research, Springer: Cham 2022 (Vienna Circle Institute Library; 6). In <i>Mathematical Reviews, MR4436125</i>."},"status":"public","year":"2023"},{"citation":{"apa":"Bürckner, L. M. (2023). <i>Entwicklung eines Verfahrens zur Probenentnahme aus einem Pulverkuchen im SLS-Prozess</i>.","short":"L.M. Bürckner, Entwicklung Eines Verfahrens Zur Probenentnahme Aus Einem Pulverkuchen Im SLS-Prozess, 2023.","mla":"Bürckner, Lorena Marie. <i>Entwicklung Eines Verfahrens Zur Probenentnahme Aus Einem Pulverkuchen Im SLS-Prozess</i>. 2023.","bibtex":"@book{Bürckner_2023, title={Entwicklung eines Verfahrens zur Probenentnahme aus einem Pulverkuchen im SLS-Prozess}, author={Bürckner, Lorena Marie}, year={2023} }","chicago":"Bürckner, Lorena Marie. <i>Entwicklung Eines Verfahrens Zur Probenentnahme Aus Einem Pulverkuchen Im SLS-Prozess</i>, 2023.","ieee":"L. M. Bürckner, <i>Entwicklung eines Verfahrens zur Probenentnahme aus einem Pulverkuchen im SLS-Prozess</i>. 2023.","ama":"Bürckner LM. <i>Entwicklung Eines Verfahrens Zur Probenentnahme Aus Einem Pulverkuchen Im SLS-Prozess</i>.; 2023."},"year":"2023","date_created":"2024-05-21T13:54:15Z","supervisor":[{"first_name":"Moritz Johannes","full_name":"Rüther, Moritz Johannes","id":"38188","last_name":"Rüther"},{"orcid":"000-0001-8590-1921","last_name":"Schmid","full_name":"Schmid, Hans-Joachim","id":"464","first_name":"Hans-Joachim"}],"author":[{"full_name":"Bürckner, Lorena Marie","last_name":"Bürckner","first_name":"Lorena Marie"}],"date_updated":"2024-05-21T13:58:47Z","title":"Entwicklung eines Verfahrens zur Probenentnahme aus einem Pulverkuchen im SLS-Prozess","type":"bachelorsthesis","status":"public","user_id":"38188","department":[{"_id":"150"}],"_id":"54389","language":[{"iso":"eng"}]}]