3 Publications
2024 | Conference Paper | LibreCat-ID: 56605
J.-O. Opdenhövel, C. Alt, C. Plessl, and T. Kenter, “StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs,” 2024, doi: 10.1109/fpl64840.2024.00023.
LibreCat
| DOI
2024 | Conference Paper | LibreCat-ID: 54312
M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL,” 2024, doi: 10.1145/3659914.3659925.
LibreCat
| DOI
3 Publications
2024 | Conference Paper | LibreCat-ID: 56605
J.-O. Opdenhövel, C. Alt, C. Plessl, and T. Kenter, “StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs,” 2024, doi: 10.1109/fpl64840.2024.00023.
LibreCat
| DOI
2024 | Conference Paper | LibreCat-ID: 54312
M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL,” 2024, doi: 10.1145/3659914.3659925.
LibreCat
| DOI