7 Publications

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[7]
2021 | Conference Paper | LibreCat-ID: 21813
Hansmeier, T., & Platzner, M. (n.d.). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. In GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM).
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM). https://doi.org/10.1145/3377929.3389968
LibreCat | DOI
 
[5]
2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 1756–1764). New York, NY, United States: Association for Computing Machinery (ACM). https://doi.org/10.1145/3377929.3398106
LibreCat | DOI
 
[4]
2019 | Journal Article | LibreCat-ID: 12967
Hansmeier, T., Platzner, M., Pantho, M. J. H., & Andrews, D. (2019). An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems, 91(11), 1259–1272. https://doi.org/10.1007/s11265-018-1435-y
LibreCat | DOI
 
[3]
2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.
LibreCat
 
[2]
2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier, T., Platzner, M., & Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing. https://doi.org/10.1007/978-3-319-78890-6_13
LibreCat | Files available | DOI
 
[1]
2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier, T. (2017). An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn.
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7 Publications

Mark all

[7]
2021 | Conference Paper | LibreCat-ID: 21813
Hansmeier, T., & Platzner, M. (n.d.). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. In GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM).
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM). https://doi.org/10.1145/3377929.3389968
LibreCat | DOI
 
[5]
2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 1756–1764). New York, NY, United States: Association for Computing Machinery (ACM). https://doi.org/10.1145/3377929.3398106
LibreCat | DOI
 
[4]
2019 | Journal Article | LibreCat-ID: 12967
Hansmeier, T., Platzner, M., Pantho, M. J. H., & Andrews, D. (2019). An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems, 91(11), 1259–1272. https://doi.org/10.1007/s11265-018-1435-y
LibreCat | DOI
 
[3]
2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.
LibreCat
 
[2]
2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier, T., Platzner, M., & Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing. https://doi.org/10.1007/978-3-319-78890-6_13
LibreCat | Files available | DOI
 
[1]
2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier, T. (2017). An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn.
LibreCat
 

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