{"language":[{"iso":"eng"}],"type":"conference","date_updated":"2023-09-26T13:34:08Z","publication":"Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)","series_title":"Lecture Notes in Computer Science (LNCS)","author":[{"full_name":"Kenter, Tobias","last_name":"Kenter","id":"3145","first_name":"Tobias"},{"first_name":"Gavin Francis","id":"30332","last_name":"Vaz","full_name":"Vaz, Gavin Francis"},{"orcid":"0000-0001-5728-9982","first_name":"Christian","full_name":"Plessl, Christian","last_name":"Plessl","id":"16153"}],"publisher":"Springer International Publishing","year":"2014","place":"Cham","status":"public","intvolume":"      8405","user_id":"15278","citation":{"ieee":"T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in <i>Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)</i>, 2014, vol. 8405, pp. 144–155, doi: <a href=\"https://doi.org/10.1007/978-3-319-05960-0_13\">10.1007/978-3-319-05960-0_13</a>.","mla":"Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” <i>Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)</i>, vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:<a href=\"https://doi.org/10.1007/978-3-319-05960-0_13\">10.1007/978-3-319-05960-0_13</a>.","bibtex":"@inproceedings{Kenter_Vaz_Plessl_2014, place={Cham}, series={Lecture Notes in Computer Science (LNCS)}, title={Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer}, volume={8405}, DOI={<a href=\"https://doi.org/10.1007/978-3-319-05960-0_13\">10.1007/978-3-319-05960-0_13</a>}, booktitle={Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)}, publisher={Springer International Publishing}, author={Kenter, Tobias and Vaz, Gavin Francis and Plessl, Christian}, year={2014}, pages={144–155}, collection={Lecture Notes in Computer Science (LNCS)} }","ama":"Kenter T, Vaz GF, Plessl C. Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In: <i>Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)</i>. Vol 8405. Lecture Notes in Computer Science (LNCS). Springer International Publishing; 2014:144-155. doi:<a href=\"https://doi.org/10.1007/978-3-319-05960-0_13\">10.1007/978-3-319-05960-0_13</a>","chicago":"Kenter, Tobias, Gavin Francis Vaz, and Christian Plessl. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” In <i>Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)</i>, 8405:144–55. Lecture Notes in Computer Science (LNCS). Cham: Springer International Publishing, 2014. <a href=\"https://doi.org/10.1007/978-3-319-05960-0_13\">https://doi.org/10.1007/978-3-319-05960-0_13</a>.","apa":"Kenter, T., Vaz, G. F., &#38; Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. <i>Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)</i>, <i>8405</i>, 144–155. <a href=\"https://doi.org/10.1007/978-3-319-05960-0_13\">https://doi.org/10.1007/978-3-319-05960-0_13</a>","short":"T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155."},"volume":8405,"title":"Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer","_id":"388","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"ddc":["040"],"file":[{"success":1,"file_name":"388-plessl14_arc.pdf","file_id":"1387","relation":"main_file","access_level":"closed","content_type":"application/pdf","creator":"florida","file_size":330193,"date_created":"2018-03-20T07:02:02Z","date_updated":"2018-03-20T07:02:02Z"}],"page":"144-155","doi":"10.1007/978-3-319-05960-0_13","abstract":[{"lang":"eng","text":"In order to leverage the use of reconfigurable architectures in general-purpose computing, quick and automated methods to find suitable accelerator designs are required. We tackle this challenge in both regards. In order to avoid long synthesis times, we target a vector copro- cessor, implemented on the FPGAs of a Convey HC-1. Previous studies showed that existing tools were not able to accelerate a real-world application with low effort. We present a toolflow to automatically identify suitable loops for vectorization, generate a corresponding hardware/software bipartition, and generate coprocessor code. Where applicable, we leverage outer-loop vectorization. We evaluate our tools with a set of characteristic loops, systematically analyzing different dependency and data layout properties."}],"quality_controlled":"1","project":[{"name":"SFB 901","grant_number":"160364472","_id":"1"},{"name":"SFB 901 - Subprojekt C2","grant_number":"160364472","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"},{"name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures","grant_number":"610996","_id":"34"}],"has_accepted_license":"1","date_created":"2017-10-17T12:42:07Z","file_date_updated":"2018-03-20T07:02:02Z"}