{"status":"public","year":"2018","author":[{"full_name":"Awais, Muhammad","id":"64665","last_name":"Awais","orcid":"https://orcid.org/0000-0003-4148-2969","first_name":"Muhammad"},{"first_name":"Hassan","full_name":"Ghasemzadeh Mohammadi, Hassan","id":"61186","last_name":"Ghasemzadeh Mohammadi"},{"full_name":"Platzner, Marco","last_name":"Platzner","id":"398","first_name":"Marco"}],"abstract":[{"text":"Approximate computing has become a very popular design\r\nstrategy that exploits error resilient computations to achieve higher\r\nperformance and energy efficiency. Automated synthesis of approximate\r\ncircuits is performed via functional approximation, in which various\r\nparts of the target circuit are extensively examined with a library\r\nof approximate components/transformations to trade off the functional\r\naccuracy and computational budget (i.e., power). However, as the number\r\nof possible approximate transformations increases, traditional search\r\ntechniques suffer from a combinatorial explosion due to the large\r\nbranching factor. In this work, we present a comprehensive framework\r\nfor automated synthesis of approximate circuits from either structural\r\nor behavioral descriptions. We adapt the Monte Carlo Tree Search\r\n(MCTS), as a stochastic search technique, to deal with the large design\r\nspace exploration, which enables a broader range of potential possible\r\napproximations through lightweight random simulations. The proposed\r\nframework is able to recognize the design Pareto set even with low\r\ncomputational budgets. Experimental results highlight the capabilities of\r\nthe proposed synthesis framework by resulting in up to 61.69% energy\r\nsaving while maintaining the predefined quality constraints.","lang":"eng"}],"department":[{"_id":"78"}],"_id":"10598","title":"An MCTS-based Framework for Synthesis of Approximate Circuits","keyword":["Approximate computing","High-level synthesis","Accuracy","Monte-Carlo tree search","Circuit simulation"],"citation":{"mla":"Awais, Muhammad, et al. “An MCTS-Based Framework for Synthesis of Approximate Circuits.” <i>26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)</i>, 2018, pp. 219–24, doi:<a href=\"https://doi.org/10.1109/VLSI-SoC.2018.8645026\">10.1109/VLSI-SoC.2018.8645026</a>.","ama":"Awais M, Ghasemzadeh Mohammadi H, Platzner M. An MCTS-based Framework for Synthesis of Approximate Circuits. In: <i>26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)</i>. ; 2018:219-224. doi:<a href=\"https://doi.org/10.1109/VLSI-SoC.2018.8645026\">10.1109/VLSI-SoC.2018.8645026</a>","ieee":"M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in <i>26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)</i>, 2018, pp. 219–224.","apa":"Awais, M., Ghasemzadeh Mohammadi, H., &#38; Platzner, M. (2018). An MCTS-based Framework for Synthesis of Approximate Circuits. In <i>26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)</i> (pp. 219–224). <a href=\"https://doi.org/10.1109/VLSI-SoC.2018.8645026\">https://doi.org/10.1109/VLSI-SoC.2018.8645026</a>","bibtex":"@inproceedings{Awais_Ghasemzadeh Mohammadi_Platzner_2018, title={An MCTS-based Framework for Synthesis of Approximate Circuits}, DOI={<a href=\"https://doi.org/10.1109/VLSI-SoC.2018.8645026\">10.1109/VLSI-SoC.2018.8645026</a>}, booktitle={26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)}, author={Awais, Muhammad and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}, year={2018}, pages={219–224} }","chicago":"Awais, Muhammad, Hassan Ghasemzadeh Mohammadi, and Marco Platzner. “An MCTS-Based Framework for Synthesis of Approximate Circuits.” In <i>26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)</i>, 219–24, 2018. <a href=\"https://doi.org/10.1109/VLSI-SoC.2018.8645026\">https://doi.org/10.1109/VLSI-SoC.2018.8645026</a>.","short":"M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224."},"user_id":"64665","date_created":"2019-07-10T09:21:38Z","language":[{"iso":"eng"}],"doi":"10.1109/VLSI-SoC.2018.8645026","page":"219-224","publication":"26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","type":"conference","date_updated":"2022-01-06T06:50:46Z"}