Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime Anwer, Jahanzeb Meisner, Sebastian Platzner, Marco fault tolerant computing field programmable gate arrays logic design reliability BYU-LANL tool DRM tool flow FPGA based hardware designs avionic application device technologies dynamic reliability management fault-tolerant operation hardware designs reconfiguring reliability levels space applications Field programmable gate arrays Hardware Redundancy Reliability engineering Runtime Tunneling magnetoresistance 2013 info:eu-repo/semantics/conferenceObject doc-type:conferenceObject text http://purl.org/coar/resource_type/c_5794 https://ris.uni-paderborn.de/record/10620 Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In: <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>. ; 2013:1-6. doi:<a href="https://doi.org/10.1109/ReConFig.2013.6732280">10.1109/ReConFig.2013.6732280</a> eng info:eu-repo/semantics/altIdentifier/doi/10.1109/ReConFig.2013.6732280 info:eu-repo/semantics/closedAccess