conference paper Jahanzeb Anwer author Sebastian Meisner author Marco Platzner author 398 78 department 2013 eng fault tolerant computingfield programmable gate arrayslogic designreliabilityBYU-LANL toolDRM tool flowFPGA based hardware designsavionic applicationdevice technologiesdynamic reliability managementfault-tolerant operationhardware designsreconfiguring reliability levelsspace applicationsField programmable gate arraysHardwareRedundancyReliability engineeringRuntimeTunneling magnetoresistance 10.1109/ReConFig.2013.6732280 1-6 Anwer, Jahanzeb, et al. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.” <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>, 2013, pp. 1–6, doi:<a href="https://doi.org/10.1109/ReConFig.2013.6732280">10.1109/ReConFig.2013.6732280</a>. @inproceedings{Anwer_Meisner_Platzner_2013, title={Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime}, DOI={<a href="https://doi.org/10.1109/ReConFig.2013.6732280">10.1109/ReConFig.2013.6732280</a>}, booktitle={Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on}, author={Anwer, Jahanzeb and Meisner, Sebastian and Platzner, Marco}, year={2013}, pages={1–6} } Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In: <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>. ; 2013:1-6. doi:<a href="https://doi.org/10.1109/ReConFig.2013.6732280">10.1109/ReConFig.2013.6732280</a> J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on</i>, 2013, pp. 1–6. Anwer, J., Meisner, S., &#38; Platzner, M. (2013). Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on</i> (pp. 1–6). <a href="https://doi.org/10.1109/ReConFig.2013.6732280">https://doi.org/10.1109/ReConFig.2013.6732280</a> J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6. Anwer, Jahanzeb, Sebastian Meisner, and Marco Platzner. “Dynamic Reliability Management: Reconfiguring Reliability-Levels of Hardware Designs at Runtime.” In <i>Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On</i>, 1–6, 2013. <a href="https://doi.org/10.1109/ReConFig.2013.6732280">https://doi.org/10.1109/ReConFig.2013.6732280</a>. 106202019-07-10T09:32:57Z2022-01-06T06:50:48Z