[{"date_created":"2019-07-10T09:32:58Z","department":[{"_id":"78"}],"type":"conference","citation":{"ieee":"J. Anwer, M. Platzner, and S. Meisner, “FPGA Redundancy Configurations: An Automated Design Space Exploration,” in <i>Reconfigurable Architectures Workshop (RAW)</i>, 2014.","apa":"Anwer, J., Platzner, M., &#38; Meisner, S. (2014). FPGA Redundancy Configurations: An Automated Design Space Exploration. In <i>Reconfigurable Architectures Workshop (RAW)</i>. <a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">https://doi.org/10.1109/IPDPSW.2014.37</a>","short":"J. Anwer, M. Platzner, S. Meisner, in: Reconfigurable Architectures Workshop (RAW), 2014.","chicago":"Anwer, Jahanzeb, Marco Platzner, and Sebastian Meisner. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” In <i>Reconfigurable Architectures Workshop (RAW)</i>. RAW, 2014. <a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">https://doi.org/10.1109/IPDPSW.2014.37</a>.","mla":"Anwer, Jahanzeb, et al. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” <i>Reconfigurable Architectures Workshop (RAW)</i>, 2014, doi:<a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">10.1109/IPDPSW.2014.37</a>.","bibtex":"@inproceedings{Anwer_Platzner_Meisner_2014, series={RAW}, title={FPGA Redundancy Configurations: An Automated Design Space Exploration}, DOI={<a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">10.1109/IPDPSW.2014.37</a>}, booktitle={Reconfigurable Architectures Workshop (RAW)}, author={Anwer, Jahanzeb and Platzner, Marco and Meisner, Sebastian}, year={2014}, collection={RAW} }","ama":"Anwer J, Platzner M, Meisner S. FPGA Redundancy Configurations: An Automated Design Space Exploration. In: <i>Reconfigurable Architectures Workshop (RAW)</i>. RAW. ; 2014. doi:<a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">10.1109/IPDPSW.2014.37</a>"},"publication":"Reconfigurable Architectures Workshop (RAW)","_id":"10621","series_title":"RAW","language":[{"iso":"eng"}],"doi":"10.1109/IPDPSW.2014.37","user_id":"3118","author":[{"full_name":"Anwer, Jahanzeb","first_name":"Jahanzeb","last_name":"Anwer"},{"first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco","id":"398"},{"first_name":"Sebastian","last_name":"Meisner","full_name":"Meisner, Sebastian"}],"year":"2014","status":"public","title":"FPGA Redundancy Configurations: An Automated Design Space Exploration","date_updated":"2022-01-06T06:50:48Z"}]