{"year":"2014","type":"conference","date_updated":"2022-01-06T06:50:48Z","doi":"10.1109/IPDPSW.2014.37","language":[{"iso":"eng"}],"date_created":"2019-07-10T09:32:58Z","_id":"10621","user_id":"3118","series_title":"RAW","author":[{"first_name":"Jahanzeb","last_name":"Anwer","full_name":"Anwer, Jahanzeb"},{"first_name":"Marco","full_name":"Platzner, Marco","id":"398","last_name":"Platzner"},{"full_name":"Meisner, Sebastian","last_name":"Meisner","first_name":"Sebastian"}],"title":"FPGA Redundancy Configurations: An Automated Design Space Exploration","status":"public","citation":{"ama":"Anwer J, Platzner M, Meisner S. FPGA Redundancy Configurations: An Automated Design Space Exploration. In: <i>Reconfigurable Architectures Workshop (RAW)</i>. RAW. ; 2014. doi:<a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">10.1109/IPDPSW.2014.37</a>","bibtex":"@inproceedings{Anwer_Platzner_Meisner_2014, series={RAW}, title={FPGA Redundancy Configurations: An Automated Design Space Exploration}, DOI={<a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">10.1109/IPDPSW.2014.37</a>}, booktitle={Reconfigurable Architectures Workshop (RAW)}, author={Anwer, Jahanzeb and Platzner, Marco and Meisner, Sebastian}, year={2014}, collection={RAW} }","ieee":"J. Anwer, M. Platzner, and S. Meisner, “FPGA Redundancy Configurations: An Automated Design Space Exploration,” in <i>Reconfigurable Architectures Workshop (RAW)</i>, 2014.","chicago":"Anwer, Jahanzeb, Marco Platzner, and Sebastian Meisner. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” In <i>Reconfigurable Architectures Workshop (RAW)</i>. RAW, 2014. <a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">https://doi.org/10.1109/IPDPSW.2014.37</a>.","short":"J. Anwer, M. Platzner, S. Meisner, in: Reconfigurable Architectures Workshop (RAW), 2014.","apa":"Anwer, J., Platzner, M., &#38; Meisner, S. (2014). FPGA Redundancy Configurations: An Automated Design Space Exploration. In <i>Reconfigurable Architectures Workshop (RAW)</i>. <a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">https://doi.org/10.1109/IPDPSW.2014.37</a>","mla":"Anwer, Jahanzeb, et al. “FPGA Redundancy Configurations: An Automated Design Space Exploration.” <i>Reconfigurable Architectures Workshop (RAW)</i>, 2014, doi:<a href=\"https://doi.org/10.1109/IPDPSW.2014.37\">10.1109/IPDPSW.2014.37</a>."},"publication":"Reconfigurable Architectures Workshop (RAW)","department":[{"_id":"78"}]}