{"doi":"10.1109/FPT.2017.8280144","language":[{"iso":"eng"}],"_id":"10676","keyword":["Linux","cache storage","microprocessor chips","multiprocessing systems","LEON3-Linux based multicore processor","MiBench suite","block sizes","cache adaptation","evolvable caches","memory-to-cache-index mapping function","processor caches","reconfigurable cache mapping optimization","reconfigurable hardware technology","replacement strategies","standard Linux OS","time a complete hardware implementation","Hardware","Indexes","Linux","Measurement","Multicore processing","Optimization","Training"],"citation":{"chicago":"Ho, Nam, Paul Kaufmann, and Marco Platzner. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.” In 2017 International Conference on Field Programmable Technology (ICFPT), 215–18, 2017. https://doi.org/10.1109/FPT.2017.8280144.","ama":"Ho N, Kaufmann P, Platzner M. Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In: 2017 International Conference on Field Programmable Technology (ICFPT). ; 2017:215-218. doi:10.1109/FPT.2017.8280144","short":"N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.","ieee":"N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.","bibtex":"@inproceedings{Ho_Kaufmann_Platzner_2017, title={Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor}, DOI={10.1109/FPT.2017.8280144}, booktitle={2017 International Conference on Field Programmable Technology (ICFPT)}, author={Ho, Nam and Kaufmann, Paul and Platzner, Marco}, year={2017}, pages={215–218} }","apa":"Ho, N., Kaufmann, P., & Platzner, M. (2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In 2017 International Conference on Field Programmable Technology (ICFPT) (pp. 215–218). https://doi.org/10.1109/FPT.2017.8280144","mla":"Ho, Nam, et al. “Evolvable Caches: Optimization of Reconfigurable Cache Mappings for a LEON3/Linux-Based Multi-Core Processor.” 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–18, doi:10.1109/FPT.2017.8280144."},"author":[{"full_name":"Ho, Nam","last_name":"Ho","first_name":"Nam"},{"first_name":"Paul","full_name":"Kaufmann, Paul","last_name":"Kaufmann"},{"full_name":"Platzner, Marco","last_name":"Platzner","first_name":"Marco","id":"398"}],"year":"2017","date_updated":"2022-01-06T06:50:49Z","publication":"2017 International Conference on Field Programmable Technology (ICFPT)","department":[{"_id":"78"}],"title":"Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor","page":"215-218","user_id":"398","date_created":"2019-07-10T11:22:59Z","status":"public","type":"conference"}